CN203858540U - Communication clock frequency self adapting device - Google Patents
Communication clock frequency self adapting device Download PDFInfo
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- CN203858540U CN203858540U CN201420005586.6U CN201420005586U CN203858540U CN 203858540 U CN203858540 U CN 203858540U CN 201420005586 U CN201420005586 U CN 201420005586U CN 203858540 U CN203858540 U CN 203858540U
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- 230000006854 communication Effects 0.000 title claims abstract description 41
- 238000004891 communication Methods 0.000 title claims abstract description 38
- 238000012544 monitoring process Methods 0.000 claims abstract description 19
- 238000004519 manufacturing process Methods 0.000 abstract 1
- 230000003139 buffering effect Effects 0.000 description 17
- 230000007812 deficiency Effects 0.000 description 5
- 238000000034 method Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000004384 eye physiology Effects 0.000 description 1
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- 239000013589 supplement Substances 0.000 description 1
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Abstract
The utility model provides a communication clock frequency self adapting device with the advantages that the manufacturing cost is low, and the realization is easy. The communication clock frequency self adapting device comprises a main communication unit, a sub communication unit, a storage unit, a buffer memory unit, a monitoring unit and a clock generator, wherein the sub communication unit, the clock generator and the buffer memory unit are respectively connected with the main communication unit, the clock generator and the buffer memory unit are respectively connected with the monitoring unit, and the storage unit is connected with the buffer memory unit. The communication clock frequency self adapting device can be applied to the field of communication frequency adjustment.
Description
Technical field
The utility model relates to a kind of self-reacting device, relates in particular to a kind of self-reacting device of communication clock frequency.
Background technology
Multimedia recording and broadcasting system generally all comprises the memory devices such as main control MCU, internal memory, LCD display, SD card or mmc card.Main control MCU generally all needs SDRAM or the DDR SDRAM internal memory as data operation and program operation.View data in internal memory need to, by the lcd controller of MCU, send to LCD display to show with specific clock frequency.If player, the audio-video document of SD card the inside storage is read SDRAM or DDR SDRAM by MCU, and then the computing such as decode.If video recorder, MCU need to will process the audio-visual data encoding, and is written to SD card the inside with specific clock frequency.
Conventionally system the inside only has the internal memory of a SDRAM or DDR SDRAM, but audio/video encoding/decoding data, image deal with data, shows data, file data and program etc., is all placed on internal memory the inside.Be easy to occur that several functions needs access memory simultaneously and situation about clashing.
LCD display is that one need to be according to timeticks, the equipment of real-time transmission data.If in the time that timeticks arrives, do not have valid data to transmit, display frame just there will be extremely.Just because of this, in the busy system the inside that leads to a conflict a lot of internal storage access, be easy to cause LCD to show abnormal.
MCU, by SD controller, according to standard SD agreement, reads the storage data in SD card in Installed System Memory, or the data of Installed System Memory the inside are write to SD card.SD agreement regulation, the read-write of SD card is carried out taking packet as unit.A packet is made up of the data of the quantity such as the 8byte fixing, 16byte, 512byte.If Installed System Memory, because access is busy, causes in time the data that read from SD card being write, or can not provide in time data to SD card, will cause loss of data or error in data.
It is a kind of effectively simple that the utility model provides, and do not increase the device of MCU cost, overcomes the problems referred to above.
Utility model content
Technical problem to be solved in the utility model is to overcome the deficiencies in the prior art, provides a kind of and manufactures this locality and be easy to the communication clock frequency self-adaption device of realizing.
The technical scheme that communication clock frequency self-adaption device described in the utility model adopts is: this device comprises main communication unit, from communication unit, storage unit, buffer unit, monitoring means and clock generator, describedly all be connected with described main communication unit from communication unit, described clock generator and described buffer unit, described clock generator is all connected with described monitoring means with described buffer unit, and described storage unit is connected with described buffer unit.
The beneficial effects of the utility model are: the utility model has increased the monitoring means for monitoring buffer unit data volume in existing electronic data communication system, when storage unit bandwidth deficiency, while causing buffer unit data volume not enough or too much, monitoring means coordinates the frequency that becomes clock generator adjustment communication reference clock, to adjust main communication unit and the communication speed from communication unit; While avoiding buffer unit data volume not enough or too much, cause garble or loss of data; Use this device not only not affect practical communication effect, and can ensure the correctness of communication.
Brief description of the drawings
Fig. 1 is easy structure schematic diagram of the present utility model;
Fig. 2 is the easy structure schematic diagram in embodiment mono-;
Fig. 3 is the easy structure schematic diagram in embodiment bis-.
Embodiment
The utility model discloses a kind of communication clock frequency self-adaption device.In order to make the purpose of this utility model, technical scheme and advantage clearer, push away screen display system and SD card read-write system as example and describe by reference to the accompanying drawings the implementation procedure of the utility model specific embodiment in detail taking LCD below.
embodiment mono-:
Below with reference to accompanying drawing 2, first specific embodiment of the present utility model is described.
The LCD of communication clock frequency self-adaption pushes away screen display system, comprises LCD display, lcd controller, SDRAM, data buffer storage, monitoring means and clock generator, and wherein, lcd controller is connected with LCD display, clock generator, data buffer storage.Monitoring means is connected with clock generator, data buffer storage.SDRAM is connected with data buffer storage.The resolution of LCD display is 320X240.When this system is normally worked, data buffering reads the display image data that is stored in SDRAM the inside.Per second in order to ensure that the refresh rate of LCD display reaches 60 frames, clock generator provides the reference clock signal of 5MHz.Lcd controller produces actual LCD display according to reference clock signal 5MHz and drives clock signal.Then lcd controller drives timeticks according to LCD display, from data buffering reading out data, then sends to LCD display, completes and shows that data send communication process.
When SDRAM be Time Bandwidth deficiency, while causing data buffering data to be less than 7 pixels, monitoring means produce buffer memory by empty signal to clock generator.Clock generator, in the time that buffer memory is effective by spacing wave, is reduced to 500KHz with reference to the frequency of clock signal automatically.LCD display drives the frequency of clock signal also with regard to the corresponding 500KHz that is reduced to, slower 10 times than 5MHz.The spending rate of the data of data buffering the inside just reduces by 10 times so.Before frequency reducing, data buffering, before data run out of completely, has the time of 10 times to continue to read the data of SDRAM relatively.
Under frequency reducing state, if SDRAM's is that Time Bandwidth is restored, data buffering supplements after enough demonstration data in time, and monitoring means is changed to the moderate state of buffer memory by buffer memory by dummy status.LCD display drives the frequency retrieval of clock signal to 5MHz.
Owing to there being the image persistance characteristic of 1/24 second on people's physiology of eye, so as long as LCD display refresh rate is per second higher than 25 frames, human eye pauses with regard to imperceptible picture.In the present embodiment, normal refresh rate is higher 2 times than human eye physiological requirement.Under frequency reducing state, only have the refresh rate of 7 pixels to be slower than normal speed, account for ten thousand of total pixel/.Actual refreshing frequency is very low lower than the possibility of human eye physiological requirement.Do not affecting under the prerequisite of LCD display display effect thereby realize, the data that greatly reduce factor data buffering the inside can not be supplemented in time, cause LCD to show the possibility of error in data.
embodiment bis-:
Below with reference to accompanying drawing 3, second specific embodiment of the present utility model described.
The SD card read-write system of communication clock frequency self-adaption, comprising: SD card, SD controller, SDRAM, data buffer storage, monitoring means and clock generator, wherein, SD controller is connected with SD card, clock generator, data buffer storage.Monitoring means is connected with clock generator, data buffer storage.SDRAM is connected with data buffer storage.
When this system is normally worked, clock generator, according to the requirement of SD communication protocol, provides the reference clock signal of 10MHz.SD controller produces actual SD cartoon letters clock according to reference clock signal 10MHz.
Writing in the operating process of SD card, data buffering reads the data that are stored in SDRAM the inside.SD controller, according to SD cartoon letters timeticks, from data buffering reading out data, then sends to SD card, completes the communication process of writing SD card.When SDRAM be Time Bandwidth deficiency, can not be data buffering supplementary data in time, while causing data buffering to be read sky by SD controller, monitoring means produces the empty signal of buffer memory to clock generator.Clock generator is at buffer memory when spacing wave is effective, automatic pause reference clock signal.Correspondingly, SD cartoon letters clock signal is suspended, and SD cartoon letters suspends.Suspending under the state of clock, if SDRAM's is that Time Bandwidth is restored, after the timely supplementary data of data buffering, buffer memory dummy status is changed to the moderate state of buffer memory by monitoring means.Clock generator recovers output reference clock signal.Correspondingly, SD cartoon letters recovering clock signals, SD cartoon letters recovers.
Reading in the operating process of SD card, SD controller, according to SD cartoon letters timeticks, reads and data writing impact damper from SD card.Then, the data that are stored in data buffer the inside are write SDRAM by data buffering, completes the communication process of reading SD card.When SDRAM be Time Bandwidth deficiency, data buffering can not write SDRAM by data in time, causes data buffering to be write when full by SD controller, monitoring means produces signal that buffer memory is full to clock generator.Clock generator is at buffer memory when completely signal is effective, automatic pause reference clock signal.Correspondingly, SD cartoon letters clock signal is suspended, and SD cartoon letters suspends.Suspending under the state of clock, if SDRAM's is that Time Bandwidth is restored, data buffering writes data after SDRAM in time, and monitoring means has been expired state by buffer memory and has been changed to the moderate state of buffer memory.Clock generator recovers output reference clock signal.Correspondingly, SD cartoon letters recovering clock signals, SD cartoon letters recovers.
In SD communication protocol the inside regulation, the read-write motion of SD card all occurs in the saltus step edge of SD communication clock signal.After SD communication clock signal suspension, can there is not any read-write motion in SD card.Do not affecting under the prerequisite of SD card read-write operation thereby realize, stopping the data of factor data buffering the inside and can not process, causing the possibility of SD communication data mistake.
Above embodiment only, for explanation design of the present utility model and feature, can not limit protection domain of the present utility model with this, and all equivalences of doing according to the utility model essence change or modify, within should being included in protection domain of the present utility model.
The utility model can be applicable to communication frequency and regulates field.
Claims (1)
1. a communication clock frequency self-adaption device, it is characterized in that: this device comprises main communication unit, from communication unit, storage unit, buffer unit, monitoring means and clock generator, describedly all be connected with described main communication unit from communication unit, described clock generator and described buffer unit, described clock generator is all connected with described monitoring means with described buffer unit, and described storage unit is connected with described buffer unit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420005586.6U CN203858540U (en) | 2014-01-06 | 2014-01-06 | Communication clock frequency self adapting device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420005586.6U CN203858540U (en) | 2014-01-06 | 2014-01-06 | Communication clock frequency self adapting device |
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| Publication Number | Publication Date |
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| CN203858540U true CN203858540U (en) | 2014-10-01 |
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| CN201420005586.6U Expired - Lifetime CN203858540U (en) | 2014-01-06 | 2014-01-06 | Communication clock frequency self adapting device |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103777676A (en) * | 2014-01-06 | 2014-05-07 | 建荣集成电路科技(珠海)有限公司 | Communication clock frequency self-adaption device and method |
-
2014
- 2014-01-06 CN CN201420005586.6U patent/CN203858540U/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103777676A (en) * | 2014-01-06 | 2014-05-07 | 建荣集成电路科技(珠海)有限公司 | Communication clock frequency self-adaption device and method |
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Legal Events
| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20220318 Address after: Rooms 1306-1309, 13 / F, 19 science Avenue West, Hong Kong Science Park, Shatin, New Territories, China Patentee after: BUILDWIN INTERNATIONAL (ZHUHAI) LTD. Address before: 519015 Guangdong city of Zhuhai province Jida Bailian Road No. 184 building 7 floor three-dimensional technology Patentee before: BUILDWIN INTERNATIONAL (ZHUHAI) Ltd. |
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| CX01 | Expiry of patent term | ||
| CX01 | Expiry of patent term |
Granted publication date: 20141001 |