CN203827314U - Contact input interface circuit - Google Patents
Contact input interface circuit Download PDFInfo
- Publication number
- CN203827314U CN203827314U CN201420124566.0U CN201420124566U CN203827314U CN 203827314 U CN203827314 U CN 203827314U CN 201420124566 U CN201420124566 U CN 201420124566U CN 203827314 U CN203827314 U CN 203827314U
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- resistance
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- nvsi
- comparator
- capacitor
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Abstract
The utility model provides a contact input interface circuit. According to the contact input interface circuit, a pin BS, a pin BAL and a pin VCC+ of a comparator U1 are connected with one another and thereafter are connected with a grounded capacitor C2; the pin BS of the comparator U1 is also connected with power source voltage +5VVSI as well as a resistor R5 and a resistor R6 which are in series connection; one end of the resistor R5 is connected with a grounding end of the capacitor C2; the common end of the resistor R5 and the resistor R6 are connected with a pin IN- of the comparator U1; a pin VCC- and a pin EO of the comparator U1 are connected with the grounding end of the capacitor C2; a pin CO of the comparator U1 is connected with a resistor R7 and a resistor R8; the resistor R7 is connected with an external power source +5VVSI; the resistor R8 is connected with the base of an NPN triode Q1; the emitter of the NPN triode Q1 is grounded; the collector of the NPN triode Q1 is connected with an indicating lamp circuit; and the comparator U1 is further connected with an input circuit. The contact input interface circuit of the utility model has the advantages of strong anti-interference performance and stable signal transmission, and can effectively filter out interference pulses.
Description
Technical field
The utility model relates to a kind of signal interface circuit, relates in particular a kind of contact input interface circuit.
Background technology
Time check instrument, for the precision of checking time, is used for some and counts field accurately, as rocket launching, satellite navigation, astronomical clock etc. need the field that time precision is high.
The power frequency measure portion of the signal plate of time check instrument converts the sinusoidal wave power frequency component of input to square-wave signal and is input to FPGA, is measured the square-wave signal cycle of input, thereby obtain work frequency by FPGA; Sometimes due to external issues or operational issue, can make the output frequency of the work frequency that obtains and setting inconsistent, follow-up signal analysis is gone wrong, thereby reduce time check precision, affect instrument use.
Utility model content
The utility model provides a kind of testing circuit of power frequency output frequency, can detect the power frequency output frequency of power frequency measuring-signal change-over circuit conversion output, to ensure that output frequency conforms to setpoint frequency, there is error in the output frequency solving in the past, affects the problem of instrument time check precision.
For solving above-mentioned technical problem, the utility model is by the following technical solutions: the testing circuit of power frequency output frequency, comprise comparator U1, the pin BS of comparator U1, pin BAL and pin VCC+ are all connected with the capacitor C 2 of ground connection, and described pin BS, pin BAL and pin VCC+ are all connected with high-voltage power supply+15V VFO, the pin VCC-of described comparator U1 connects outside LVPS-15V VFO, between the earth terminal of LVPS-15V VFO and capacitor C 2, be also connected with capacitor C 1, the pin IN-of described comparator U1 connects high-voltage power supply+15V VFO by resistance R 1, described pin IN-is also connected with diode D1, the anodic bonding pin IN-of diode D1, the negative electrode of described diode D1 is connected on the earth terminal of capacitor C 2, the pin EO of described comparator U1 connects the earth terminal of capacitor C 2, the pin CO of described comparator U1 is connected with triode Q1 by resistance R 3, the base stage of triode Q1 is connected with R3, the grounded emitter of described triode Q1, described triode Q1 collector electrode is connected with LED light circuit, LED light circuit is also connected with optical coupler U2.
Described LED light circuit comprises LED VFO-circuit and LED VFO+ circuit, and LED VFO-circuit one end is connected with the emitter of triode Q1 and the pin 2 of comparator U1, and the described LED VFO-circuit other end connects external LED indicator light; Described LED VFO+ circuit comprises resistance R 4 and the resistance R 5 of serial connection, resistance R 4 is connected with external LED indicator light, described resistance R 5 is connected with the pin 1 of comparator U1, and the common port of described resistance R 4 and resistance R 5 is connected with external power source+5V VFO and ground capacity C3.
The pin 3 of described optical coupler U2 meets external power source PWRM+3.3V, after pin 5 ground connection of described optical coupler U2, be connected with external power source PWRM+3.3V by capacitor C 4, the pin 4 of described optical coupler U2 is back inspection signal VFO F1 output circuit, and described external power source PWRM+3.3V examines that between signal VFO F1 output circuit, to be also connected with resistance be the resistance R 6 of 470 ohm with returning.
Described comparator U1 selects LM211D type comparator.
Described optical coupler U2 selects PS9714 type optical coupler.
Described triode Q1 selects 9013 type triodes.
Compared with prior art, the beneficial effects of the utility model are: this contact input interface circuit of the utility model design, strong interference immunity, effectively filtering interfering pulse, and stable signal transmission.
Brief description of the drawings
Below in conjunction with the drawings and specific embodiments, the utility model is described in further detail.
Fig. 1 is structural representation of the present utility model.
Embodiment
Below in conjunction with accompanying drawing, the utility model is further described.
Embodiment
Contact input interface circuit as shown in Figure 1, comprise comparator U1, the pin BS of comparator U1, after being connected, pin BAL and pin VCC+ be connected with the capacitor C 2 of ground connection, the pin BS of described comparator U1 is also connected with resistance R 5 and the resistance R 6 of supply voltage+5V VSI and series connection, resistance R 5 one end are connected with the earth terminal of capacitor C 2, described resistance R 5 is connected the pin IN-of comparator U1 with the common port of resistance R 6, the pin VCC-of described comparator U1 is connected the earth terminal of capacitor C 2 with pin EO, the pin CO of described comparator U1 is connected with resistance R 7 and resistance R 8, resistance R 7 connects external power source+5V VSI, described resistance R 8 connects the base stage of NPN triode Q1, the grounded emitter of described NPN triode Q1, the collector electrode of described NPN triode Q1 connects indicator light circuit, described comparator U1 is also connected with input circuit.
Described input circuit comprises three-phase socket CN4 NVSI, the phase line NVSI+ of three-phase socket CN4 NVSI is serially connected with resistance R 1, resistance R 2 and resistance R 4, resistance R 4 is connected with the pin IN+ of comparator U1, the zero line NVSI-of described three-phase socket CN4 NVSI is connected with the VCC-of comparator U1, between described phase line NVSI+ and zero line NVSI-, go back and be connected to diode D1, diode D2 and resistance R 3, the anodic bonding phase line NVSI+ of described diode D1, the negative electrode of described diode D1 connects the negative electrode of diode D2, the anodic bonding zero line NVSI-of described diode D2, common port and resistance R 3 other ends that described resistance R 3 one end are connected to resistance R 2 and resistance R 4 are connected zero line NVSI-.
Between described resistance R 1 and resistance R 2, be also connected with diode D3, the anodic bonding R1 of diode D3, the negative electrode contact resistance R2 of described diode D3.
The pin VCC+ of described comparator U1 is also connected with the capacitor C 2 of ground connection.
Described indicator light circuit comprises LED NVSI+ circuit and LED NVSI-circuit, and LED NVSI+ circuit connects external power source+5V VSI by resistance R 9, described LED NVSI-circuit is all connected optical coupler U2 with the collector electrode of NPN triode Q1, the pin 2 of optical coupler U2 is connected with the collector electrode of NPN triode Q1 with LED NVSI-circuit, the pin 1 of described optical coupler U2 connects the capacitor C 3 of ground connection by resistance R 10, the common port of described resistance R 10 and capacitor C 3 is connected with external power source+5V VSI, the pin 4 of described optical coupler U2 is output circuit NVSI1, the pin 5 of described optical coupler U2 is connected with output circuit NVSI1 by resistance R 11, the pin 5 of described optical coupler U2 is also connected with comparison power supply PWRM+3.3V with the common port of resistance R 11, relatively power supply PWRM+3.3V is also connected with the capacitor C 4 of ground connection, the pin 3 of described optical coupler U2 is connected with the earth terminal of capacitor C 4.
Described comparator U1 model is LM211D, and the model of described optical coupler U2 is PS9714, and the model of described NPN triode Q1 is 9013.
The pin 1 of optical coupler U2 is Anode pin, and pin 2 is Cathode pin, and pin 3 is GND pin, and pin 4 is VO pin, and pin 5 is VCC pin, for simplifying the special numeral that adopts of accompanying drawing.
In the present embodiment, AC signal obtains low-voltage signal NVSI-V by resistance R 3 dividing potential drops by phase line NVSI+ again after diode D1 halfwave rectifier, supply voltage+5V VSI dividing potential drop is obtained reference level NVSI-Vref by resistance R 5 and R6, low-voltage signal NVSI-V and reference level NVSI-Vref are input to indicator light circuit LED NVSI-through NPN triode Q1 9013 after comparator U1 comparison operation, and export by optocoupler clutch.
D1, D2 in the present embodiment is for voltage stabilizing, ensure that low-voltage signal NVSI-V is stable, simultaneously capacitor C 1 and capacitor C 2 can filtering interference signals, can ensure the precision and stability of the output signal of comparator U1, the output signal of comparator U1 is amplified into indicator light circuit by NPN triode Q1, indicator light circuit is used to indicate the stability of signal, and optical coupler U2 receives NVSI-V signal and produces after photoelectric current output signal NVSI1 after resistance R 11 dividing potential drops and capacitor C 4 filtering.
Be as mentioned above embodiment of the present utility model.The utility model is not limited to above-mentioned execution mode, and anyone should learn the structural change of making under enlightenment of the present utility model, every with the utlity model has identical or close technical scheme, within all falling into protection range of the present utility model.
Claims (5)
1. contact input interface circuit, comprise comparator U1, it is characterized in that: the pin BS of comparator U1, after being connected, pin BAL and pin VCC+ be connected with the capacitor C 2 of ground connection, the pin BS of described comparator U1 is also connected with resistance R 5 and the resistance R 6 of supply voltage+5V VSI and series connection, resistance R 5 one end are connected with the earth terminal of capacitor C 2, described resistance R 5 is connected the pin IN-of comparator U1 with the common port of resistance R 6, the pin VCC-of described comparator U1 is connected the earth terminal of capacitor C 2 with pin EO, the pin CO of described comparator U1 is connected with resistance R 7 and resistance R 8, resistance R 7 connects external power source+5V VSI, described resistance R 8 connects the base stage of NPN triode Q1, the grounded emitter of described NPN triode Q1, the collector electrode of described NPN triode Q1 connects indicator light circuit, described comparator U1 is also connected with input circuit.
2. contact input interface circuit according to claim 1, it is characterized in that: described input circuit comprises three-phase socket CN4 NVSI, the phase line NVSI+ of three-phase socket CN4 NVSI is serially connected with resistance R 1, resistance R 2 and resistance R 4, resistance R 4 is connected with the pin IN+ of comparator U1, the zero line NVSI-of described three-phase socket CN4 NVSI is connected with the VCC-of comparator U1, between described phase line NVSI+ and zero line NVSI-, go back and be connected to diode D1, diode D2 and resistance R 3, the anodic bonding phase line NVSI+ of described diode D1, the negative electrode of described diode D1 connects the negative electrode of diode D2, the anodic bonding zero line NVSI-of described diode D2, common port and resistance R 3 other ends that described resistance R 3 one end are connected to resistance R 2 and resistance R 4 are connected zero line NVSI-.
3. contact input interface circuit according to claim 2, is characterized in that: between described resistance R 1 and resistance R 2, be also connected with diode D3, the anodic bonding R1 of diode D3, the negative electrode contact resistance R2 of described diode D3.
4. contact input interface circuit according to claim 1, is characterized in that: the pin VCC+ of described comparator U1 is also connected with the capacitor C 2 of ground connection.
5. contact input interface circuit according to claim 1, is characterized in that: described indicator light circuit comprises LED NVSI+ circuit and LED NVSI-circuit, and LED NVSI+ circuit connects external power source+5V VSI by resistance R 9, described LED NVSI-circuit is all connected optical coupler U2 with the collector electrode of NPN triode Q1, the pin 2 of optical coupler U2 is connected with the collector electrode of NPN triode Q1 with LED NVSI-circuit, the pin 1 of described optical coupler U2 connects the capacitor C 3 of ground connection by resistance R 10, the common port of described resistance R 10 and capacitor C 3 is connected with external power source+5V VSI, the pin 4 of described optical coupler U2 is output circuit NVSI1, the pin 5 of described optical coupler U2 is connected with output circuit NVSI1 by resistance R 11, the pin 5 of described optical coupler U2 is also connected with comparison power supply PWRM+3.3V with the common port of resistance R 11, relatively power supply PWRM+3.3V is also connected with the capacitor C 4 of ground connection, the pin 3 of described optical coupler U2 is connected with the earth terminal of capacitor C 4.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420124566.0U CN203827314U (en) | 2014-03-19 | 2014-03-19 | Contact input interface circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420124566.0U CN203827314U (en) | 2014-03-19 | 2014-03-19 | Contact input interface circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203827314U true CN203827314U (en) | 2014-09-10 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201420124566.0U Expired - Fee Related CN203827314U (en) | 2014-03-19 | 2014-03-19 | Contact input interface circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203827314U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103825600A (en) * | 2014-03-19 | 2014-05-28 | 成都引众数字设备有限公司 | Contact input interface circuit |
-
2014
- 2014-03-19 CN CN201420124566.0U patent/CN203827314U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103825600A (en) * | 2014-03-19 | 2014-05-28 | 成都引众数字设备有限公司 | Contact input interface circuit |
| CN103825600B (en) * | 2014-03-19 | 2016-08-17 | 成都引众数字设备有限公司 | A kind of contact input interface circuit |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140910 Termination date: 20150319 |
|
| EXPY | Termination of patent right or utility model |