CN203812186U - Microprocessor management circuit of self-powered microcomputer protection device - Google Patents
Microprocessor management circuit of self-powered microcomputer protection device Download PDFInfo
- Publication number
- CN203812186U CN203812186U CN201420257890.XU CN201420257890U CN203812186U CN 203812186 U CN203812186 U CN 203812186U CN 201420257890 U CN201420257890 U CN 201420257890U CN 203812186 U CN203812186 U CN 203812186U
- Authority
- CN
- China
- Prior art keywords
- circuit
- microprocessor
- power supply
- transistor
- output terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn - After Issue
Links
Landscapes
- Debugging And Monitoring (AREA)
- Electronic Switches (AREA)
Abstract
Disclosed is a microprocessor management circuit of a self-powered microcomputer protection device. The microprocessor management circuit comprises a watchdog timer and a power detection reset circuit, the output ends of the power detection reset circuit and the watchdog timer are respectively connected to two input ends of a first switching circuit, the output end of the first switching circuit is connected with a charging and discharging time delay circuit, the output of the charging and discharging time delay circuit is connected with a comparator, the output end of the comparator is connected with one input end of the power detection reset circuit through a second switching circuit, and the output end of the comparator is further connected with a microprocessor reset input end through an output circuit. By the microprocessor management circuit, synchronization of monitoring implementation of the microprocessor on states of an external power supply and a watchdog circuit is realized, misoperation caused by the fact that the states of a watchdog cannot be predicted by the microprocessor is avoided, active peripheral circuit management is realized based on a synchronization signal, and power consumption is reduced.
Description
Technical field
The utility model relates to a kind of microprocessor reset circuit, specifically a kind of self-powered microcomputer protecting device microprocessor management circuit.
Background technology
Microcomputer protector of electric power system; adopt embedded microprocessor technology; the detection of circuit electric current and voltage and breaker control, fault in switch cabinet equipment are judged, realize the functions such as fault actions and alarm, are the visual plants of electric system power transmission and distribution safe and reliable operation; A large amount of uses of ring main unit, constantly increased the demand of microcomputer protecting device in recent years, had promoted the development of self-powered microcomputer protecting device.So-called self-powered microcomputer protecting device is without external dedicated power supply; and current transformer by its access wherein one group of winding with certain output power realize power taking; self-powered microcomputer protecting device passes through electricity-getting mutual inductor; in the situation that primary system has load current; induce the electric current for powering; realize the power supply of protective device, the operation that maintains microcomputer protecting device realizes protection and the control of electric power primary system.
Because circuit primary side current is with the fluctuation of load, when its power supply instability, particularly line maintenance load excise, self-powered microcomputer protecting device just cannot obtain external power source, and microcomputer protecting device microprocessor dead electricity cannot be moved; In order to make the quick response external fault of microprocessor realize real time monitoring function, must make microprocessor keep operation, can not make microprocessor frequent starting because externally fed is interrupted.When a circuit is sent a telegram here suddenly, because of microprocessor, to restart the time long, and monitoring and protecting in time misses protection action moment.
Therefore the microprocessor of self-powered microcomputer protecting device must adopt battery backup powered operation mode, and microprocessor is after completing one-shot, by battery backup operation.When external power source has electricity, protective device is by external power source, and after external power source dead electricity, peripheral circuit loses power supply.Microprocessor, by powered battery, keeps operation.When primary system is sent a telegram here again, microprocessor can drop into monitoring and guard mode fast without restarting.
Electric system high reliability request makes the microprocessor of microcomputer protecting device need to adopt outside complete autonomous watchdog circuit to realize the requirement of the anti-deadlock of microcomputer protecting device.As Chinese utility model patent CN 101281414 B, name is called in < < controlled watchdog reset system > > has announced a kind of controlled watchdog reset system, comprise watchdog circuit and microprocessor, and be the system power supply of watchdog circuit and microprocessor power supply, between described watchdog circuit and microprocessor, be connected a buffer circuit, when system power supply normal power supply, buffer circuit is passed to microprocessor reset terminal by the reset signal of watchdog circuit resetting pin, and the feeding-dog signal of microprocessor I/O pin is passed to watchdog circuit hello dog pin, when system power supply power-off, described buffer circuit cut-off, cuts off contacting between watchdog circuit and microprocessor.Its effect, for having reduced system power dissipation, has improved the serviceable life of battery, has stopped the system reset problem that watchdog circuit delays work and causes simultaneously, has improved widely the reliability of system.
But the reset output of using NPN transistor Q2 to realize in this patent, when only having realized external power source Vcc and having electricity, reset and drop into, the Vcc isolation exit function that resets during without electricity, but and reset in power up and the dead electricity process problem of misoperation of unresolved external power source Vcc.And its ADM705 adopting completes after startup at Vcc, still export 200mS reset delay and the reset misoperation problem that produces.
Utility model content
For this reason, the utility model resets and drops into when solving and only to have realized external power source Vcc in prior art and have electricity, the Vcc isolation exit function that resets during without electricity, but and reset in power up and the dead electricity process problem of misoperation of unresolved external power source Vcc, thereby provide a kind of power on and dead electricity process in also there will not be misoperation, really realized the microprocessor management circuit of the reliability application of watchdog reset.
For solving the problems of the technologies described above, the utility model by the following technical solutions:
A microprocessor management circuit for self-powered microcomputer protecting device, comprises
Watch Dog Timer, removes output terminal with microprocessor house dog and is connected, and the clear signal that microprocessor sends triggers Watch Dog Timer zero clearing, and overtime when described Watch Dog Timer, it exports reset signal;
Power supply monitoring reset circuit, its external external power source, its output terminal detects input end with described Watch Dog Timer and power supply of microprocessor respectively and is connected, when external power source reaches threshold value, out-put supply useful signal, when external power source is during lower than threshold value, out-put supply invalid signals;
The output terminal of described power supply monitoring reset circuit and Watch Dog Timer is connected respectively two input ends of the first on-off circuit, the output terminal connection of described the first on-off circuit discharges and recharges delay circuit, the described output that discharges and recharges delay circuit connects comparer, the output terminal of described comparer is connected with an input end of described power supply monitoring reset circuit by second switch circuit, and the output terminal of described comparer is also connected with microprocessor the RESET input by output circuit.
Preferably, described the first on-off circuit comprises transistor Q1 and resistance R 2, the gate pole of described transistor Q1 is connected with the output terminal of described Watch Dog Timer by resistance R 2, the source electrode of described transistor Q1 is connected with the output terminal of described power supply monitoring reset circuit, the drain electrode of described transistor Q1 with described in discharge and recharge delay circuit input end be connected.
Preferably, described in discharge and recharge delay circuit and comprise resistance R in parallel 1 and capacitor C 1, an one point ground connection in parallel, another point in parallel is connected to the drain electrode of described transistor Q1 and the input end of described comparer.
Preferably, described second switch circuit comprises resistance R 6 and transistor Q3, and the output terminal of described comparer is connected to the gate pole of transistor Q3 by resistance R 6, the source ground of described transistor Q3, and its drain electrode is connected with the input end of described power supply monitoring reset circuit.
Preferably, described output circuit comprises resistance R 3, R4 and transistor Q2, one end of resistance R 3 is connected with the output terminal of described comparer, the other end of described resistance R 3 is connected with the gate pole of transistor Q2, the source electrode of described transistor Q2 is connected with its gate leve by resistance R 4, the source electrode of described transistor Q2 is ground connection also, and the drain electrode of described transistor Q2 is connected with microprocessor the RESET input.
Preferably, the link that described power supply monitoring reset circuit and described power supply of microprocessor detect input end is also by resistance R 5 ground connection.
Preferably, described Watch Dog Timer, described power supply monitoring reset circuit and the integrated integrated circuit that is set to of described comparer.
Preferably, described external power source is connected with the input end of power supply monitoring reset circuit by diode.
Technique scheme of the present utility model has the following advantages compared to existing technology:
(1) self-powered microcomputer protecting device microprocessor management circuit described in the utility model, comprise that Watch Dog Timer and power supply detect reset circuit, the output terminal of described power supply monitoring reset circuit and Watch Dog Timer is connected respectively two input ends of the first on-off circuit, the output terminal connection of described the first on-off circuit discharges and recharges delay circuit, the described output that discharges and recharges delay circuit connects comparer, the output terminal of described comparer is connected with an input end of described power supply monitoring reset circuit by second switch circuit, the output terminal of described comparer is also connected with microprocessor the RESET input by output circuit.When having realized external power source and having had electricity higher than threshold value, the reset signal of Watch Dog Timer sends to microprocessor from logic-enabled circuit, realize and resetting, when external power source does not have electricity, be that external power source is lower than threshold value, described power supply monitoring reset circuit out-put supply invalid signals, can not meet the logic output condition of described logic-enabled circuit, therefore the reset signal conductively-closed of described watchdog circuit, avoid external power source to power on and reset misoperation that dead electricity process produces, and the reset misoperation problem of using general watchdog circuit to cause due to one section of time-delay reset after power supply electrifying, simultaneously, described power supply monitoring reset circuit is connected with microprocessor, the external power source of synchronizeing with watchdog circuit useful signal is provided, realized synchronous to the implementing monitoring of outside power supply status and watchdog circuit of microprocessor, the misoperation of having avoided microprocessor cannot predict house dog state and having caused, and based on this synchronizing signal, realize active peripheral circuit management, power-dissipation-reduced function.
(2) self-powered microcomputer protecting device microprocessor management circuit described in the utility model; described Watch Dog Timer, described power supply monitoring reset circuit and the integrated integrated circuit that is set to of described comparer; by adopting general integrated circuit; can make the utility model circuit more microminiaturized; save space, be convenient to and the integrated setting of other circuit.
Accompanying drawing explanation
For content of the present utility model is more likely to be clearly understood, according to specific embodiment of the utility model also by reference to the accompanying drawings, the utility model is described in further detail, wherein below
Fig. 1 is a kind of structured flowchart of an embodiment of the utility model;
Fig. 2 is a kind of circuit structure block diagram of an embodiment of the utility model.
Embodiment
The embodiment of self-powered microcomputer protecting device microprocessor management circuit described in the utility model is provided below.
embodiment 1
Self-powered microcomputer protecting device microprocessor management circuit described in the utility model, as shown in Figure 1, comprise Watch Dog Timer, described Watch Dog Timer adopts general Watch Dog Timer, removing output terminal with microprocessor house dog is connected, the rising edge of the clear signal that microprocessor sends and negative edge trigger Watch Dog Timer zero clearing, when described Watch Dog Timer overtime, it exports reset signal, in the present embodiment, described reset signal is low level signal, recovers high level after Watch Dog Timer is eliminated; Power supply monitoring reset circuit, its external external power source, its output terminal is connected with the IO interface of described Watch Dog Timer and microprocessor respectively, when external power source reaches predefined threshold value, its out-put supply useful signal, in the present embodiment, power supply useful signal is high level, when external power source is during lower than threshold value, out-put supply invalid signals, described power supply invalid signals is low level.The output terminal of described power supply monitoring reset circuit and Watch Dog Timer is connected respectively two input ends of the first on-off circuit, the output terminal connection of described the first on-off circuit discharges and recharges delay circuit, the described output that discharges and recharges delay circuit connects comparer, the output terminal of described comparer is connected with an input end of described power supply monitoring reset circuit by second switch circuit, and the output terminal of described comparer is also connected with microprocessor the RESET input by output circuit.
When the utility model has been realized external power source and has been had electricity higher than threshold value, the reset signal of Watch Dog Timer sends to microprocessor from logic-enabled circuit, realize and resetting, when external power source does not have electricity, be that external power source is lower than threshold value, described power supply monitoring reset circuit out-put supply invalid signals, can not meet the logic output condition of described logic-enabled circuit, therefore the reset signal conductively-closed of described watchdog circuit, avoid external power source to power on and reset misoperation that dead electricity process produces, and the reset misoperation problem of using general watchdog circuit to cause due to one section of time-delay reset after power supply electrifying, simultaneously, described power supply monitoring reset circuit is connected with microprocessor, the external power source of synchronizeing with watchdog circuit useful signal is provided, realized synchronous to the implementing monitoring of outside power supply status and watchdog circuit of microprocessor, the misoperation of having avoided microprocessor cannot predict house dog state and having caused, and based on this synchronizing signal, realize active peripheral circuit management, power-dissipation-reduced function.
embodiment 2
On the basis of the self-powered microcomputer protecting device microprocessor management circuit described in embodiment 1, as shown in Figure 2, in an embodiment, described Watch Dog Timer, the integrated integrated circuit that is set to of described power supply monitoring reset circuit and described comparer, typically there are MAX706 (3.3V system is used) or MAX705 (5V system is used), in the present embodiment, adopt MAX706 chip, the input/output terminal that is included in the circuit in chip adopts the pin of MAX706 chip, the WDI end of described MAX706 chip is the input end of described Watch Dog Timer, it is connected with the universal I/O pin of microprocessor, the house dog feeding-dog signal of described IO pin output pulsed, utilize the rising edge of this signal and the zero clearing that negative edge is realized Watch Dog Timer, the WDO end of described MAX706 chip is the output terminal of described Watch Dog Timer, WDO end output high level after described Watch Dog Timer starts, and in timing course, keep high level, when described Watch Dog Timer overtime, WDO holds output low level, and keep low level, until be eliminated, after described Watch Dog Timer is eliminated, WDO end recovers to keep high level.External power source EVcc is connected with the power supply input pin Vcc of described MAX706 chip by diode D3, gives chip power supply, and another external power source EVcc returns microprocessor power supply, makes MAX706 chip and microprocessor have identical voltage.
The RESET end of MAX706 chip is as power supply monitoring reset circuit output terminal, and its level state shows that whether external power source is effective.RESET end output high level shows that external power source reaches threshold value (if MAX706S is 2.93V) and reliable and stable (RESET end is through just exporting high level after the delay confirmation of 200ms), and RESET holds after power supply low pressure threshold, immediately output low level.As the indication of external power source state, reliable in real time with the RESET end output of MAX706.Access microprocessor is convenient to program and is responded in time.The RESET end of MAX706 is gone back one end of contact resistance R5, the other end ground connection of described resistance R 5, described RESET end is realized drop-down by resistance R 5, resistance R 5 value 10k ohms are between 100k ohm, to guarantee that circuit is under dead electricity quits work situation, this pin keeps low level, avoids microprocessor erroneous judgement, the GND end ground connection of described MAX706 chip.
The first on-off circuit described in the present embodiment comprises transistor Q1 and resistance R 2, the gate pole of described transistor Q1 is connected with the output terminal WDO of described Watch Dog Timer by resistance R 2, the source electrode of described transistor Q1 is connected with the output terminal RESET of described power supply monitoring reset circuit, the drain electrode of described transistor Q1 with described in discharge and recharge delay circuit input end be connected.The described delay circuit that discharges and recharges comprises resistance R in parallel 1 and capacitor C 1, an one point ground connection in parallel, and another point in parallel is connected to the drain electrode of described transistor Q1 and the input end of described comparer.Above-mentioned resistance R 1 and capacitor C 1 forms discharges and recharges delay circuit, for producing the reset signal of microprocessor, keep a period of time (this time length have resistance R and capacitor C definite, time constant t=R*C).
The output terminal of described comparer is connected with the input end of power supply monitoring reset circuit by second switch circuit, second switch circuit herein comprises resistance R 6 and transistor Q3, the output terminal of described comparer is connected to the gate pole of transistor Q3 by resistance R 6, the source ground of described transistor Q3, its drain electrode is connected with the input end MR of described power supply monitoring reset circuit.The output terminal of described comparer also accesses the RESET input of microprocessor by output circuit, described output circuit comprises resistance R 3, R4 and transistor Q2, one end of resistance R 3 is connected with the output terminal of described comparer, the other end of described resistance R 3 is connected with the gate pole of transistor Q2, the source electrode of described transistor Q2 is connected with its gate leve by resistance R 4, the source electrode of described transistor Q2 is ground connection also, and the drain electrode of described transistor Q2 is connected with microprocessor the RESET input.Described power supply monitoring reset circuit and described power supply of microprocessor detect the link of input end also by resistance R 5 ground connection.
As shown in Figure 2, wherein transistor Q1, Q2, Q3 are metal-oxide half field effect transistor (Metal-Oxide-Semiconductor Field-Effect Transistor, MOSFET).
Self-powered microcomputer protecting device microprocessor management circuit working flow process in the present embodiment is as follows:
(1) initialization state:
Power supply normal power supply externally, reach the threshold voltage of power supply monitoring (if MAX705 is 4.9V, MAX706 is 3.0V), this monitoring reset circuit output high level, Watch Dog Timer is started working from 0, Watch Dog Timer does not have when overtime in timing, its output WDO keeps high level, now on-off circuit (the preferably mosfet transistor of P raceway groove) cuts out, the output termination capacitor C 1 of switch and resistance R 1 parallel connection discharge and recharge delay circuit, because on-off circuit cuts out, capacitor C 1 is discharged over the ground by resistance R 1, and remain 0, therefore comparer is output as low level.The mosfet transistor Q3 of the low level output driving N raceway groove of comparer, transistor is turn-offed, and drain electrode output meets the input pin MR of power supply monitoring reset circuit, because drain electrode output is turn-offed, therefore MR pin is high level, can not produce any effect to reset circuit.In a word under above-mentioned original state, power supply supervisory circuit is externally exported high level under normal power supply, the normal timing output of house dog high level, by the on-off circuit of these two control, keeping the resistance capacitance of shutoff, R1 and C1 to discharge and recharge delay circuit remains switch output to press for 0 zero point, make comparer be output as low level, by Q3, being applied to MR, is high level, can not exert an influence to monitoring reset circuit.Therefore under original state, it is stable that this circuit keeps, and do not produce any reset signal.
Therefore foregoing circuit keeps stable, as long as timing microprocessor is removed Watch Dog Timer, does not make it overtime, can not excite any reset signal, that circuit remains is stable.
(2) house dog is overtime: when extremely, can not move in time and remove house dog program appears in microprocessor, cause Watch Dog Timer timing overtime.Now, the output terminal WDO output low level of Watch Dog Timer, the gate pole of the on-off circuit of described employing MOSFET is dragged down, and switch is opened, and makes output and capacitor C 1 conducting of Power Supply Monitoring reset circuit, directly C1 is carried out to rapid charge.When the voltage on C1 surpasses the voltage threshold (being typically 1.25V) of voltage comparator, the output high level of comparer, and drive Q3, make drain electrode and the source electrode of Q3 be conducting to ground, the input MR pin of the power supply monitoring reset circuit being therefore attached thereto is dragged down, reset circuit is triggered by MR input, output reset low level signal.MR pin come low in, the output PFO driven MOS FET Q2 of comparer, produces and can cause the low level that microprocessor resets in the drain electrode of Q2, and microprocessor is reset.Because MR is moved to low level by Q3, trigger power supply monitoring reset circuit output low level, trigger Watch Dog Timer simultaneously and be cleared, output WDO is set to high level, and the on-off circuit of simultaneously being controlled by power supply monitoring reset and house dog output is so closed.Now, capacitor C 1 starts to start electric discharge by resistance R 1.Initial voltage in capacitor C 1 is the high level voltage of power supply monitoring reset output RESET, (high level of 3.3V power supply is 3.3V, and the high level of 5V power supply is 5V).Capacitor C 1, along with electric discharge, is started to reduce by high level voltage, and the time constant that the speed of its reduction consists of R1 and C1 is determined, controls this time constant, can regulate discharge time.When the voltage on C1 drops to the threshold voltage (1.25V typical case) of comparer, the output of comparer becomes low level, the low level output of comparer, Q2 and Q3 transistor will be closed simultaneously, power supply monitoring is resetted and input MR recovery high level, its reset circuit is exported corresponding recovery high level, and Q2 outputs to the also recovery high level of untreated reset simultaneously, stops microprocessor resetting.Now microprocessor recovery work, foregoing circuit recovers again initialization state of describing in (1), has described once complete microprocessor, owing to not removing in time house dog, the overtime reseting procedure causing occurs in these (2).
Obviously, above-described embodiment is only for example is clearly described, and the not restriction to embodiment.For those of ordinary skill in the field, can also make other changes in different forms on the basis of the above description.Here exhaustive without also giving all embodiments.And among the protection domain that the apparent variation of being extended out thus or change are still created in the utility model.
Claims (8)
1. a microprocessor management circuit for self-powered microcomputer protecting device, is characterized in that, comprises
Watch Dog Timer, removes output terminal with microprocessor house dog and is connected, and the clear signal that microprocessor sends triggers Watch Dog Timer zero clearing, and overtime when described Watch Dog Timer, it exports reset signal;
Power supply monitoring reset circuit, its external external power source, its output terminal detects input end with described Watch Dog Timer and power supply of microprocessor respectively and is connected, when external power source reaches threshold value, out-put supply useful signal, when external power source is during lower than threshold value, out-put supply invalid signals;
The output terminal of described power supply monitoring reset circuit and Watch Dog Timer is connected respectively two input ends of the first on-off circuit, the output terminal connection of described the first on-off circuit discharges and recharges delay circuit, the described output that discharges and recharges delay circuit connects comparer, the output terminal of described comparer is connected with an input end of described power supply monitoring reset circuit by second switch circuit, and the output terminal of described comparer is also connected with microprocessor the RESET input by output circuit.
2. microprocessor management circuit according to claim 1, it is characterized in that, described the first on-off circuit comprises transistor Q1 and resistance R 2, the gate pole of described transistor Q1 is connected with the output terminal of described Watch Dog Timer by resistance R 2, the source electrode of described transistor Q1 is connected with the output terminal of described power supply monitoring reset circuit, the drain electrode of described transistor Q1 with described in discharge and recharge delay circuit input end be connected.
3. microprocessor management circuit according to claim 2, it is characterized in that, the described delay circuit that discharges and recharges comprises resistance R in parallel 1 and capacitor C 1, an one point ground connection in parallel, and another point in parallel is connected to the drain electrode of described transistor Q1 and the input end of described comparer.
4. microprocessor management circuit according to claim 3, it is characterized in that, described second switch circuit comprises resistance R 6 and transistor Q3, the output terminal of described comparer is connected to the gate pole of transistor Q3 by resistance R 6, the source ground of described transistor Q3, its drain electrode is connected with the input end of described power supply monitoring reset circuit.
5. microprocessor management circuit according to claim 4, it is characterized in that, described output circuit comprises resistance R 3, R4 and transistor Q2, one end of resistance R 3 is connected with the output terminal of described comparer, the other end of described resistance R 3 is connected with the gate pole of transistor Q2, the source electrode of described transistor Q2 is connected with its gate leve by resistance R 4, and the source electrode of described transistor Q2 is ground connection also, and the drain electrode of described transistor Q2 is connected with microprocessor the RESET input.
6. microprocessor management circuit according to claim 5, is characterized in that, described power supply monitoring reset circuit and described power supply of microprocessor detect the link of input end also by resistance R 5 ground connection.
7. according to the microprocessor management circuit described in claim 1-6 any one, it is characterized in that described Watch Dog Timer, described power supply monitoring reset circuit and the integrated integrated circuit that is set to of described comparer.
8. according to the microprocessor management circuit described in claim 1-6 any one, it is characterized in that, described external power source is connected with the input end of power supply monitoring reset circuit by diode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420257890.XU CN203812186U (en) | 2014-05-20 | 2014-05-20 | Microprocessor management circuit of self-powered microcomputer protection device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420257890.XU CN203812186U (en) | 2014-05-20 | 2014-05-20 | Microprocessor management circuit of self-powered microcomputer protection device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203812186U true CN203812186U (en) | 2014-09-03 |
Family
ID=51450913
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201420257890.XU Withdrawn - After Issue CN203812186U (en) | 2014-05-20 | 2014-05-20 | Microprocessor management circuit of self-powered microcomputer protection device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203812186U (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103941837A (en) * | 2014-05-20 | 2014-07-23 | 浙江知祺电力自动化有限公司 | Microprocessor management circuit of self-powered microprocessor protection device |
| CN104539274A (en) * | 2014-12-31 | 2015-04-22 | 广东志高空调有限公司 | Reset circuit and WiFi communication system |
| CN108120859A (en) * | 2017-12-29 | 2018-06-05 | 国网江苏省电力有限公司检修分公司 | A kind of active electric magnetic screen generating means |
| CN110089200A (en) * | 2016-12-15 | 2019-08-02 | 欧姆龙株式会社 | Navigation lamp control system, illuminating lamp control system and switch unit |
-
2014
- 2014-05-20 CN CN201420257890.XU patent/CN203812186U/en not_active Withdrawn - After Issue
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103941837A (en) * | 2014-05-20 | 2014-07-23 | 浙江知祺电力自动化有限公司 | Microprocessor management circuit of self-powered microprocessor protection device |
| CN103941837B (en) * | 2014-05-20 | 2017-08-11 | 浙江知祺电力自动化有限公司 | A kind of self-powered microcomputer protecting device microprocessor management circuit |
| CN104539274A (en) * | 2014-12-31 | 2015-04-22 | 广东志高空调有限公司 | Reset circuit and WiFi communication system |
| CN104539274B (en) * | 2014-12-31 | 2017-12-05 | 广东志高空调有限公司 | A kind of reset circuit and WiFi communication system |
| CN110089200A (en) * | 2016-12-15 | 2019-08-02 | 欧姆龙株式会社 | Navigation lamp control system, illuminating lamp control system and switch unit |
| CN108120859A (en) * | 2017-12-29 | 2018-06-05 | 国网江苏省电力有限公司检修分公司 | A kind of active electric magnetic screen generating means |
| CN108120859B (en) * | 2017-12-29 | 2024-04-12 | 国网江苏省电力有限公司检修分公司 | Active electromagnetic shielding generating device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103885563A (en) | Management circuit for self-powered microprocessor protection device microprocessor | |
| CN203812186U (en) | Microprocessor management circuit of self-powered microcomputer protection device | |
| CN103647313B (en) | Charging control circuit | |
| CN102756701B (en) | Power delay system for automobile electric control unit | |
| CN106300638A (en) | A kind of low-voltage power down overrun control and control method | |
| CN106484061A (en) | Terminal resets control method, controller and system | |
| CN103561167A (en) | Device, method and terminal equipment for restarting after dead halt | |
| CN203746007U (en) | Microprocessor management circuit for self-powered microprocessor protection device | |
| WO2017020782A1 (en) | Battery charging and discharging control circuit and battery charging and discharging system | |
| CN102437554A (en) | Battery protection method and circuit of vehicle-mounted equipment | |
| CN109980722B (en) | Power supply control device | |
| CN110797946A (en) | Battery pack charging and discharging protection system | |
| CN109491287A (en) | A kind of method, control equipment and the microwave sensor of operating mode switching | |
| US20190222035A1 (en) | Battery charging cut-off circuit | |
| CN101299618B (en) | Real-time clock circuit of smart phone | |
| CN214900648U (en) | Power management chip and switching power supply management system | |
| CN103941837A (en) | Microprocessor management circuit of self-powered microprocessor protection device | |
| CN202474832U (en) | Storage battery protective circuit for vehicle-mounted device | |
| CN104914966B (en) | A kind of single-chip microcontroller Self-disconnecting restarts circuit | |
| CN206481214U (en) | Switching Power Supply soft-start circuit | |
| CN205051670U (en) | Fall electricity from opening control circuit | |
| CN106787667A (en) | Switching Power Supply soft-start circuit and control method | |
| CN218415878U (en) | Charging wake-up device, battery and system | |
| CN204046218U (en) | A kind of energy-saving elevated piezoelectric battery circuit | |
| CN110797930B (en) | Equipment control method, device, system and computer storage medium |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned | ||
| AV01 | Patent right actively abandoned |
Granted publication date: 20140903 Effective date of abandoning: 20170811 |