CN203787956U - Surge voltage suppression circuit - Google Patents
Surge voltage suppression circuit Download PDFInfo
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- CN203787956U CN203787956U CN201420200203.0U CN201420200203U CN203787956U CN 203787956 U CN203787956 U CN 203787956U CN 201420200203 U CN201420200203 U CN 201420200203U CN 203787956 U CN203787956 U CN 203787956U
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Abstract
The utility model discloses a surge voltage suppression circuit which comprises a power protection chip U1, a filtration and voltage stabilization unit, an MOS tube Q1, an audion Q2, an undervoltage overvoltage protection unit and a resistance voltage division unit. Power voltage is connected into the input end of the filtration and voltage stabilization unit, the output end of the filtration and voltage stabilization unit is connected to a base of the audion Q2, an emitter of the audion Q2 is connected to the power protection chip U1 through the undervoltage overvoltage protection unit, and a collector of the audion Q2 is connected to a grid of the MOS tube Q1 through a current-limiting resistor R. Suppression of power supply surge voltage is achieved through the power protection chip U1, surge voltage or impulse voltage can be effectively controlled within a safety range and is prevented from damaging circuit components and devices, safety performance of automation equipment is improved, and safe and reliable operation of the automation equipment is guaranteed.
Description
Technical field
The utility model relates to circuit control technology field, particularly a kind of surge voltage-suppressing circuit.
Background technology
In the military power consumption equipment system such as airborne, carrier-borne, vehicle-mounted, due to reasons such as engine start, switch or electrical source exchanges, usually can produce instantaneous spike or surge voltage, for example, when direct current 6V relay coil disconnects, there will be the surge voltage of 300V～600V; In the time connecting large-scale capacitive load as compensation condenser group, often there will be large surge current to impact, supply voltage is reduced suddenly; In the time cutting off no-load transformer, also there will be the overvoltage up to 8～10 times of rated voltages.
Nowadays, the integrated degree of electronic equipment is improving constantly, but it is resisted surge voltage ability and is but declining, surge voltage phenomenon is on the rise and damages circuit and parts thereof, jeopardize automation equipment trouble free service, eliminate surge noise and disturb, prevent that swell damage from being the key problem that is related to automation equipment safe and reliable operation always.
Utility model content
The utility model proposes a kind of surge voltage-suppressing circuit, within can be effectively surge voltage or pulse voltage being controlled to safe range, prevent the damage to circuit elements device and equipment of surge voltage or pulse voltage.
For realizing above-mentioned utility model object, the utility model adopts following technical scheme:
A kind of surge voltage-suppressing circuit, comprise power protection chip U1, filtering voltage regulation unit, metal-oxide-semiconductor Q1, triode Q2, under-voltage Overvoltage protecting unit and electric resistance partial pressure unit, the input access supply voltage of described filtering voltage regulation unit, the output of described filtering voltage regulation unit is connected in the base stage of described triode Q2, the emitter of described triode Q2 is connected in power protection chip U1 by under-voltage Overvoltage protecting unit, the collector electrode of described triode Q2 is connected in the grid of metal-oxide-semiconductor Q1 by current-limiting resistance R, the door pin of described power protection chip U1 is connected in the drain electrode of described metal-oxide-semiconductor Q1 by the first resistance R 1, the source electrode of described metal-oxide-semiconductor Q1 is connected in the output pin of described power protection chip U1 by the second resistance R 2, output pin and dividing potential drop that described electric resistance partial pressure unit is connected in described power protection chip U1 arrange pin, the clock timing pin of described power protection chip U1 is by the 4th capacitor C 4 ground connection.
Further, in above-mentioned surge voltage-suppressing circuit, described filtering voltage regulation unit specifically comprises the first capacitor C 1, the 3rd resistance R 3, the 4th resistance R 4, the 5th resistance R 5, the first voltage-stabiliser tube ZD1, the second voltage-stabiliser tube ZD2 and diode D, the two ends of described the first capacitor C 1 are connected between supply voltage and ground, one end of described the 3rd resistance R 3 is connected in supply voltage, the other end is connected in the negative pole of the first voltage-stabiliser tube ZD1, the plus earth of described the first voltage-stabiliser tube ZD1; One end of described the 4th resistance R 4 is connected in the negative pole of described the first voltage-stabiliser tube ZD1, the other end is connected in the negative pole of the second voltage-stabiliser tube ZD2 and the positive pole of diode D, the plus earth of described the second voltage-stabiliser tube ZD2, the negative pole of described diode D is connected in the base stage of described triode Q2, the negative pole of described diode D is also connected in the negative pole of described the first voltage-stabiliser tube ZD1, described the 5th resistance R 5 one end are connected in supply voltage, and the other end is connected in the negative pole of described the second voltage-stabiliser tube ZD2.
Further, in above-mentioned surge voltage-suppressing circuit, described under-voltage Overvoltage protecting unit comprises the second capacitor C 2, the 6th resistance R 6 and the 7th resistance R 7, after the power pins of described power protection chip U1 is in parallel with shutoff pin, be connected in the emitter of described triode Q2, one end of described the second capacitor C 2 is connected in the emitter of triode Q2, other end ground connection; Described the 6th resistance R 6 one end are connected in the emitter of described triode Q2; the other end is connected in the under-voltage pin of power protection chip U1; one end of described the 7th resistance R 7 is connected in the under-voltage pin of power protection chip U1; the other end is connected in the overvoltage pin of power protection chip U1, the overvoltage pin ground connection of described power protection chip U1.
Further, in above-mentioned surge voltage-suppressing circuit, described electric resistance partial pressure unit comprises the 8th resistance R 8 and the 9th resistance R 9, one end of described the 8th resistance R 8 is connected in the output pin of described power protection chip U1, and the dividing potential drop that the other end is connected in described power protection chip U1 arranges pin; The dividing potential drop that one end of described the 9th resistance R 9 is connected in described power protection chip U1 arranges pin, other end ground connection.
Further; in above-mentioned surge voltage-suppressing circuit; one end of described the second resistance R 2 is connected in the source electrode of metal-oxide-semiconductor Q1 and the current detecting input pin of power protection chip U1, and the other end of described the second resistance R 2 is connected in the output pin of described power protection chip U1.
Further, in above-mentioned surge voltage-suppressing circuit, the output pin of described power protection chip U1 is also by the 3rd capacitor C 3 ground connection.
Further, in above-mentioned surge voltage-suppressing circuit, described triode Q2 is NPN type triode.
Further, in above-mentioned surge voltage-suppressing circuit, described metal-oxide-semiconductor Q1 is N-channel MOS pipe.
Further, in above-mentioned surge voltage-suppressing circuit, the model of described power protection chip U1 is LT4363DE-2.
The utility model surge voltage-suppressing circuit has been realized the inhibition of power voltage surge by power protection chip U1; within can be effectively surge voltage or pulse voltage being controlled to safe range; prevent the damage to circuit elements device and equipment of surge voltage or pulse voltage; improve the security performance of automation equipment, ensured automation equipment safe and reliable operation.
Brief description of the drawings
Fig. 1 is the schematic diagram of the utility model surge voltage-suppressing circuit.
Embodiment
In order to make the purpose of this utility model, technical scheme and advantage clearer, below in conjunction with drawings and Examples, the utility model is further elaborated.Should be appreciated that specific embodiment described herein is only in order to explain the utility model, and be not used in restriction the utility model.
Refer to Fig. 1, the utility model surge voltage-suppressing circuit comprises power protection chip U1, filtering voltage regulation unit 1, metal-oxide-semiconductor Q1, triode Q2, under-voltage Overvoltage protecting unit 2 and electric resistance partial pressure unit 3, the input access supply voltage (Vin) of described filtering voltage regulation unit 1, the output of described filtering voltage regulation unit 1 is connected in the base stage of described triode Q2, the emitter of described triode Q2 is connected in power protection chip U1 by under-voltage Overvoltage protecting unit 2, the collector electrode of described triode Q2 is connected in the grid of metal-oxide-semiconductor Q1 by current-limiting resistance R, the door pin (GATE pin) of described power protection chip U1 is connected in the drain electrode of described metal-oxide-semiconductor Q1 by the first resistance R 1, the source electrode of described metal-oxide-semiconductor Q1 is connected in the output pin (OUT pin) of described power protection chip U1 by the second resistance R 2, output pin and dividing potential drop that described electric resistance partial pressure unit 3 is connected in described power protection chip U1 arrange pin (FB pin), the clock timing pin (TMR pin) of described power protection chip U1 is by the 4th capacitor C 4 ground connection.
Wherein, described triode Q2 is NPN type triode, and described metal-oxide-semiconductor Q1 is N-channel MOS pipe, and the model of described power protection chip U1 is LT4363DE-2, and it can protect load to exempt from the damage of high-voltage transient.
Described filtering voltage regulation unit 1 specifically comprises the first capacitor C 1, the 3rd resistance R 3, the 4th resistance R 4, the 5th resistance R 5, the first voltage-stabiliser tube ZD1, the second voltage-stabiliser tube ZD2 and diode D, the two ends of described the first capacitor C 1 are connected between supply voltage (Vin) and ground, one end of described the 3rd resistance R 3 is connected in supply voltage, the other end is connected in the negative pole of the first voltage-stabiliser tube ZD1, the plus earth of described the first voltage-stabiliser tube ZD1; One end of described the 4th resistance R 4 is connected in the negative pole of described the first voltage-stabiliser tube ZD1, the other end is connected in the negative pole of the second voltage-stabiliser tube ZD2 and the positive pole of diode D, the plus earth of described the second voltage-stabiliser tube ZD2, the negative pole of described diode D is connected in the base stage of described triode Q2, the negative pole of described diode D is also connected in the negative pole of described the first voltage-stabiliser tube ZD1, described the 5th resistance R 5 one end are connected in supply voltage, and the other end is connected in the negative pole of described the second voltage-stabiliser tube ZD2.
Described under-voltage Overvoltage protecting unit 2 comprises the second capacitor C 2, the 6th resistance R 6 and the 7th resistance R 7, after the power pins (VCC pin) of described power protection chip U1 is in parallel with shutoff pin (SHDN pin), be connected in the emitter of described triode Q2, one end of described the second capacitor C 2 is connected in the emitter of triode Q2, other end ground connection; Described the 6th resistance R 6 one end are connected in the emitter of described triode Q2; the other end is connected in the under-voltage pin (UV pin) of power protection chip U1; one end of described the 7th resistance R 7 is connected in the under-voltage pin of power protection chip U1; the other end is connected in the overvoltage pin (OV pin) of power protection chip U1, the overvoltage pin ground connection of described power protection chip U1.
One end of described the second resistance R 2 is connected in the source electrode of metal-oxide-semiconductor Q1 and the current detecting input pin (SNS pin) of power protection chip U1, and the other end of described the second resistance R 2 is connected in the output pin (OUT pin) of described power protection chip U1.The output pin of described power protection chip U1 is also by the 3rd capacitor C 3 ground connection.
Described electric resistance partial pressure unit 3 comprises the 8th resistance R 8 and the 9th resistance R 9, and one end of described the 8th resistance R 8 is connected in the output pin of described power protection chip U1, and the dividing potential drop that the other end is connected in described power protection chip U1 arranges pin (FB pin); The dividing potential drop that one end of described the 9th resistance R 9 is connected in described power protection chip U1 arranges pin, other end ground connection.
The operation principle of the utility model surge voltage-suppressing circuit is as follows:
Under power supply normal operating conditions; the supply voltage Vin(of input is no more than 100V) undertaken providing clamping voltage VCC(80V by the 3rd resistance R 3, the 4th resistance R 4, diode D and triode Q2 to power protection chip U1 after filtering by the first capacitor C 1); described metal-oxide-semiconductor Q1 normally; now, electric power output voltage Vout exports in normal range (NR).
In the time there is electrical source exchange or load dump, will produce instantaneous surge supply voltage (being greater than 100V), this surge supply voltage passes through, after the 3rd resistance R 3, the 4th resistance R 4 and the first voltage-stabiliser tube ZD1, the second voltage-stabiliser tube ZD2 voltage stabilizing, to make the clamping voltage VCC of power protection chip U1 remain on 80V; Now; the duty ratio of adjustment doors pin (GATE pin) output voltage in the time that described power protection chip U1 sets according to its clock timing pin (TMR pin); thereby make metal-oxide-semiconductor Q1 conducting lentamente; and; the voltage that described power protection chip U1 sets according to electric resistance partial pressure unit 3; for example, by electric power output voltage Vout clamper (36V) within the scope of security value (s), thus make to load on occur when surge voltage can be safely, work smoothly, exempt from the damage of high-voltage transient.
Described power protection chip U1 also detects the pressure drop between input pin (SNS pin) and output pin (OUT pin) by the second resistance R 2 monitor current, to prevent from suffering the impact of over current fault.
Described power protection chip U1 also monitors overvoltage (OV) and under-voltage (UV) situation of input power by two precision comparators (being connected in UV pin and OV pin).When the supply voltage value of input is during lower than UV thresholding, metal-oxide-semiconductor Q1 keeps off state; When input supply voltage value is higher than OV thresholding, do not allow metal-oxide-semiconductor Q1 to reclose.
Than prior art; the utility model surge voltage-suppressing circuit has been realized the inhibition of power voltage surge by power protection chip U1; within can be effectively surge voltage or pulse voltage being controlled to safe range; prevent the damage to circuit elements device and equipment of surge voltage or pulse voltage; improve the security performance of automation equipment, ensured automation equipment safe and reliable operation.
Here description of the present utility model and application is illustrative, not wants scope of the present utility model to limit in the above-described embodiments.Here the distortion of disclosed embodiment and change is possible, and for those those of ordinary skill in the art, the various parts of the replacement of embodiment and equivalence are known.Those skilled in the art are noted that in the situation that not departing from spirit of the present utility model or substantive characteristics, and the utility model can be with other form, structure, layout, ratio, and realize with other assembly, material and parts.In the situation that not departing from the utility model scope and spirit, can carry out other distortion and change to disclosed embodiment here.
Claims (9)
1. a surge voltage-suppressing circuit, it is characterized in that, comprise power protection chip U1, filtering voltage regulation unit, metal-oxide-semiconductor Q1, triode Q2, under-voltage Overvoltage protecting unit and electric resistance partial pressure unit, the input access supply voltage of described filtering voltage regulation unit, the output of described filtering voltage regulation unit is connected in the base stage of described triode Q2, the emitter of described triode Q2 is connected in power protection chip U1 by under-voltage Overvoltage protecting unit, the collector electrode of described triode Q2 is connected in the grid of metal-oxide-semiconductor Q1 by current-limiting resistance R, the door pin of described power protection chip U1 is connected in the drain electrode of described metal-oxide-semiconductor Q1 by the first resistance R 1, the source electrode of described metal-oxide-semiconductor Q1 is connected in the output pin of described power protection chip U1 by the second resistance R 2, output pin and dividing potential drop that described electric resistance partial pressure unit is connected in described power protection chip U1 arrange pin, the clock timing pin of described power protection chip U1 is by the 4th capacitor C 4 ground connection.
2. surge voltage-suppressing circuit according to claim 1, it is characterized in that, described filtering voltage regulation unit specifically comprises the first capacitor C 1, the 3rd resistance R 3, the 4th resistance R 4, the 5th resistance R 5, the first voltage-stabiliser tube ZD1, the second voltage-stabiliser tube ZD2 and diode D, the two ends of described the first capacitor C 1 are connected between supply voltage and ground, one end of described the 3rd resistance R 3 is connected in supply voltage, the other end is connected in the negative pole of the first voltage-stabiliser tube ZD1, the plus earth of described the first voltage-stabiliser tube ZD1; One end of described the 4th resistance R 4 is connected in the negative pole of described the first voltage-stabiliser tube ZD1, the other end is connected in the negative pole of the second voltage-stabiliser tube ZD2 and the positive pole of diode D, the plus earth of described the second voltage-stabiliser tube ZD2, the negative pole of described diode D is connected in the base stage of described triode Q2, the negative pole of described diode D is also connected in the negative pole of described the first voltage-stabiliser tube ZD1, described the 5th resistance R 5 one end are connected in supply voltage, and the other end is connected in the negative pole of described the second voltage-stabiliser tube ZD2.
3. surge voltage-suppressing circuit according to claim 2, it is characterized in that, described under-voltage Overvoltage protecting unit comprises the second capacitor C 2, the 6th resistance R 6 and the 7th resistance R 7, after the power pins of described power protection chip U1 is in parallel with shutoff pin, be connected in the emitter of described triode Q2, one end of described the second capacitor C 2 is connected in the emitter of triode Q2, other end ground connection; Described the 6th resistance R 6 one end are connected in the emitter of described triode Q2; the other end is connected in the under-voltage pin of power protection chip U1; one end of described the 7th resistance R 7 is connected in the under-voltage pin of power protection chip U1; the other end is connected in the overvoltage pin of power protection chip U1, the overvoltage pin ground connection of described power protection chip U1.
4. surge voltage-suppressing circuit according to claim 3, it is characterized in that, described electric resistance partial pressure unit comprises the 8th resistance R 8 and the 9th resistance R 9, one end of described the 8th resistance R 8 is connected in the output pin of described power protection chip U1, and the dividing potential drop that the other end is connected in described power protection chip U1 arranges pin; The dividing potential drop that one end of described the 9th resistance R 9 is connected in described power protection chip U1 arranges pin, other end ground connection.
5. surge voltage-suppressing circuit according to claim 4; it is characterized in that; one end of described the second resistance R 2 is connected in the source electrode of metal-oxide-semiconductor Q1 and the current detecting input pin of power protection chip U1, and the other end of described the second resistance R 2 is connected in the output pin of described power protection chip U1.
6. surge voltage-suppressing circuit according to claim 5, is characterized in that, the output pin of described power protection chip U1 is also by the 3rd capacitor C 3 ground connection.
7. surge voltage-suppressing circuit according to claim 1, is characterized in that, described triode Q2 is NPN type triode.
8. surge voltage-suppressing circuit according to claim 1, is characterized in that, described metal-oxide-semiconductor Q1 is N-channel MOS pipe.
9. surge voltage-suppressing circuit according to claim 1, is characterized in that, the model of described power protection chip U1 is LT4363DE-2.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420200203.0U CN203787956U (en) | 2014-04-23 | 2014-04-23 | Surge voltage suppression circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420200203.0U CN203787956U (en) | 2014-04-23 | 2014-04-23 | Surge voltage suppression circuit |
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| Publication Number | Publication Date |
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| CN203787956U true CN203787956U (en) | 2014-08-20 |
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| CN201420200203.0U Expired - Fee Related CN203787956U (en) | 2014-04-23 | 2014-04-23 | Surge voltage suppression circuit |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104319739A (en) * | 2014-09-30 | 2015-01-28 | 洛阳隆盛科技有限责任公司 | DC surge voltage clamping circuit with reversal connection protection |
| CN106786458A (en) * | 2016-12-26 | 2017-05-31 | 北京航天测控技术有限公司 | A kind of fast reaction automatic protection circuit and method |
| WO2017114134A1 (en) * | 2015-12-31 | 2017-07-06 | 深圳光启合众科技有限公司 | Motor protection circuit and method for controlling motor protection circuit |
| CN107317319A (en) * | 2017-07-31 | 2017-11-03 | 北京小米移动软件有限公司 | Surge protection device and method and a kind of mobile terminal |
| CN111987758A (en) * | 2020-07-08 | 2020-11-24 | 中国兵器装备集团上海电控研究所 | Charging and current-limiting protection circuit |
| CN112230031A (en) * | 2019-12-20 | 2021-01-15 | 青岛鼎信通讯股份有限公司 | Overvoltage protection circuit design for three-phase meter |
-
2014
- 2014-04-23 CN CN201420200203.0U patent/CN203787956U/en not_active Expired - Fee Related
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104319739A (en) * | 2014-09-30 | 2015-01-28 | 洛阳隆盛科技有限责任公司 | DC surge voltage clamping circuit with reversal connection protection |
| WO2017114134A1 (en) * | 2015-12-31 | 2017-07-06 | 深圳光启合众科技有限公司 | Motor protection circuit and method for controlling motor protection circuit |
| CN106936115A (en) * | 2015-12-31 | 2017-07-07 | 深圳光启合众科技有限公司 | The method of motor protective circuit and controlled motor protection circuit |
| CN106786458A (en) * | 2016-12-26 | 2017-05-31 | 北京航天测控技术有限公司 | A kind of fast reaction automatic protection circuit and method |
| CN107317319A (en) * | 2017-07-31 | 2017-11-03 | 北京小米移动软件有限公司 | Surge protection device and method and a kind of mobile terminal |
| CN107317319B (en) * | 2017-07-31 | 2019-11-08 | 北京小米移动软件有限公司 | Surge protection device and method and a kind of mobile terminal |
| CN112230031A (en) * | 2019-12-20 | 2021-01-15 | 青岛鼎信通讯股份有限公司 | Overvoltage protection circuit design for three-phase meter |
| CN111987758A (en) * | 2020-07-08 | 2020-11-24 | 中国兵器装备集团上海电控研究所 | Charging and current-limiting protection circuit |
| CN111987758B (en) * | 2020-07-08 | 2021-12-07 | 中国兵器装备集团上海电控研究所 | Charging and current-limiting protection circuit |
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| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140820 Termination date: 20170423 |