CN203774812U - Battery equalization circuit using flying capacitor method - Google Patents
Battery equalization circuit using flying capacitor method Download PDFInfo
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- CN203774812U CN203774812U CN201320856647.5U CN201320856647U CN203774812U CN 203774812 U CN203774812 U CN 203774812U CN 201320856647 U CN201320856647 U CN 201320856647U CN 203774812 U CN203774812 U CN 203774812U
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- 239000003990 capacitor Substances 0.000 title claims abstract description 72
- 238000000034 method Methods 0.000 title claims abstract description 13
- 230000005669 field effect Effects 0.000 claims description 149
- WHXSMMKQMYFTQS-UHFFFAOYSA-N Lithium Chemical compound [Li] WHXSMMKQMYFTQS-UHFFFAOYSA-N 0.000 claims description 30
- 229910052744 lithium Inorganic materials 0.000 claims description 30
- 230000000295 complement effect Effects 0.000 claims description 4
- 238000004146 energy storage Methods 0.000 abstract description 2
- 230000003068 static effect Effects 0.000 abstract description 2
- 238000012546 transfer Methods 0.000 abstract description 2
- 238000004904 shortening Methods 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 5
- 208000032953 Device battery issue Diseases 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000012827 research and development Methods 0.000 description 1
- 238000012216 screening Methods 0.000 description 1
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- Charge And Discharge Circuits For Batteries Or The Like (AREA)
Abstract
The utility model discloses a battery equalization circuit using a flying capacitor method. The flying capacitor method is used to realize equalization, by controlling on-off of a switching tube, energy of a battery with high electric quantity is transferred to a capacitor, and then an intermediate capacitor indirectly transfers stored energy to a battery with low electric quantity. The method has the advantages that the capacity of the capacitor is not required to be large, and the battery can work both in a static state and a dynamic state, thereby shortening equalization time and improving equalization efficiency. The circuit does not need to be changed during equalization of other energy storage modules, and thus system suitability is very good and control is relatively simple.
Description
Technical field
The utility model belongs to battery balanced field, especially a kind of flying capacitance method battery equalizing circuit.
Background technology
Battery pack conventionally by multiple cells in series for meet life and required voltage and the power demand of commercial Application, if but in battery pack the capacity of certain battery do not mate with other battery, can reduce whole battery capacity and make it can not bring into play its maximum power.Although the battery with batch same model has all passed through strict screening before dispatching from the factory, to make as far as possible these batteries consistent aspect voltage and capacity, still unavoidably can make in actual use the battery consistency variation in battery pack.Due to the difference on self-capacity, the difference of cell depth of discharge, difference battery is easy to occur overcharging and cross put, this makes the capacity of this battery accelerate decay, and the inconsistency between other batteries further strengthens, thereby finally cause battery failure to affect the useful life of battery pack entirety.As can be seen here, a kind of rationally effective battery equalization system of research and development, eliminates the inconsistency that in battery use procedure, each cell occurs, maximum performance battery performance extends battery pack useful life, be necessary also highly significant.
Summary of the invention
The utility model, for the deficiencies in the prior art, provides a kind of flying capacitance method battery equalizing circuit.
A kind of flying capacitance method battery equalizing circuit is made up of full bridge inverter and balancing battery group.
Described full bridge inverter comprises 16 field effect transistor, 12 electrochemical capacitors and four current-limiting resistances; In full bridge inverter, field effect cast number is NTD4857, is driven by complementary PWM square wave.The first field effect transistor Q1 drain electrode is connected with the second field effect transistor Q2 drain electrode, first current-limiting resistance F1 one end, the first electrochemical capacitor C2 positive pole, the first field effect transistor Q1 source electrode drains with the 3rd field effect transistor Q3, the second electrochemical capacitor C3 is anodal is connected, and the first field effect transistor Q1 grid is connected with microprocessor PWM output pin; The second field effect transistor Q2 source electrode drains with the 4th field effect transistor Q4, the 3rd electrochemical capacitor C5 is anodal is connected, and the second field effect transistor Q2 grid is connected with microprocessor PWM output pin; The 3rd field effect transistor Q3 source electrode is connected with the 4th field effect transistor Q4 source electrode, the first electrochemical capacitor C2 negative pole, the 5th field effect transistor Q5 drain electrode, the 6th field effect transistor Q6 drain electrode, the 4th electrochemical capacitor C6 positive pole, second current-limiting resistance F2 one end, and the 3rd field effect transistor Q3 grid is connected with microprocessor PWM output pin; The 4th field effect transistor Q4 grid is connected with microprocessor PWM output pin; The 5th field effect transistor Q5 source electrode drains with the 7th field effect transistor Q7, the second electrochemical capacitor C3 negative pole, the 5th electrochemical capacitor C7 is anodal is connected, and the 5th field effect transistor Q5 grid is connected with microprocessor PWM output pin; The 6th field effect transistor Q6 source electrode drains with the 8th field effect transistor Q8, the 3rd electrochemical capacitor C5 negative pole, the 6th electrochemical capacitor C8 is anodal is connected, and the 6th field effect transistor Q6 grid is connected with microprocessor PWM output pin; The 7th field effect transistor Q7 source electrode is connected with the 8th field effect transistor Q8 source electrode, the 4th electrochemical capacitor C6 negative pole, the 9th field effect transistor Q9 drain electrode, the tenth field effect transistor Q10 drain electrode, the 7th electrochemical capacitor C9 positive pole, the 3rd current-limiting resistance F3 one end, and the 7th field effect transistor Q7 grid is connected with microprocessor PWM output pin; The 8th field effect transistor Q8 grid is connected with microprocessor PWM output pin; The 9th field effect transistor Q9 source electrode drains with the 11 field effect transistor Q11, the 5th electrochemical capacitor C7 negative pole, the 8th electrochemical capacitor C10 is anodal is connected, and the 9th field effect transistor Q9 grid is connected with microprocessor PWM output pin; The tenth field effect transistor Q10 source electrode drains with the 12 field effect transistor Q12, the 6th electrochemical capacitor C8 negative pole, the 9th electrochemical capacitor C11 is anodal is connected, and the tenth field effect transistor Q10 grid is connected with microprocessor PWM output pin; The 11 field effect transistor Q11 source electrode is connected with the 12 field effect transistor Q12 source electrode, the 7th electrochemical capacitor C9 negative pole, the 13 field effect transistor Q13 drain electrode, the 14 field effect transistor Q14 drain electrode, the tenth electrochemical capacitor C12 positive pole, the 4th current-limiting resistance F4 one end, and the 11 field effect transistor Q11 grid is connected with microprocessor PWM output pin; The 12 field effect transistor Q12 grid is connected with microprocessor PWM output pin; The 13 field effect transistor Q13 source electrode drains with the 15 field effect transistor Q15, the 8th electrochemical capacitor C10 negative pole is connected, and the 13 field effect transistor Q13 grid is connected with microprocessor PWM output pin; The 14 field effect transistor Q14 source electrode drains with the 16 field effect transistor Q16, the 9th electrochemical capacitor C11 negative pole is connected, and the 14 field effect transistor Q14 grid is connected with microprocessor PWM output pin; The 15 field effect transistor Q15 source electrode is connected with the 16 field effect transistor Q16 source electrode, the tenth electrochemical capacitor C12 negative pole, the 4th lithium battery B4 negative pole and ground connection, and the 15 field effect transistor Q15 grid is connected with microprocessor PWM output pin; The 16 field effect transistor Q16 grid is connected with microprocessor PWM output pin.
Balancing battery group is composed in series by four joint lithium batteries.The first lithium battery B1 is anodal to be connected with the first current-limiting resistance F1 other end, and the first lithium battery B1 negative pole is connected with the second lithium battery B2 positive pole, the second current-limiting resistance F2 other end; The second lithium battery B2 negative pole is connected with the 3rd lithium battery B3 positive pole, the 3rd current-limiting resistance F3 other end; The 3rd lithium battery B3 negative pole is connected with the 4th lithium battery B4 positive pole, the 4th current-limiting resistance F4 other end; The 4th lithium battery B4 negative pole is connected with ground.
The beneficial effect that the utility model has is: circuit structure adopts switching power circuit topological structure, and electric capacity is as the element of storage power, and energy flow is to adopting bi-directional.Adopt the equilibrium of flying capacitance method, by cut-offfing of control switch pipe, the energy of high electric weight battery is transferred on electric capacity, more indirectly the energy of storage is transferred on low electric weight battery by intermediate capacitance.The advantage of the method is not require that the capacity of electric capacity is very large, when battery is in static or can work dynamically time, has shortened time for balance and has improved balanced efficiency.Circuit does not need to change circuit in the time that other energy storage components carry out equilibrium, and therefore the fine control simultaneously of system suitability is also relatively simple.
Brief description of the drawings
Fig. 1 is circuit diagram of the present utility model;
The balanced equivalent circuit diagram of the 1st, 2 batteries when Fig. 2 is Q1 conducting;
Fig. 3 is the balanced equivalent circuit diagram of Q1 the 1st, 2 batteries while closing.
Embodiment
Below in conjunction with accompanying drawing, the utility model is further illustrated.
Shown in Fig. 1, a kind of flying capacitance method battery equalizing circuit is made up of full bridge inverter and balancing battery group.
In full bridge inverter, field effect cast number is NTD4857, is driven by complementary PWM square wave.The first field effect transistor Q1 drain electrode is connected with the second field effect transistor Q2 drain electrode, first current-limiting resistance F1 one end and the first electrochemical capacitor C2 positive pole, the first field effect transistor Q1 source electrode is connected with the 3rd field effect transistor Q3 drain electrode and the second electrochemical capacitor C3 positive pole, and the first field effect transistor Q1 grid is connected with microprocessor PWM output pin; The second field effect transistor Q2 source electrode is connected with the 4th field effect transistor Q4 drain electrode and the 3rd electrochemical capacitor C5 positive pole, and the second field effect transistor Q2 grid is connected with microprocessor PWM output pin; The 3rd field effect transistor Q3 source electrode is connected with the 4th field effect transistor Q4 source electrode, the first electrochemical capacitor C2 negative pole, the 5th field effect transistor Q5 drain electrode, the 6th field effect transistor Q6 drain electrode, the 4th electrochemical capacitor C6 positive pole and second current-limiting resistance F2 one end, and the 3rd field effect transistor Q3 grid is connected with microprocessor PWM output pin; The 4th field effect transistor Q4 grid is connected with microprocessor PWM output pin; The 5th field effect transistor Q5 source electrode drains with the 7th field effect transistor Q7, the negative pole of the second electrochemical capacitor C3, the positive pole of the 5th electrochemical capacitor C7 are connected, and the 5th field effect transistor Q5 grid is connected with microprocessor PWM output pin; The 6th field effect transistor Q6 source electrode drains with the 8th field effect transistor Q8, the negative pole of the 3rd electrochemical capacitor C5, the 6th electrochemical capacitor C8 is anodal is connected, and the 6th field effect transistor Q6 grid is connected with microprocessor PWM output pin; The 7th field effect transistor Q7 source electrode is connected with the 8th field effect transistor Q8 source electrode, the 4th electrochemical capacitor C6 negative pole, the 9th field effect transistor Q9 drain electrode, the tenth field effect transistor Q10 drain electrode, the 7th electrochemical capacitor C9 positive pole, the 3rd current-limiting resistance F3 one end, and the 7th field effect transistor Q7 grid is connected with microprocessor PWM output pin; The 8th field effect transistor Q8 grid is connected with microprocessor PWM output pin; The 9th field effect transistor Q9 source electrode drains with the 11 field effect transistor Q11, the negative pole of the 5th electrochemical capacitor C7, the 8th electrochemical capacitor C10 is anodal is connected, and the 9th field effect transistor Q9 grid is connected with microprocessor PWM output pin; The tenth field effect transistor Q10 source electrode drains with the 12 field effect transistor Q12, the 6th electrochemical capacitor C8 negative pole, the 9th electrochemical capacitor C11 is anodal is connected, and the tenth field effect transistor Q10 grid is connected with microprocessor PWM output pin; The 11 field effect transistor Q11 source electrode is connected with the 12 field effect transistor Q12 source electrode, the 7th electrochemical capacitor C9 negative pole, the 13 field effect transistor Q13 drain electrode, the 14 field effect transistor Q14 drain electrode, the tenth electrochemical capacitor C12 positive pole, the 4th current-limiting resistance F4 one end, and the 11 field effect transistor Q11 grid is connected with microprocessor PWM output pin; The 12 field effect transistor Q12 grid is connected with microprocessor PWM output pin; The 13 field effect transistor Q13 source electrode drains with the 15 field effect transistor Q15, the 8th electrochemical capacitor C10 negative pole is connected, and the 13 field effect transistor Q13 grid is connected with microprocessor PWM output pin; The 14 field effect transistor Q14 source electrode drains with the 16 field effect transistor Q16, the 9th electrochemical capacitor C11 negative pole is connected, and the 14 field effect transistor Q14 grid is connected with microprocessor PWM output pin; The 15 field effect transistor Q15 source electrode is connected with the 16 field effect transistor Q16 source electrode, the tenth electrochemical capacitor C12 negative pole, the 4th lithium battery B4 negative pole and ground connection, and the 15 field effect transistor Q15 grid is connected with microprocessor PWM output pin; The 16 field effect transistor Q16 grid is connected with microprocessor PWM output pin.
Balancing battery group is composed in series by four joint lithium batteries.The first lithium battery B1 is anodal to be connected with the first current-limiting resistance F1 other end, and the first lithium battery B1 negative pole is connected with the second lithium battery B2 positive pole, the second current-limiting resistance F2 other end; The second lithium battery B2 negative pole is connected with the 3rd lithium battery B3 positive pole, the 3rd current-limiting resistance F3 other end; The 3rd lithium battery B3 negative pole is connected with the 4th lithium battery B4 positive pole, the 4th current-limiting resistance F4 other end; The 4th lithium battery B4 negative pole is connected with ground.
The balanced equivalent circuit diagram of the 1st, 2 batteries when the conducting of Q1 shown in Fig. 2.Q1 is identical with Q4 phase place, and Q2 is identical with Q3 phase place, Q1 and Q3 complementation.In the time that circuit is at equilibrium, cell voltage VB1=VB2, equalizer is not worked, and switching tube is all closed.When circuit is during in non-balanced state, suppose cell voltage VB1>VB2, circuit starts equilibrium and this moment Q1, Q4, Q5, the conducting of Q8 switching tube, and Q2, Q3, Q6, Q7 switching tube are closed.Dotted line is the current direction in two loops, and capacitor C 1 storage battery B1 flows through the electric charge coming, capacitor C 2 obtained upper moment flow of charge battery B2 from battery B1.
The balanced equivalent circuit diagram of the 1st, 2 batteries when Q1 closes shown in Fig. 3.In the time that circuit is at equilibrium, cell voltage VB1=VB2, equalizer is not worked, and switching tube is all closed.When circuit is during in non-balanced state, suppose equally cell voltage VB1>VB2, circuit starts equilibrium and this moment Q1, Q4, Q5, Q8 switching tube is closed, Q2, Q3, Q6, the conducting of Q7 switching tube.Dotted line is the current direction in two loops, capacitor C 1 obtained upper moment flow of charge battery B2 from battery B1, the electric charge of capacitor C 2 storage battery B1.
Flying capacitance is for the transfer between the energy content of battery.Equalizing circuit first by switching tube by cell high electric weight and electric capacity gating, now battery electric quantity is transferred on electric capacity, then by switching tube by cell low electric weight and electric capacity gating, the electric weight of now storing in electric capacity is transferred on battery, reach battery electric quantity shift object.
In full bridge inverter, switching tube adopts complementary PWM square wave to drive, and between battery, energy is transferred to the energy of high energy battery in low-energy battery by flying capacitance, until energy content of battery balance.
Claims (1)
1. a flying capacitance method battery equalizing circuit, is made up of full bridge inverter and balancing battery group; It is characterized in that:
Described full bridge inverter comprises 16 field effect transistor, 12 electrochemical capacitors and four current-limiting resistances; In full bridge inverter, field effect cast number is NTD4857, is driven by complementary PWM square wave; The first field effect transistor Q1 drain electrode is connected with the second field effect transistor Q2 drain electrode, first current-limiting resistance F1 one end, the first electrochemical capacitor C2 positive pole, the first field effect transistor Q1 source electrode drains with the 3rd field effect transistor Q3, the second electrochemical capacitor C3 is anodal is connected, and the first field effect transistor Q1 grid is connected with microprocessor PWM output pin; The second field effect transistor Q2 source electrode drains with the 4th field effect transistor Q4, the 3rd electrochemical capacitor C5 is anodal is connected, and the second field effect transistor Q2 grid is connected with microprocessor PWM output pin; The 3rd field effect transistor Q3 source electrode is connected with the 4th field effect transistor Q4 source electrode, the first electrochemical capacitor C2 negative pole, the 5th field effect transistor Q5 drain electrode, the 6th field effect transistor Q6 drain electrode, the 4th electrochemical capacitor C6 positive pole, second current-limiting resistance F2 one end, and the 3rd field effect transistor Q3 grid is connected with microprocessor PWM output pin; The 4th field effect transistor Q4 grid is connected with microprocessor PWM output pin; The 5th field effect transistor Q5 source electrode drains with the 7th field effect transistor Q7, the second electrochemical capacitor C3 negative pole, the 5th electrochemical capacitor C7 is anodal is connected, and the 5th field effect transistor Q5 grid is connected with microprocessor PWM output pin; The 6th field effect transistor Q6 source electrode drains with the 8th field effect transistor Q8, the 3rd electrochemical capacitor C5 negative pole, the 6th electrochemical capacitor C8 is anodal is connected, and the 6th field effect transistor Q6 grid is connected with microprocessor PWM output pin; The 7th field effect transistor Q7 source electrode is connected with the 8th field effect transistor Q8 source electrode, the 4th electrochemical capacitor C6 negative pole, the 9th field effect transistor Q9 drain electrode, the tenth field effect transistor Q10 drain electrode, the 7th electrochemical capacitor C9 positive pole, the 3rd current-limiting resistance F3 one end, and the 7th field effect transistor Q7 grid is connected with microprocessor PWM output pin; The 8th field effect transistor Q8 grid is connected with microprocessor PWM output pin; The 9th field effect transistor Q9 source electrode drains with the 11 field effect transistor Q11, the 5th electrochemical capacitor C7 negative pole, the 8th electrochemical capacitor C10 is anodal is connected, and the 9th field effect transistor Q9 grid is connected with microprocessor PWM output pin; The tenth field effect transistor Q10 source electrode drains with the 12 field effect transistor Q12, the 6th electrochemical capacitor C8 negative pole, the 9th electrochemical capacitor C11 is anodal is connected, and the tenth field effect transistor Q10 grid is connected with microprocessor PWM output pin; The 11 field effect transistor Q11 source electrode is connected with the 12 field effect transistor Q12 source electrode, the 7th electrochemical capacitor C9 negative pole, the 13 field effect transistor Q13 drain electrode, the 14 field effect transistor Q14 drain electrode, the tenth electrochemical capacitor C12 positive pole, the 4th current-limiting resistance F4 one end, and the 11 field effect transistor Q11 grid is connected with microprocessor PWM output pin; The 12 field effect transistor Q12 grid is connected with microprocessor PWM output pin; The 13 field effect transistor Q13 source electrode drains with the 15 field effect transistor Q15, the 8th electrochemical capacitor C10 negative pole is connected, and the 13 field effect transistor Q13 grid is connected with microprocessor PWM output pin; The 14 field effect transistor Q14 source electrode drains with the 16 field effect transistor Q16, the 9th electrochemical capacitor C11 negative pole is connected, and the 14 field effect transistor Q14 grid is connected with microprocessor PWM output pin; The 15 field effect transistor Q15 source electrode is connected with the 16 field effect transistor Q16 source electrode, the tenth electrochemical capacitor C12 negative pole, the 4th lithium battery B4 negative pole and ground connection, and the 15 field effect transistor Q15 grid is connected with microprocessor PWM output pin; The 16 field effect transistor Q16 grid is connected with microprocessor PWM output pin;
Balancing battery group is composed in series by four joint lithium batteries; The first lithium battery B1 is anodal to be connected with the first current-limiting resistance F1 other end, and the first lithium battery B1 negative pole is connected with the second lithium battery B2 positive pole, the second current-limiting resistance F2 other end; The second lithium battery B2 negative pole is connected with the 3rd lithium battery B3 positive pole, the 3rd current-limiting resistance F3 other end; The 3rd lithium battery B3 negative pole is connected with the 4th lithium battery B4 positive pole, the 4th current-limiting resistance F4 other end; The 4th lithium battery B4 negative pole is connected with ground.
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| CN201320856647.5U CN203774812U (en) | 2013-12-23 | 2013-12-23 | Battery equalization circuit using flying capacitor method |
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| CN201320856647.5U CN203774812U (en) | 2013-12-23 | 2013-12-23 | Battery equalization circuit using flying capacitor method |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104300640A (en) * | 2014-10-20 | 2015-01-21 | 上海电机学院 | Novel storage battery pack charging control circuit and method thereof |
| CN104901390A (en) * | 2015-06-23 | 2015-09-09 | 北京工业大学 | Balancing method and circuit of serially-connected battery pack/super capacitor set |
| CN105429194A (en) * | 2015-10-12 | 2016-03-23 | 丹东思诚科技有限公司 | Series-connected lead acid battery pack equalization circuit and application thereof |
| CN108448669A (en) * | 2018-03-26 | 2018-08-24 | 南京航空航天大学 | It mows automobile-used high current lithium battery management system and its management method |
| CN110808624A (en) * | 2019-12-10 | 2020-02-18 | 周天文 | Lithium battery balancing circuit |
| CN110915095A (en) * | 2017-07-05 | 2020-03-24 | 奥克斯能源有限公司 | Battery pack management |
-
2013
- 2013-12-23 CN CN201320856647.5U patent/CN203774812U/en not_active Expired - Lifetime
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104300640A (en) * | 2014-10-20 | 2015-01-21 | 上海电机学院 | Novel storage battery pack charging control circuit and method thereof |
| CN104901390A (en) * | 2015-06-23 | 2015-09-09 | 北京工业大学 | Balancing method and circuit of serially-connected battery pack/super capacitor set |
| CN104901390B (en) * | 2015-06-23 | 2017-05-24 | 北京工业大学 | Balancing method and circuit of serially-connected battery pack/super capacitor set |
| CN105429194A (en) * | 2015-10-12 | 2016-03-23 | 丹东思诚科技有限公司 | Series-connected lead acid battery pack equalization circuit and application thereof |
| CN110915095A (en) * | 2017-07-05 | 2020-03-24 | 奥克斯能源有限公司 | Battery pack management |
| CN108448669A (en) * | 2018-03-26 | 2018-08-24 | 南京航空航天大学 | It mows automobile-used high current lithium battery management system and its management method |
| CN110808624A (en) * | 2019-12-10 | 2020-02-18 | 周天文 | Lithium battery balancing circuit |
| CN110808624B (en) * | 2019-12-10 | 2023-10-10 | 周天文 | Lithium battery balance circuit |
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Granted publication date: 20140813 |