CN203774608U - High speed laser diode driver IC employing negative capacitance neutralization technology - Google Patents

Abstract

The utility model relates to a high speed laser diode driver integrated circuit (IC) employing the negative capacitance neutralization technology, belongs to the integrated circuit field and aims to improve voltage gain -3dB band width of a driver while power consumption of the driver does not increase, improve output capability of a high frequency modulation current and improve eye characteristics of an output high frequency current signal. The high speed laser diode driver integrated circuit is formed by m-level amplifiers through cascading, the m is a natural number greater than or equal to 1, the nth level amplifier of the m-level amplifiers is a controllable gain amplifier employing the negative capacitance neutralization technology, the n is smaller than or equal to the m, the nth level amplifier comprises a difference amplifier and a source electrode follower, the difference amplifier comprises a controllable current source In1, an NMOS transistor Nn1, an NMOS transistor Nn2, a load resistor Rn1, a load resistor Rn2, a capacitor Cn1 and a capacitor Cn2, and the source electrode follower comprises a controllable current source In2, a controllable current source In3, an NMOS transistor Nn3 and an NMOS transistor Nn4.

Description

Adopt in negative capacitance and the High speed laser diode driver IC of technology

Technical field

The utility model relates to the High speed laser diode driver IC of 10Gbps and the above speed of 10Gbps, belongs to integrated circuit fields.

Background technology

People have expedited the emergence of the more strong request of the network of wide bandwidth to the explosive demand based on World Wide Web (WWW) (WEB) application and integrated multimedia application (as sound/data/image) for network insertion.The quick evolution of microelectronics and optical-fiber network technology can promote the continuous growth of bandwidth capacity, impels the people can be constantly to network is excessive faster, from 10Mb/s, 100Mb/s, 1Gb/s until 10Gb/s.

10G PON (passive optical network, EPON) technology is nowadays ripe, just moving towards the large-scale application stage, for accelerating to advance its large-scale application speed, be necessary to strengthen integrated level and the performance of the modules of 10G PON, and reduce power consumption and price, especially in whole PON system, be responsible for the optical transceiver module of photosignal translation interface.In light transmitting and receiving system, laser diode drive is mainly realized the function that the signal of telecommunication is converted to light signal, its modulated current fan-out capability affects the size of laser diode Output optical power, and the jitter performance of its output electrical signals and eye diagram quality also produce certain impact to the error rate of whole optical communication system.

As shown in Figure 1, the High speed laser diode driving amplifier of traditional 10Gb/s or the above speed of 10Gbps is generally by m (m=1,2 ...) level difference amplifier stage connection forms.When operating rate reaches 10Gb/s or when higher, in order to reduce overshoot, the phenomenons such as ringing, to improve the eye diagram quality of signal, need to reduce the return loss of the return loss (return loss) of the input of the 1st grade of amplifier and the output of afterbody (m level) conventionally.And in order to make driving amplifier can export variable modulated current, generally need by controlling n (n=1,2 in m level laser diode driving amplifier ... m) voltage gain of level amplifier is realized, and n level amplifier is controllable gain amplifier level.As shown in Figure 2, n level amplifier is comprised of differential amplifier and follower, and differential amplifier is by transistor N _n1, N _n2, load resistance R _n1, R _n2and controllable current source I _n1form; Transistor N wherein _n1, N _n2for common emitter (bipolar transistor) or common source (CMOS transistor).Follower is by transistor N _n3, N _n4with controllable current source I _n2, I _n3form N _n3and N _n4if while adopting bipolar transistor, follower is emitter follower, N _n3and N _n4if while adopting CMOS transistor, follower is source follower.

The input signal Von that wherein differential amplifier is given upper level _n-1and Vop _n-1amplify, emitter/source follower is mainly in order to provide correct DC offset voltage to next stage amplifier.Von _nand Vop _noutput node for whole variable gain amplifier.The bias current sources of n level amplifier is all controllable, by changing the size of bias current, controls the voltage gain of this grade of amplifier, and then controls the size of voltage gain and the output modulated current of whole driving amplifier circuit.As variable bias current I _n1while becoming large, input parasitic capacitance C _{in, n}(equivalence element) is along with I _n1continuous increase and increase.When if four transistors of this grade of amplifier adopt bipolar transistor, C _{in, n}increase be because the charging capacitor between the base-emitter of bipolar transistor under forward bias operating state is along with the increase of collector bias current becomes large result; When if amplifier transistor adopts CMOS transistor, C _{in, n}change be greatly because the transistorized gate source voltage of CMOS causes along with the continuous increase of leakage current increases.Due to C _{in, n}therefore while becoming large, the load capacitance of n-1 level amplifier will and then become greatly, and dominant pole frequency can reduce, and causes the voltage gain-three dB bandwidth of n-1 level amplifier to diminish, so make whole laser diode drive-three dB bandwidth reduces.In order to overcome by C _{in, n}the voltage gain bandwidth causing changes, and conventionally need to reach enough wide voltage gain bandwidth, compensate by reducing load resistance value and the gain of n-1 level amplifier.N level and post-amplifier thereof need to increase voltage gain by increasing bias current conventionally simultaneously, to meet the requirement of certain output modulated current, so not only increase the power consumption of whole amplifier, also increased the design difficulty of n level and post-amplifier circuit thereof.

Summary of the invention

The utility model provides a kind of and has adopted in negative capacitance and the High speed laser diode driver IC of technology, object is when not increasing power consumption of driver, to increase the voltage gain-three dB bandwidth of driver, strengthen high frequency modulated electric current fan-out capability, improve the eye pattern characteristic of output high-frequency current signal.

In employing negative capacitance described in the utility model, adopt two kinds of technical schemes with the High speed laser diode driver IC of technology.

The first technical scheme: adopt in negative capacitance and the High speed laser diode driver IC of technology, it consists of the cascade of m level amplifier, and m is more than or equal to 1 natural number;

N level amplifier in m level amplifier is to adopt in negative capacitance and the controllable gain amplifier of technology, n≤m, and n level amplifier comprises differential amplifier and source follower;

Described differential amplifier comprises controllable current source I _n1, nmos pass transistor N _n1, nmos pass transistor N _n2, load resistance R _n1, load resistance R _n2, capacitor C _n1and capacitor C _n2;

Described source follower comprises controllable current source I _n2, controllable current source I _n3, nmos pass transistor N _n3with nmos pass transistor N _n4;

Power vd D connects load resistance R simultaneously _n1one end, load resistance R _n2one end, nmos pass transistor N _n3drain electrode and nmos pass transistor N _n4drain electrode;

Load resistance R _n1the other end connect nmos pass transistor N simultaneously _n1drain electrode, capacitor C _n1one end and nmos pass transistor N _n3grid; Capacitor C _n1the other end connect nmos pass transistor N simultaneously _n2grid and the output end vo n of the n-1 level amplifier in m level amplifier _n-1;

Nmos pass transistor N _n2drain electrode connect nmos pass transistor N simultaneously _n4grid, capacitor C _n2one end and load resistance R _n2the other end; Capacitor C _n2the other end connect the output end vo p of the n-1 level amplifier in m level amplifier simultaneously _n-1with nmos pass transistor N _n1grid;

Nmos pass transistor N _n1source electrode and nmos pass transistor N _n2the common node Vm of source electrode _nconnect controllable current source I _n1positive pole, controllable current source I _n1minus earth GND;

Nmos pass transistor N _n3source electrode connect controllable current source I simultaneously _n2positive pole and the output end vo p of n level amplifier _n, controllable current source I _n2minus earth GND;

Nmos pass transistor N _n4source electrode connect controllable current source I simultaneously _n3positive pole and the output end vo n of n level amplifier _n, controllable current source I _n3minus earth GND.

The second technical scheme: adopt in negative capacitance and the High speed laser diode driver IC of technology, it consists of the cascade of m level amplifier, and m is more than or equal to 1 natural number;

N level amplifier in m level amplifier is to adopt in negative capacitance and the controllable gain amplifier of technology, n≤m, and n level amplifier comprises differential amplifier and emitter follower;

Described differential amplifier comprises controllable current source I _n1, NPN bipolar transistor N _n1, NPN bipolar transistor N _n2, load resistance R _n1, load resistance R _n2, capacitor C _n1and capacitor C _n2;

Described emitter follower comprises controllable current source I _n2, controllable current source I _n3, NPN bipolar transistor N _n3with NPN bipolar transistor N _n4;

Power vd D connects load resistance R simultaneously _n1one end, load resistance R _n2one end, NPN bipolar transistor N _n3collector electrode and NPN bipolar transistor N _n4collector electrode;

Load resistance R _n1the other end connect NPN bipolar transistor N simultaneously _n1collector electrode, capacitor C _n1one end and NPN bipolar transistor N _n3base stage; Capacitor C _n1the other end connect NPN bipolar transistor N simultaneously _n2base stage and the output end vo n of the n-1 level amplifier in m level amplifier _n-1;

NPN bipolar transistor N _n2collector electrode connect NPN bipolar transistor N simultaneously _n4base stage, capacitor C _n2one end and load resistance R _n2the other end; Capacitor C _n2the other end connect the output end vo of the n-1 level amplifier in m level amplifier simultaneously _pn-1with NPN bipolar transistor N _n1base stage;

NPN bipolar transistor N _n1emitter and NPN bipolar transistor N _n2the common node Vm of emitter _nconnect controllable current source I _n1positive pole, controllable current source I _n1minus earth GND;

NPN bipolar transistor N _n3emitter connect controllable current source I simultaneously _n2positive pole and the output end vo p of n level amplifier _n, controllable current source I _n2minus earth GND;

NPN bipolar transistor N _n4emitter connect controllable current source I simultaneously _n3positive pole and the output end vo n of n level amplifier _n, controllable current source I _n3minus earth GND.

Advantage of the present utility model: introduce in negative capacitance in the controllable gain amplifier level at m level High speed laser diode driving amplifier the utility model proposes (n level amplifier) and technology, can significantly reduce the load capacitance of (n-1) level amplifier under height output high frequency modulated current conditions, improve the voltage gain bandwidth of whole laser driver, strengthen its high frequency modulated electric current fan-out capability, the deterministic jitter that reduction causes due to bandwidth deficiency (deterministic jitter), improve the eye pattern characteristic of output high-frequency current signal, reduce error rate of system.

Accompanying drawing explanation

Fig. 1 is the theory diagram of High speed laser diode driving amplifier;

Fig. 2 is the physical circuit figure of n level amplifier in the High speed laser diode driving amplifier of traditional 10Gbps of relating in background technology or the above speed of 10Gbps;

Fig. 3 adopts described in execution mode one in negative capacitance and the physical circuit figure of the n level amplifier of the 10Gbps of technology or the laser diode drive integrated circuit of the above speed of 10Gbps;

Fig. 4 is that electric capacity is with bias current change curve comparison diagram; Article three, curve is respectively: adopt adopt in negative capacitance described in execution mode one and the High speed laser diode driver of technology in n level amplifier, utilize in negative capacitance and front gate-to-source electric capacity (or base-emitter electric capacity) C π with bias current change curve; Utilize in negative capacitance and after the single-ended input parasitic capacitance of n level amplifier C _{in, n}with bias current change curve; Equivalent negative capacitor C n is with bias current change curve;

Fig. 5 is the front n-1 level amplifier gain change curve comparison diagram that adopts tradition and the utility model laser diode driving amplifier (the above speed of 10Gbps or 10Gbps); In figure, dotted line is for adopting the front n-1 level amplifier gain change curve of traditional laser diode driving amplifier, and solid line is for adopting the front n-1 level amplifier gain change curve of the utility model laser diode driving amplifier;

Fig. 6 is the physical circuit figure of the 1st grade of amplifier of specific embodiment;

Fig. 7 is the physical circuit figure of the 2nd grade of amplifier of specific embodiment;

Fig. 8 is the physical circuit figure of specific embodiment 3rd level amplifier;

Fig. 9 is the physical circuit figure of the 4th grade of amplifier of specific embodiment.

Embodiment

Embodiment one: present embodiment is described below in conjunction with Fig. 1, Fig. 3 and Fig. 4, described in present embodiment, adopt in negative capacitance and the High speed laser diode driver IC of technology, it consists of the cascade of m level amplifier, and m is more than or equal to 1 natural number;

It is characterized in that, the n level amplifier in m level amplifier is to adopt in negative capacitance and the controllable gain amplifier of technology, n≤m, and n level amplifier comprises differential amplifier and source follower;

Described differential amplifier comprises controllable current source I _n1, nmos pass transistor N _n1, nmos pass transistor N _n2, load resistance R _n1, load resistance R _n2, capacitor C _n1and capacitor C _n2;

Described source follower comprises controllable current source I _n2, controllable current source I _n3, nmos pass transistor N _n3with nmos pass transistor N _n4;

Power vd D connects load resistance R simultaneously _n1one end, load resistance R _n2one end, nmos pass transistor N _n3drain electrode and nmos pass transistor N _n4drain electrode;

Load resistance R _n1the other end connect nmos pass transistor N simultaneously _n1drain electrode, capacitor C _n1one end and nmos pass transistor N _n3grid; Capacitor C _n1the other end connect nmos pass transistor N simultaneously _n2grid and the output end vo n of the n-1 level amplifier in m level amplifier _n-1;

Nmos pass transistor N _n2drain electrode connect nmos pass transistor N simultaneously _n4grid, capacitor C _n2one end and load resistance R _n2the other end; Capacitor C _n2the other end connect the output end vo p of the n-1 level amplifier in m level amplifier simultaneously _n-1with nmos pass transistor N _n1grid;

Nmos pass transistor N _n1source electrode and nmos pass transistor N _n2the common node Vm of source electrode _nconnect controllable current source I _n1positive pole, controllable current source I _n1minus earth GND;

Nmos pass transistor N _n3source electrode connect controllable current source I simultaneously _n2positive pole and the output end vo p of n level amplifier _n, controllable current source I _n2minus earth GND;

Nmos pass transistor N _n4source electrode connect controllable current source I simultaneously _n3positive pole and the output end vo n of n level amplifier _n, controllable current source I _n3minus earth GND.

Capacitor C _n1and capacitor C _n2can be linear capacitance, as MIM electric capacity; Or VVC voltage variable capacitance, as MOS varactor electric capacity etc.

In present embodiment, n level amplifier is for adopting in negative capacitance and the controllable gain amplifier of technology, and all the other m-1 level amplifiers adopt Arbitrary Difference amplifier.

Load resistance R _n1, nmos pass transistor N _n1drain electrode and capacitor C _n1common node Vcp _noutput for differential amplifier; Connect nmos pass transistor N _n3grid; Load resistance R _n2, nmos pass transistor N _n2drain electrode and capacitor C _n2common node Vcn _noutput for differential amplifier; Connect nmos pass transistor N _n4grid.

N _n1, N _n2, N _n3and N _n4adopt nmos pass transistor; The single-ended input parasitic capacitance Cin of n level amplifier, the size of n depends on N _n1grid and the equivalent capacity between source electrode size.

Capacitor C _n1and capacitor C _n2for realizing in negative capacitance and the core devices of technology, the input signal of the differential amplifier of n level amplifier connects the output signal Von of n-1 level amplifier _n-1, Vop _n-1, due to the intrinsic characteristic of difference channel itself, its input signal Von _n-1, Vop _n-1phase phasic difference 180 degree, therefore at n level amplifier in C _n1/ C _n2equivalent negative capacitor C _ncapacitance be negative, and this equivalence negative capacitance C _nwith single-ended input parasitic capacitance Cin, n (being mainly gate-to-source electric capacity) is connected in parallel, thereby the equivalent negative capacitor C that can utilize Cn1/Cn2 to produce _nneutralize along with bias current increase and constantly become large single-ended input parasitic capacitance C _{in, n}, its effect as shown in Figure 4.

Embodiment two: present embodiment is described below in conjunction with Fig. 1, Fig. 3 and Fig. 4, described in present embodiment, adopt in negative capacitance and the High speed laser diode driver IC of technology, it consists of the cascade of m level amplifier, and m is more than or equal to 1 natural number;

N level amplifier in m level amplifier is to adopt in negative capacitance and the controllable gain amplifier of technology, n≤m, and n level amplifier comprises differential amplifier and emitter follower;

Described differential amplifier comprises controllable current source I _n1, NPN bipolar transistor N _n1, NPN bipolar transistor N _n2, load resistance R _n1, load resistance R _n2, capacitor C _n1and capacitor C _n2;

Described emitter follower comprises controllable current source I _n2, controllable current source I _n3, NPN bipolar transistor N _n3with NPN bipolar transistor N _n4;

Power vd D connects load resistance R simultaneously _n1one end, load resistance R _n2one end, NPN bipolar transistor N _n3collector electrode and NPN bipolar transistor N _n4collector electrode;

Load resistance R _n1the other end connect NPN bipolar transistor N simultaneously _n1collector electrode, capacitor C _n1one end and NPN bipolar transistor N _n3base stage; Capacitor C _n1the other end connect NPN bipolar transistor N simultaneously _n2base stage and the output end vo n of the n-1 level amplifier in m level amplifier _n-1;

NPN bipolar transistor N _n2collector electrode connect NPN bipolar transistor N simultaneously _n4base stage, capacitor C _n2one end and load resistance R _n2the other end; Capacitor C _n2the other end connect the output end vo p of the n-1 level amplifier in m level amplifier simultaneously _n-1with NPN bipolar transistor N _n1base stage;

NPN bipolar transistor N _n1emitter and NPN bipolar transistor N _n2the common node Vm of emitter _nconnect controllable current source I _n1positive pole, controllable current source I _n1minus earth GND;

NPN bipolar transistor N _n3emitter connect controllable current source I simultaneously _n2positive pole and the output end vo p of n level amplifier _n, controllable current source I _n2minus earth GND;

NPN bipolar transistor N _n4emitter connect controllable current source I simultaneously _n3positive pole and the output end vo n of n level amplifier _n, controllable current source I _n3minus earth GND.

Capacitor C _n1and capacitor C _n2can be linear capacitance, as MIM electric capacity; Or VVC voltage variable capacitance, as MOS varactor electric capacity etc.

In present embodiment, n level amplifier is for adopting in negative capacitance and the controllable gain amplifier of technology, and all the other m-1 level amplifiers adopt Arbitrary Difference amplifier.

Load resistance R _n1, NPN bipolar transistor N _n1drain electrode and capacitor C _n1common node Vcp _noutput for differential amplifier; Connect NPN bipolar transistor N _n3base stage; Load resistance R _n2, NPN bipolar transistor N _n2collector electrode and capacitor C _n2common node Vcn _noutput for differential amplifier; Connect NPN bipolar transistor N _n4base stage.

N _n1, N _n2, N _n3and N _n4adopt NPN bipolar transistor; The single-ended input parasitic capacitance Cin of n level amplifier, the size of n depends on N _n1grid and the equivalent capacity between source electrode size.Capacitor C _n1and capacitor C _n2for realizing in negative capacitance and the core devices of technology, the input signal of the differential amplifier of n level amplifier connects the output signal Von of n-1 level amplifier _n-1, Vop _n-1, due to the intrinsic characteristic of difference channel itself, its input signal Von _n-1, Vop _n-1phase phasic difference 180 degree, therefore at n level amplifier in C _n1/ C _n2equivalent negative capacitor C _ncapacitance be negative, and this equivalence negative capacitance C _nwith single-ended input parasitic capacitance Cin, n (being mainly base-emitter electric capacity) is connected in parallel, thereby can utilize C _n1/ C _n2the equivalent negative capacitor C producing _nneutralize along with bias current increase and constantly become large single-ended input parasitic capacitance C _{in, n}, its effect as shown in Figure 4.

Embodiment three: present embodiment is described below in conjunction with Fig. 5 to Fig. 9, present embodiment provides a specific embodiment, get m=4, n=2, in described employing negative capacitance, formed by 4 grades of amplifier cascades with the High speed laser diode driver IC of technology, the 1st grade of amplifier is the differential amplifier with input 50 Ω impedance matching function, as shown in Figure 6; The 2nd grade of amplifier is with in negative capacitance and the variable-gain differential amplifier of technology, as shown in Figure 7; 3rd level amplifier is for realizing the differential amplifier of signal polarity reversion, as shown in Figure 8; The 4th grade of amplifier is the open collector differential amplifier with activeback-termination feedback network, as shown in Figure 9.

In the 1st grade of amplifier, bias current sources I ₁₁, I ₁₂and I ₁₃for fixed bias current source, N ₁₁and N ₁₂adopt NPN bipolar transistor.At input, resistance R is set _ipand resistance R _in, input resistance R _iptwo ends connect respectively input V _in+and V _b, resistance R _intwo ends connect respectively input V _in-and V _b, resistance R _ipand R _inchoosing value is that 50 Ω are to realize be less than-10dB of input return loss in 0 to 10GHz bandwidth; Bipolar transistor N ₁₁/ N ₁₂base stage connect respectively input V _in+/ V _in-, N ₁₁/ N ₁₂emitter connect together and link fixed bias current I ₁₁one end V _m1, N ₁₁/ N ₁₂collector electrode be connected respectively to load resistance R ₁₁/ R ₁₂port and emitter-follower transistor N ₁₃/ N ₁₄base stage, i.e. node V _cn1/ V _cp1; Emitter-follower transistor N ₁₃/ N ₁₄emitter be connected respectively to bias current sources I ₁₂/ I ₁₃port V _on1/ V _op1, and as the output node of the 1st grade of differential amplifier.

Structure described in the 2nd grade of differential amplifier employing execution mode two.Output is V _on2/ V _op2.

In 3rd level amplifier, bipolar transistor N _31a/ N _32aform a differential amplifier, bipolar transistor N _31b/ N _32bform another and input opposite polarity differential amplifier, transistor N _31a/ N _32aemitter be jointly connected to interrupteur SW ₁one end Vm _3a, transistor N _31b/ N _32bemitter be jointly connected to interrupteur SW ₂one end Vm _3b, interrupteur SW ₁and SW ₂the other end be jointly connected to bias current I ₃₁one end Vm ₃, transistor N _31a/ N _32bbase stage be jointly connected to V _on2, transistor N _31b/ N _32abase stage be jointly connected to V _op2, transistor N _31a/ N _31bcollector electrode be jointly connected to node V _cn3, transistor N _32a/ N _32bcollector electrode be jointly connected to node V _cp3; Load resistance R ₃₁/ R ₃₂one end be connected respectively to node V _cn3/ V _cp3; Transistor N ₃₃/ N ₃₄base stage be also connected respectively to node V _cn3/ V _cp3, transistor N ₃₃/ N ₃₄base stage output connect next stage node A1/A2; Transistor N ₃₃/ N ₃₄emitter be connected respectively to bias current sources I ₃₂/ I ₃₃one end V _on3/ V _op3, the output node of formation 3rd level amplifier.By Closing Switch SW ₁with cut-off switch SW ₂, impel transistor N _31a/ N _32ain forward operating state, transistor N _31b/ N _32bin cut-off state, so the output node V of 3rd level amplifier _op3/ V _on3polarity with input node V _op2/ V _on2polarity contrary; By cut-off switch SW ₁with Closing Switch SW ₂, impel transistor N _31a/ N _32ain cut-off state, transistor N _31b/ N _32bin forward operating state, so the output node V of 3rd level amplifier _op3/ V _on3polarity with input node V _op2/ V _on2polarity identical.

Bipolar transistor N in the 4th grade of amplifier ₄₁/ N ₄₂base stage connect respectively the output node V of upper level amplifier _on3/ V _op3, transistor N ₄₁/ N ₄₂emitter be jointly connected to one end Vm of bias current sources ₄, transistor N ₄₁/ N ₄₂collector electrode as the output node V of whole laser diode drive _out+/ V _out-, and be connected to the two ends of the laser diode outside chip and provide modulated current for laser diode by AC coupled connected mode; Resistance capacitance feedback network R _f1/ R _f2/ C _f1and R _f3/ R _f4/ C _f2form active back-termination, this feedback network is of value in frequency 0 to 10GHz frequency band and obtains superior output impedance matching performance, and is conducive to the reflected signal that absorption causes due to impedance Incomplete matching.Resistance R _f1one end connects output node V _out+, other end connected node V _fp; Resistance R _f2with shunt capacitance C _f1one end is connected to node V jointly _fp, the other end is connected to A1 jointly; Resistance R _f3one end connects output node V _out-, other end connected node V _fn; Resistance R _f4with shunt capacitance C _f2one end is connected to node V jointly _fn, the other end is connected to A2 jointly.

Important content of the present utility model is introduced negative capacitance in the 2nd grade of controllable gain differential amplifier in and technology.As shown in Fig. 6～Fig. 9, due to capacitor C _n1and C _n2cross-connection system, the equivalent C obtaining at differential amplifier input _n1and C _n2electric capacity is negative.When not considering transistor N ₂₁/ N ₂₂base resistance and during base stage-collector capacitance, the single-ended input capacitance value of the 2nd grade of amplifier is transistor N ₂₁/ N ₂₂base-emitter capacitor C _π, and C _πvalue along with the increase of transistorized collector current, constantly increase, now the voltage gain of the 1st grade of amplifier can be expressed as:

$G_{v1}=\frac{R_{11}(s{C}_{\mathrm{\μ}11}-g_{m11})}{1+s{R}_{11}(C_{\mathrm{\μ}11}+C_{\mathrm{\μ}13})}\·\frac{R_{L1}(g_{m13}+s{C}_{\mathrm{\π}13})}{1+s{R}_{L1}(C_{\mathrm{\π}13}+C_{\mathrm{\π}21})}---\left(1\right)$

R wherein ₁₁for load resistance, R _l1be that the 1st grade of amplifier is at output node V _op1/ V _on1the equivalent load resistance at place, g _m11for transistor N ₁₁/ N ₁₂mutual conductance, g _m13for transistor N ₁₃/ N ₁₄mutual conductance, C _{μ 11}for transistor N ₁₁/ N ₁₂base stage-collector capacitance, C _{μ 13}and C _{π 13}be respectively transistor N ₁₃/ N ₁₄base stage-collector capacitance and base-emitter electric capacity, C _{π 21}for transistor N ₂₁/ N ₂₂base-emitter electric capacity, s is j* ω.Obviously, in formula (1), there are 2 zero points and following two limits:

Limit 1: ${\mathrm{\ω}}_1=\frac{1}{R_{11}(C_{\mathrm{\μ}11}+C_{\mathrm{\μ}13})}$ Limit 2: ${\mathrm{\ω}}_2=\frac{1}{R_{L1}(C_{\mathrm{\π}13}+C_{\mathrm{\π}21})}---\left(2\right)$

Because the 2nd grade of amplifier is gain controlled amplifier, and gain is generally much larger than the 1st grade, therefore the input transistors N of the 2nd grade of differential amplifier ₂₁/ N ₂₂size will be much larger than the input transistors N of the 1st grade of amplifier ₁₁/ N ₁₂size, so the C in (1) formula _{π 21}will be much larger than other parasitic capacitances.Therefore limit 2 is the dominant pole of the 1st grade of amplifier and is determining voltage gain-three dB bandwidth.When needs constantly increase output high frequency lasers diode modulated current, the bias current of the 2nd grade of amplifier also needs constantly to increase to improve output modulated current, transistor N ₂₁/ N ₂₂base-emitter capacitor C _{π 21}also just and then bias current constantly becomes greatly, thereby causes the dominant pole frequency of the 1st grade of amplifier constantly to reduce, and then make it-and three dB bandwidth also following constantly reduction, as shown in Fig. 5 dotted line lines.

When adding negative capacitance C at the 2nd grade of amplifier _n1/ C _n2after, the voltage gain of the 1st grade of amplifier become for:

$G_{v1,\mathrm{nc}}=\frac{R_{11}(s{C}_{\mathrm{\μ}11}-g_{m11})}{1+s{R}_{11}(C_{\mathrm{\μ}11}+C_{\mathrm{\μ}13})}\·\frac{R_{L1}(g_{m13}+s{C}_{\mathrm{\π}13})}{1+s{R}_{L1}(C_{\mathrm{\π}13}+C_{\mathrm{\π}21}-C_{n1})}---\left(3\right)$

From formula (3), except the frequency of dominant pole limit 2 changes, the frequency of all the other two zeros and poles 1 does not change.Suitably select C _n1/ C _n2value can significantly improve the frequency of limit 2, therefore can increase the 1st grade of amplifier-three dB bandwidth, and then increase whole laser diode drive-three dB bandwidth.

From above analysis, the voltage gain bandwidth of High speed laser diode driver in the electronegative appearance the utility model proposes and when the variable-gain differential amplifier of technology can effectively improve large output modulated current, be conducive to reduce the deterministic jitter causing due to bandwidth deficiency, improve the eye pattern performance of output signal.

Claims (4)

1. adopt in negative capacitance and the High speed laser diode driver IC of technology, it consists of the cascade of m level amplifier, and m is more than or equal to 1 natural number;

It is characterized in that, the n level amplifier in m level amplifier is to adopt in negative capacitance and the controllable gain amplifier of technology, n≤m, and n level amplifier comprises differential amplifier and source follower;

Described differential amplifier comprises controllable current source I _n1, nmos pass transistor N _n1, nmos pass transistor N _n2, load resistance R _n1, load resistance R _n2, capacitor C _n1and capacitor C _n2;

Described source follower comprises controllable current source I _n2, controllable current source I _n3, nmos pass transistor N _n3with nmos pass transistor N _n4;

Power vd D connects load resistance R simultaneously _n1one end, load resistance R _n2one end, nmos pass transistor N _n3drain electrode and nmos pass transistor N _n4drain electrode;

Load resistance R _n1the other end connect nmos pass transistor N simultaneously _n1drain electrode, capacitor C _n1one end and nmos pass transistor N _n3grid; Capacitor C _n1the other end connect nmos pass transistor N simultaneously _n2grid and the output end vo n of the n-1 level amplifier in m level amplifier _n-1;

Nmos pass transistor N _n2drain electrode connect nmos pass transistor N simultaneously _n4grid, capacitor C _n2one end and load resistance R _n2the other end; Capacitor C _n2the other end connect the output end vo of the n-1 level amplifier in m level amplifier simultaneously _pn-1with nmos pass transistor N _n1grid;

Nmos pass transistor N _n1source electrode and nmos pass transistor N _n2the common node Vm of source electrode _nconnect controllable current source I _n1positive pole, controllable current source I _n1minus earth GND;

Nmos pass transistor N _n3source electrode connect controllable current source I simultaneously _n2positive pole and the output end vo of n level amplifier _pn, controllable current source I _n2minus earth GND;

Nmos pass transistor N _n4source electrode connect controllable current source I simultaneously _n3positive pole and the output end vo n of n level amplifier _n, controllable current source I _n3minus earth GND.

2. adopt in negative capacitance and the High speed laser diode driver IC of technology, it consists of the cascade of m level amplifier, and m is more than or equal to 1 natural number;

It is characterized in that, the n level amplifier in m level amplifier is to adopt in negative capacitance and the controllable gain amplifier of technology, n≤m, and n level amplifier comprises differential amplifier and emitter follower;

Described differential amplifier comprises controllable current source I _n1, NPN bipolar transistor N _n1, NPN bipolar transistor N _n2, load resistance R _n1, load resistance R _n2, capacitor C _n1and capacitor C _n2;

Described emitter follower comprises controllable current source I _n2, controllable current source I _n3, NPN bipolar transistor N _n3with NPN bipolar transistor N _n4;

Power vd D connects load resistance R simultaneously _n1one end, load resistance R _n2one end, NPN bipolar transistor N _n3collector electrode and NPN bipolar transistor N _n4collector electrode;

Load resistance R _n1the other end connect NPN bipolar transistor N simultaneously _n1collector electrode, capacitor C _n1one end and NPN bipolar transistor N _n3base stage; Capacitor C _n1the other end connect NPN bipolar transistor N simultaneously _n2base stage and the output end vo n of the n-1 level amplifier in m level amplifier _n-1;

NPN bipolar transistor N _n2collector electrode connect NPN bipolar transistor N simultaneously _n4base stage, capacitor C _n2one end and load resistance R _n2the other end; Capacitor C _n2the other end connect the output end vo of the n-1 level amplifier in m level amplifier simultaneously _pn-1with NPN bipolar transistor N _n1base stage;

NPN bipolar transistor N _n1emitter and NPN bipolar transistor N _n2the common node Vm of emitter _nconnect controllable current source I _n1positive pole, controllable current source I _n1minus earth GND;

NPN bipolar transistor N _n3emitter connect controllable current source I simultaneously _n2positive pole and the output end vo p of n level amplifier _n, controllable current source I _n2minus earth GND;

NPN bipolar transistor N _n4emitter connect controllable current source I simultaneously _n3positive pole and the output end vo n of n level amplifier _n, controllable current source I _n3minus earth GND.

3. according to adopting described in claim 1 or 2 in negative capacitance and the High speed laser diode driver IC of technology, it is characterized in that capacitor C _n1and capacitor C _n2all adopt linear capacitance or VVC voltage variable capacitance to realize.

4. according to adopting described in claim 1 or 2 in negative capacitance and the High speed laser diode driver IC of technology, it is characterized in that capacitor C _n1and capacitor C _n2all adopt MIM electric capacity or MOS varactor electric capacity to realize.