CN203772982U - Current controllable capacitor surge testing circuit - Google Patents
Current controllable capacitor surge testing circuit Download PDFInfo
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- CN203772982U CN203772982U CN201420053204.7U CN201420053204U CN203772982U CN 203772982 U CN203772982 U CN 203772982U CN 201420053204 U CN201420053204 U CN 201420053204U CN 203772982 U CN203772982 U CN 203772982U
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- Prior art keywords
- channel mos
- signal generator
- capacitor
- mos pipe
- electric current
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- 238000012360 testing method Methods 0.000 title claims abstract description 41
- 239000003990 capacitor Substances 0.000 title claims abstract description 31
- 239000004065 semiconductor Substances 0.000 claims description 14
- 230000008878 coupling Effects 0.000 claims description 9
- 238000010168 coupling process Methods 0.000 claims description 9
- 238000005859 coupling reaction Methods 0.000 claims description 9
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 abstract description 11
- 229910052715 tantalum Inorganic materials 0.000 abstract description 10
- 238000005516 engineering process Methods 0.000 description 4
- 238000005259 measurement Methods 0.000 description 4
- 238000013459 approach Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000011161 development Methods 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 239000007784 solid electrolyte Substances 0.000 description 1
- 238000010998 test method Methods 0.000 description 1
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- Testing Of Individual Semiconductor Devices (AREA)
- Testing Electric Properties And Detecting Electric Faults (AREA)
Abstract
The utility model discloses a current controllable capacitor surge testing circuit. The circuit comprises a capacitor to be tested and an external power supply, wherein the external power supply provides a power source, and the voltage of the external power supply is adjustable. The circuit also comprises an external signal generator, an N-channel MOS transistor and a P-channel MOS transistor, wherein the N-channel MOS transistor and the P-channel MOS transistor are respectively connected to the two ends of the capacitor to be tested and the external signal generator. The current controllable capacitor surge testing circuit aims at a high-voltage, large-capacity, ultralow-ESR tantalum capacitor, the N-channel MOS transistor and P-channel MOS transistor match the signal generator in use, and thus, the current controllable capacitor surge testing circuit has the advantages of being large in testing voltage range, capable of large-current charge and discharge, controllable in surge current, capable of carrying out test for multiple times within a short period, and low in cost.
Description
Technical field
The utility model relates to capacitor technology field, relates in particular to the controlled capacitor surge test circuit of a kind of electric current.
Background technology
Along with the development and progress of tantalum capacitor production technology and tantalum powder application technology, the capacity of solid electrolyte Ta capacitor, voltage have all had very large lifting, and the application of organic bath makes the ESR(equivalent series resistance of tantalum electric capacity) reduce significantly.For the tantalum capacitor of high voltage, large capacity, ultralow ESR, surge test method is in the past inapplicable, and main cause is:
1. the electric current of surge test device-restrictive is in the past difficult to regulate or do not have completely current limit.From circuit theory, be only the tantalum capacitor of 50m Ω for test voltage 50V, direct current ESR, known its moment lowest high-current value up to 1000A, so huge electric current is enough to tantalum electric capacity to cause the damage of unrepairable.
For capacitor series resistance can be controlled moment maximum current.The same tantalum capacitor taking test voltage 50V, direct current ESR as 50m Ω, as example, now only needs R=2.45 Ω, moment maximum current Imax can be restricted to 20A.And may need the resistance in series R of different resistances for different product, traditional surge equipment is difficult to change easily.
2. the surge test that a large amount of number of times are carried out in modern tantalum capacitor production requirement to capacitor is to ensure reliability, and as the T490 series of KEMET, its surge voltage test is 1000 times, and traditional surge test is difficult to complete at short notice so a large amount of testing time.
Utility model content
The utility model is mainly to solve existing technical matters in prior art, thus provide a kind of surge current controlled, can take multiple measurements the short time, the controlled capacitor surge test circuit of electric current with low cost.
Above-mentioned technical matters of the present utility model is mainly solved by following technical proposals:
The capacitor surge test circuit that electric current of the present utility model is controlled, comprise testing capacitance and the external power supply that power source is provided, the voltage of described external power supply is adjustable, also comprise outer signal generator, N-channel MOS pipe and P channel MOS tube, described N-channel MOS pipe is connected with described testing capacitance two ends and outer signal generator respectively with P channel MOS tube.
Further, described N-channel MOS pipe comprises first to fourth metal-oxide-semiconductor parallel with one another, between described second, third metal-oxide-semiconductor, is also provided with the first toggle switch, and described the first toggle switch is for controlling the quantity of N raceway groove paralleling MOS pipe.
Further, described P channel MOS tube comprises the 5th to the 8th metal-oxide-semiconductor parallel with one another, between described the 6th, the 7th metal-oxide-semiconductor, is also provided with the second toggle switch, and described the second toggle switch is for controlling the quantity of P raceway groove paralleling MOS pipe.
Further, between described N-channel MOS pipe and described outer signal generator, be also provided with the first coupling capacitance, between described P channel MOS tube and described outer signal generator, be also provided with the second coupling capacitance, the size of described first, second coupling capacitance is 1 μ F and the withstand voltage 200V that is greater than.
Further, described outer signal generator is output as the square wave of 10Vpp.
Further, the withstand voltage of described N-channel MOS pipe and P channel MOS tube is all greater than 200V.
Compared with prior art, the utility model has the advantage of: for high voltage, large capacity, ultralow ESR tantalum electric capacity, coordinate the use of signal generator by N raceway groove, P channel MOS tube, make the utlity model has that test voltage scope is large, large current density power, surge current are controlled, can take multiple measurements the short time, the advantage such as with low cost.
Brief description of the drawings
In order to be illustrated more clearly in the utility model embodiment or technical scheme of the prior art, to the accompanying drawing of required use in embodiment or description of the Prior Art be briefly described below, apparently, accompanying drawing in the following describes is only embodiment more of the present utility model, for those of ordinary skill in the art, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is the theory diagram of the controlled capacitor surge test circuit of electric current of the present utility model;
Fig. 2 is the circuit diagram of the controlled capacitor surge test circuit of electric current of the present utility model.
Embodiment
Below in conjunction with accompanying drawing, preferred embodiment of the present utility model is described in detail, thereby so that advantage of the present utility model and feature can be easier to be it will be appreciated by those skilled in the art that, protection domain of the present utility model is made to more explicit defining.
Consult shown in Fig. 1, the capacitor surge test circuit that electric current of the present utility model is controlled, comprise testing capacitance C1 and the external power supply V1 that power source is provided, the voltage of external power supply V1 is adjustable, it also comprises outer signal generator XFG1, N-channel MOS pipe 1 and P channel MOS tube 2, wherein, N-channel MOS pipe 1 is connected with testing capacitance C1 two ends and outer signal generator XFG1 respectively with P channel MOS tube 2.Preferably, outer signal generator XFG1 is output as the square wave of 10Vpp.
Consult shown in Fig. 2, N-channel MOS pipe 1 comprises first to fourth metal-oxide-semiconductor (Q1-Q4) parallel with one another, wherein, between second, third metal-oxide-semiconductor (Q2, Q3), be also provided with the first toggle switch J1, the first toggle switch J1 is for controlling the quantity of N raceway groove paralleling MOS pipe.P channel MOS tube 2 comprises the 5th to the 8th metal-oxide-semiconductor (Q5-Q8) parallel with one another, between the 6th, the 7th metal-oxide-semiconductor (Q6, Q7), is also provided with the second toggle switch J2, and the second toggle switch J2 is for controlling the quantity of P raceway groove paralleling MOS pipe.In the utility model, also can before each metal-oxide-semiconductor, all configure toggle switch, for controlling more accurately the metal-oxide-semiconductor quantity of place in circuit.
Between N-channel MOS pipe 1 and outer signal generator XFG1, be also provided with the first coupling capacitance C1, between P channel MOS tube 2 and outer signal generator XFG1, be also provided with the second coupling capacitance C2, the size of first, second coupling capacitance (C1, C2) is 1 μ F and the withstand voltage 200V that is greater than, and the withstand voltage of N-channel MOS pipe 1 and P channel MOS tube 2 is also all greater than 200V.
According to the principle of work of the controlled capacitor surge test circuit of electric current, the utility model is further introduced below:
After power on circuitry, in signal generator XFG1 no signal output situation, the Vgs of P channel MOS tube and N-channel MOS pipe is 0, not conducting of circuit.In the time of signal generator XFG1 output low level (10V), N-channel MOS pipe keeps not on-state and the unlatching of P channel MOS tube conducting, electric current is by P channel MOS tube to testing capacitance C1 charging, and charging current is determined jointly by the leakage of P channel MOS tube, source electrode both end voltage conducting internal resistance Rds_on poor and P channel MOS tube.In the time that testing capacitance C1 charging voltage approaches supply voltage, P channel MOS tube both end voltage is poor is zero substantially, and electric current is zero substantially, and testing capacitance C1 has charged.
In the time of signal generator XFG1 output high level (10V), P channel MOS tube is closed the conducting of N-channel MOS pipe, electric capacity discharges by N-channel MOS pipe, and size of current is determined jointly by N-channel MOS pipe drain-source utmost point both end voltage and N-channel MOS pipe conducting internal resistance Rds_on.In the time that capacitance voltage approaches zero, N-channel MOS pipe both end voltage is poor is zero substantially, and electric current is zero substantially, and capacitor discharge completes.
In the utility model, from electric circuit knowledge, after in parallel, total conducting internal resistance Rds_on always will reduce, and maximum charging current will always be determined by the Rds_on of charging voltage and P channel MOS tube, and maximum discharge current will always be determined by the Rds_on of sparking voltage and N-channel MOS pipe.Thus, can reach by controlling toggle switch the object of controlling charging and discharging currents size.Use test circuit of the present utility model, in the time that test frequency is 10Hz, carry out 1000 surge tests only needs 100 second time to complete, and can take multiple measurements at short notice.
The utility model is for high voltage, large capacity, ultralow ESR tantalum electric capacity, coordinate the use of signal generator by N raceway groove, P channel MOS tube, make the utlity model has that test voltage scope is large, large current density power, surge current are controlled, can take multiple measurements the short time, the advantage such as with low cost.
Above, be only embodiment of the present utility model, but protection domain of the present utility model is not limited to this, any variation of expecting without creative work or replacement, within all should being encompassed in protection domain of the present utility model.Therefore, protection domain of the present utility model should be as the criterion with the protection domain that claims were limited.
Claims (6)
1. the capacitor surge test circuit that electric current is controlled, comprise testing capacitance (C1) and the external power supply (V1) of power source is provided, the voltage of described external power supply (V1) is adjustable, it is characterized in that: also comprise outer signal generator (XFG1), N-channel MOS pipe (1) and P channel MOS tube (2), described N-channel MOS pipe (1) is connected with described testing capacitance (C1) two ends and outer signal generator (XFG1) respectively with P channel MOS tube (2).
2. the controlled capacitor surge test circuit of electric current according to claim 1, it is characterized in that: described N-channel MOS pipe (1) comprises first to fourth metal-oxide-semiconductor (Q1-Q4) parallel with one another, between described second, third metal-oxide-semiconductor (Q2, Q3), be also provided with the first toggle switch (J1), described the first toggle switch (J1) is for controlling the quantity of N raceway groove paralleling MOS pipe.
3. the controlled capacitor surge test circuit of electric current according to claim 1, it is characterized in that: described P channel MOS tube (2) comprises the 5th to the 8th metal-oxide-semiconductor (Q5-Q8) parallel with one another, between described the 6th, the 7th metal-oxide-semiconductor (Q6, Q7), be also provided with the second toggle switch (J2), described the second toggle switch (J2) is for controlling the quantity of P raceway groove paralleling MOS pipe.
4. the capacitor surge test circuit controlled according to the electric current described in claim 2 or 3, it is characterized in that: between described N-channel MOS pipe (1) and described outer signal generator (XFG1), be also provided with the first coupling capacitance (C1), between described P channel MOS tube (2) and described outer signal generator (XFG1), be also provided with the second coupling capacitance (C2), the size of described first, second coupling capacitance (C1, C2) is 1 μ F and the withstand voltage 200V that is greater than.
5. the controlled capacitor surge test circuit of electric current according to claim 4, is characterized in that: described outer signal generator (XFG1) is output as the square wave of 10Vpp.
6. the controlled capacitor surge test circuit of electric current according to claim 5, is characterized in that: the withstand voltage of described N-channel MOS pipe (1) and P channel MOS tube (2) is all greater than 200V.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420053204.7U CN203772982U (en) | 2014-01-27 | 2014-01-27 | Current controllable capacitor surge testing circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420053204.7U CN203772982U (en) | 2014-01-27 | 2014-01-27 | Current controllable capacitor surge testing circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203772982U true CN203772982U (en) | 2014-08-13 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201420053204.7U Expired - Lifetime CN203772982U (en) | 2014-01-27 | 2014-01-27 | Current controllable capacitor surge testing circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203772982U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110794278A (en) * | 2019-10-23 | 2020-02-14 | 浙江大学 | SiC MOSFET surge performance test method |
| CN113391151A (en) * | 2021-06-11 | 2021-09-14 | 江苏法拉电子有限公司 | Capacitor quality inspection system based on large current impact |
-
2014
- 2014-01-27 CN CN201420053204.7U patent/CN203772982U/en not_active Expired - Lifetime
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110794278A (en) * | 2019-10-23 | 2020-02-14 | 浙江大学 | SiC MOSFET surge performance test method |
| CN110794278B (en) * | 2019-10-23 | 2020-10-27 | 浙江大学 | SiC MOSFET surge performance test method |
| CN113391151A (en) * | 2021-06-11 | 2021-09-14 | 江苏法拉电子有限公司 | Capacitor quality inspection system based on large current impact |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CX01 | Expiry of patent term |
Granted publication date: 20140813 |
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| CX01 | Expiry of patent term |