CN203616477U - Phase-locked loop and subcarrier loop combined phase discrimination tracking loop - Google Patents

Phase-locked loop and subcarrier loop combined phase discrimination tracking loop Download PDF

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Publication number
CN203616477U
CN203616477U CN201320737746.1U CN201320737746U CN203616477U CN 203616477 U CN203616477 U CN 203616477U CN 201320737746 U CN201320737746 U CN 201320737746U CN 203616477 U CN203616477 U CN 203616477U
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loop
subcarrier
ring
tracking
carrier
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Chinese (zh)
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张洪伟
王祥峰
马俊峰
常亮
李云娜
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Beijing Hualongtong Technology Co Ltd
Tianjin 712 Communication and Broadcasting Co Ltd
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Beijing Hualongtong Technology Co Ltd
Tianjin 712 Communication and Broadcasting Co Ltd
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Abstract

The utility model relates to a phase-locked loop and subcarrier loop combined phase discrimination tracking loop which comprises a carrier tracking loop, a subcarrier tracking loop and a spread spectrum code tracking loop. The carrier tracking loop comprises a carrier numerical control oscillator which is orderly connected with a cross-correlation processing unit, integral reset units, a carrier ring and subcarrier ring combined phase discriminator and a PLL loop filter to form a loop. The subcarrier tracking loop comprises a subcarrier numerical control oscillator which is orderly connected with the cross-correlation processing unit, the integral reset units, the carrier ring and subcarrier ring combined phase discriminator and an SLL loop filter to form a loop. The spread spectrum code tracking loop comprises a code numerical control oscillator which is orderly connected with the cross-correlation processing unit, the integral reset units, a spread spectrum code ring phase discriminator and a DLL loop filter to form a loop. The utility model provides the circuit for solving a phase ambiguity problem caused by noise when a signal-to-noise ratio is low, the precision of phase detection is raised, and the accurate tracking is achieved.

Description

A kind of phaselocked loop is combined phase demodulation track loop with subcarrier ring
Technical field
The utility model relates to satellite navigation tracking technique field, is specifically related to a kind of BOC modulation signal phaselocked loop is combined tracking loop with subcarrier ring.
Background technology
In gps system, Galileo system and Chinese dipper system, two-phase PSK (BPSK) modulation is the modulation system that satellite navigation system adopts at first, but because number of signals increases and available band resource-constrained, under finite bandwidth, improve signal performance and the interference that reduces between adjacent signals becomes research emphasis.Independently european galileo system will be used similarly new navigation signal in same frequency band and new frequency band.Although some new navigation signals will continue to use BPSK modulation, the great majority in them will use new binary offset carrier (BOC) modulator approach, and the main thought of BOC modulation is the interference reducing between BPSK modulation signal.
Binary offset carrier (BOC) modulation is to be modulated to basis with BPSK, increases by one using square wave as subcarrier, the coded signal assisted modulation that satellite is produced, and subcarrier-modulated function can be expressed as
Figure 370389DEST_PATH_IMAGE001
, subcarrier speed it is code check
Figure 432596DEST_PATH_IMAGE003
integral multiple, or code check 1/2nd times again of integers, BOC modulation standard representation is
Figure 145523DEST_PATH_IMAGE004
.Be modulated to again afterwards on main carrier i.e. signal
Figure 817944DEST_PATH_IMAGE005
with a frequency be
Figure 489097DEST_PATH_IMAGE002
subcarrier multiply each other, make the frequency spectrum of signal split into two parts, be positioned at left and right two parts of main carrier frequency.
In the time that the BOC signal receiving is correlated with by the local coupling BOC reference signal producing, consequent related function has multiple peaks, the poor error signal producing between L door value and E door value can be directed to P door the summit of central peak, thereby test is postponed to equal true delays, realize accurate delay estimation.If but in the time that E door and L door occupy the both sides at one of secondary peak, error signal can be directed to P door secondary peak (may be to bear), now error signal is also zero, but it is not corresponding with true delays that test postpones, be locked on peak, limit to track loop possible errors, occur following the tracks of ambiguity.This phenomenon is called as " false lock " or " slippage ".
In order to eliminate the fuzzy problem of BOC signal trace, many track algorithms have been proposed, as be called as " clash into jump " technology, binary estimation technique and by subcarrier and frequency spreading code division from triple loop tracks technology." shock jumps " technology compares with P door value with special slow by increasing a pair of spy's door morning that is called, thus definite test delay.This algorithm is that to wait as long for be cost, and this is very serious problem for navigational system.
Binary estimation technique is mapped as the multimodal autocorrelation function of BOC signal without fuzzy two-dimensional function.This technology can guarantee that track loop is locked on the main peak of BOC signal correction function.But binary estimation technique does not make full use of the periodicity of subcarrier, therefore poor for the tracking stability of weak signal.
In by name a kind of binary offset carrier signal tracking loop patent of being applied for by Beijing Institute of Aeronautics university in 2010, introduce subcarrier tracking loop and eliminated the problem of BOC signal ambiguity, the phase detector algorithm that wherein carrier wave ring and subcarrier ring use is two quadrant arc tangent phase detector, but does not consider the impact of noise on phase demodulation error.If have in the situation of noise existence, that is:
Figure 773841DEST_PATH_IMAGE007
Figure 597572DEST_PATH_IMAGE009
Figure 939429DEST_PATH_IMAGE010
Wherein,
Figure 910927DEST_PATH_IMAGE011
with represent respectively the phase error of carrier wave ring and the output of subcarrier ring phase detector.Although the two quadrant ATAN phase detector of selecting here to 180 degree phase-unsensitives, has been avoided the impact of input intermediate frequency BOC signal bit saltus step on PLL and SLL.When considering
Figure 926867DEST_PATH_IMAGE013
,
Figure 941090DEST_PATH_IMAGE014
,
Figure 836103DEST_PATH_IMAGE015
in integral expression, exist
Figure 226764DEST_PATH_IMAGE016
when noise item, if
Figure 8775DEST_PATH_IMAGE017
with
Figure 683646DEST_PATH_IMAGE018
all very little, and be in the environment that signal to noise ratio (S/N ratio) is very low, can find that phase demodulation error amount is submerged in noise, brings very high blur level to identified result.
In addition, at subcarrier and frequency spreading code division, in tracking technique, what subtract in advance that after-power phase detector algorithm adopts is single
Figure 567420DEST_PATH_IMAGE019
branch road, that is:
Figure 994728DEST_PATH_IMAGE021
But lead and lag code branch road comprises respectively
Figure 896825DEST_PATH_IMAGE019
with
Figure 190534DEST_PATH_IMAGE022
two branch roads, if only use single branch road carries out phase demodulation and can cause code tracking loop phase demodulation error very large.
Summary of the invention
The utility model is to realize by such technical scheme: a kind of phaselocked loop is combined phase demodulation track loop with subcarrier ring, it is characterized in that, comprises carrier tracking loop, subcarrier tracking loop and frequency spreading tracking ring;
Carrier tracking loop comprises carrier number controlled oscillator, and carrier wave number of rings controlled oscillator is combined phase detector and PLL loop filter with cross correlation process unit, integration zero clearing unit, carrier wave ring with subcarrier ring; Be in turn connected to form loop;
Subcarrier tracking loop comprises subcarrier digital controlled oscillator, and subcarrier digital controlled oscillator combines phase detector with cross correlation process unit, integration zero clearing unit, carrier wave ring with subcarrier ring and SLL loop filter is in turn connected to form loop;
Frequency spreading tracking ring comprises yardage controlled oscillator, and yardage controlled oscillator and cross correlation process unit, integration zero clearing unit, spreading code ring phase detector and DLL loop filter are in turn connected to form loop.
The tracking error of code
Figure 779221DEST_PATH_IMAGE023
.
the beneficial effects of the utility model are:the utility model provides the circuit that solves the phase ambiguity problem being caused by noise in the time that signal to noise ratio (S/N ratio) is lower, for the fuzzy problem of binary offset carrier signal tracking, in carrier tracking loop and subcarrier tracking loop associating track loop, adopt a kind of phase detecting method of combining to solve the phase ambiguity problem being caused by noise in the time that signal to noise ratio (S/N ratio) is lower, the method has improved precision of phase discrimination, realizes accurate tracking.
Accompanying drawing explanation
Fig. 1 is a kind of phaselocked loop of the utility model is combined phase demodulation track loop block diagram with subcarrier ring;
Fig. 2 is third-order digital loop filter block scheme;
Fig. 3 is the actual frequency error between local carrier and incoming carrier
Figure 850338DEST_PATH_IMAGE019
,
Figure 79063DEST_PATH_IMAGE022
phase vectors figure.
In figure: 01---carrier tracking loop, 02---subcarrier tracking loop, 03---frequency spreading tracking ring, 04---phase detector module, 05---loop filter module, 101---multiplier unit, 102---carrier wave number of rings controlled oscillator, 103---subcarrier number of rings controlled oscillator, 104---code number of rings controlled oscillator, 105---DLL phase detector, 106---PLL combines phase detector with SLL, and 107---DLL loop filter, 108---SLL loop filter, 109---PLL loop filter, 110---integration zero clearing unit.
Embodiment
Below in conjunction with accompanying drawing, the utility model is described in further detail.
A kind of phaselocked loop is combined phase demodulation track loop with subcarrier ring, as shown in Figure 1, comprises carrier tracking loop 01, subcarrier tracking loop 02 and frequency spreading tracking ring 03; Carrier tracking loop is called for short PLL, and subcarrier tracking loop is called for short SLL, and frequency spreading tracking ring is called for short DLL.
Carrier tracking loop 01, comprises that carrier number controlled oscillator 102, cross correlation process unit (multiplier) 101, integration zero clearing unit 110, carrier wave ring combine phase detector 106 and PLL loop filter 109 with subcarrier ring;
Subcarrier tracking loop 02, comprises that subcarrier digital controlled oscillator 103, cross correlation process unit (multiplier) 101, integration zero clearing unit 110, carrier wave ring combine phase detector 106 and SLL loop filter 108 with subcarrier ring;
Frequency spreading tracking ring 03, comprises spreading code digital controlled oscillator 104, cross correlation process unit (multiplier) 101, integration zero clearing unit 110, spreading code ring phase detector 105 and DLL loop filter 107.
Described phaselocked loop is combined the step that phase demodulation track loop processes BOC signal and is comprised with subcarrier ring:
First carrier tracking loop 01 in loop is processed the intermediate frequency BOC signal receiving, and local cosine and sinusoidal carrier signal that itself and carrier wave number of rings controlled oscillator 102 are generated multiply each other, and local cosine and sinusoidal signal and reception signal frequency are all
Figure 734166DEST_PATH_IMAGE003
, this process is quadrature demodulation, has realized carrier wave and has peeled off, and obtains
Figure 191693DEST_PATH_IMAGE019
road and
Figure 382896DEST_PATH_IMAGE022
road signal.
Subcarrier tracking loop 02 in loop, wherein, the local cosine that subcarrier number of rings controlled oscillator 103 produces and sine wave subcarrier signal are all with reception subcarrier signal frequency
Figure 18408DEST_PATH_IMAGE024
, by what obtain
Figure 659342DEST_PATH_IMAGE019
road and it is relevant that road signal and local cosine and sine wave subcarrier signal carry out, and obtains
Figure 464804DEST_PATH_IMAGE025
,
Figure 784401DEST_PATH_IMAGE026
, with four branch roads, realize the phaselocked loop of BOC signal subcarrier phase are followed the tracks of, and complete subcarrier and peel off.
Frequency spreading tracking ring 03 in loop, wherein, by code number of rings controlled oscillator 104 produce San road leading (E), instant (P) and lag behind yard respectively with
Figure 48395DEST_PATH_IMAGE025
, ,
Figure 972062DEST_PATH_IMAGE027
with
Figure 184869DEST_PATH_IMAGE028
si Gezhi road signal is correlated with, and realizes the despreading of spreading code.Code after despreading is input to integration zero clearing unit 110, by integration zero clearing unit 110, related operation result is added up, obtain multichannel correlation and be respectively
Figure 202241DEST_PATH_IMAGE029
,
Figure 727288DEST_PATH_IMAGE015
,
Figure 518526DEST_PATH_IMAGE030
,
Figure 472707DEST_PATH_IMAGE031
,
Figure 282269DEST_PATH_IMAGE014
,
Figure 116233DEST_PATH_IMAGE032
,
Figure 942237DEST_PATH_IMAGE033
,
Figure 139257DEST_PATH_IMAGE013
,
Figure 367107DEST_PATH_IMAGE034
with
Figure DEST_PATH_IMAGE035
,
Figure 745874DEST_PATH_IMAGE036
,
Figure DEST_PATH_IMAGE037
.
According to the above description, can realize scheme of the present utility model in conjunction with art technology.

Claims (1)

1. phaselocked loop is combined a phase demodulation track loop with subcarrier ring, it is characterized in that, comprises carrier tracking loop, subcarrier tracking loop and frequency spreading tracking ring;
Carrier tracking loop comprises carrier number controlled oscillator, and carrier wave number of rings controlled oscillator is combined phase detector and PLL loop filter with cross correlation process unit, integration zero clearing unit, carrier wave ring with subcarrier ring; Be in turn connected to form loop;
Subcarrier tracking loop comprises subcarrier digital controlled oscillator, and subcarrier digital controlled oscillator combines phase detector with cross correlation process unit, integration zero clearing unit, carrier wave ring with subcarrier ring and SLL loop filter is in turn connected to form loop;
Frequency spreading tracking ring comprises yardage controlled oscillator, and yardage controlled oscillator and cross correlation process unit, integration zero clearing unit, spreading code ring phase detector and DLL loop filter are in turn connected to form loop.
CN201320737746.1U 2013-11-21 2013-11-21 Phase-locked loop and subcarrier loop combined phase discrimination tracking loop Withdrawn - After Issue CN203616477U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109581436A (en) * 2017-09-28 2019-04-05 清华大学 Adjacent frequency navigation signal joint receiver and method of reseptance

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109581436A (en) * 2017-09-28 2019-04-05 清华大学 Adjacent frequency navigation signal joint receiver and method of reseptance

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