CN108667484B

CN108667484B - Instantaneous frequency measurement and demodulation method for incoherent spread spectrum digital transceiver

Info

Publication number: CN108667484B
Application number: CN201810252879.7A
Authority: CN
Inventors: 王宇舟; 邓强; 韩锞; 唐赛芬
Original assignee: Southwest Electronic Technology Institute No 10 Institute of Cetc
Current assignee: Southwest Electronic Technology Institute No 10 Institute of Cetc
Priority date: 2018-03-26
Filing date: 2018-03-26
Publication date: 2020-03-31
Anticipated expiration: 2038-03-26
Also published as: CN108667484A

Abstract

The invention discloses an instantaneous frequency measurement and demodulation method of an incoherent spread spectrum digital transceiver, aiming at providing an instantaneous frequency measurement and demodulation method which has low algorithm realization complexity and resists multi-station interference, and the method is realized by the following technical scheme: the incoherent receiving algorithm module captures Doppler frequency and code phase, and the synchronous head detects the sampling data of the analog-to-digital converter to complete synchronous head correlation detection; the instantaneous frequency measurement module and the digital down-conversion module measure and compensate and eliminate Doppler by near real-time ms magnitude Doppler frequency difference, and carry out filtering extraction and matched filtering through an IDF filtering extractor, directly takes sign bits for I, Q data, and changes the sign bits into single-bit subsequent processing, so that incoherent demodulation and RS decoding are completed to output user data; the spread spectrum emission algorithm module carries out symbol mapping and modulation after framing, RS encoding, differential encoding and direct sequence spread spectrum processing, and sends the symbols to DAC for digital-to-analog conversion, and the DAC outputs instantaneous frequency measurement and demodulation signals through filtering by a second filter through a double-end to single-end transformer.

Description

Instantaneous frequency measurement and demodulation method for incoherent spread spectrum digital transceiver

Technical Field

The invention is mainly applied to the field of low-cost short-distance wireless formation or cluster measurement and control or low-speed data transmission, and provides a low-cost spread spectrum digital transceiver with multi-node interference resistance, small size and light weight for a short-distance wireless formation system below 10 km.

Technical Field

Any digital communication system is the transmission of discrete signals, and the signals at the transmitting end and the receiving end are required to be identical in frequency and consistent in phase so as to correctly demodulate information. Spread spectrum communication systems are no exception. In a coherent spread spectrum digital communication system, a receiving end and a transmitting end must realize information code element synchronization, PN code element and sequence synchronization and radio frequency carrier frequency synchronization. Only if these synchronizations are achieved, the floating expansion system can work normally. It can be said that there is no spread spectrum communication system without synchronization. Spread spectrum communication is an important technology in the current information field, and has the characteristics of strong anti-interference information, good confidentiality, low power consumption and the like, so that the spread spectrum communication becomes a widely applied communication technology. The sequence spreading code sequence is a relatively common pseudo-random sequence, which is highly regarded in spread spectrum communications because it has relatively good autocorrelation, is a pseudo-noise sequence in that sense, and small sequences are easy to generate and duplicate. Scrambling, encryption, bit error rate measurement in digital data, and code division multiple access for synchronous and satellite communications are also commonly used in sequences. Due to some of the relevant properties of pseudo-random codes, pseudo-random sequences are often used as a spectrum for spreading in spread spectrum communication systems. Important indexes such as speed, length and coding type of the characteristics directly influence the performance of the spread spectrum communication system. It may occur that the same waveform continuously appears for a long period of time in a symbol sequence of a random signal. This may result in the receiver not being able to clearly identify the start and stop points of the symbol.

Carrier synchronization in any communication system, there are few signals transmitted and received. In practical applications, it is useful to extract the transmitted signal from the received signal. Because of the distortion of noise, interference, etc. encountered during the transmission of the signal. These factors affect the amplitude, phase and frequency parameters of the signal itself. Synchronization is the process by which better recovery of the original signal requires parameter estimation of the signal. Synchronization in a communication system commonly used in practice includes carrier synchronization, code synchronization, bit synchronization, and the like. Where carrier synchronization plays a very important role. There are two main methods of carrier synchronization. The pilot insertion method. This method is to insert a special synchronization of the wave in the signal transmitted by the transmitter. The pilot is typically a single or a plurality of unmodulated sinusoidal signals of a particular frequency. A pilot signal is then presented at the receiving end, and the phase and frequency of this pilot signal is used to determine the phase and frequency of the carrier signal generated locally at the receiver. This method is often used more often in the transmission of signals and signals. The direct method is to extract the carrier signal directly from the received useful signal at the receiver end without the need for the pilot signal to be transmitted exclusively as in the first method. This method may also be called a self-synchronization method. The direct method has the characteristic that the signal carrying information has all transmission power in the transmission process. The prior art generally proposes a carrier wave in a signal received at a receiving end by using a frequency multiplication and frequency division method. But there is a phase uncertainty in the division. In addition, there is instability in the channel, which causes the phase of the received signal to fluctuate randomly, and if the carrier wave at the receiving end cannot change with its tracking, the same phase reversal will occur. The receiver is unable to determine the starting position of the spreading code in the received signal under normal conditions due to factors such as unstable clocks of the transceivers, signal propagation delay, poor start-up of the spreading sequence, etc. To solve such a problem, a code synchronization system is required in the receiver system.

The first step of a code synchronization system is code acquisition, which is to align the code phase in the receiver with the code phase in the received signal, and is also called coarse synchronization. This is followed by code tracking, which serves to further reduce the error in the phase of the local code of the receiver with respect to the received signal. An important characteristic of the pseudo-random sequence is that the main peak of the autocorrelation function is large, and the acquisition and tracking of the spreading sequence is realized according to the characteristic. The main link in the digital transceiver is pseudo code synchronization, and two key steps in the code synchronization technology are code acquisition and code tracking. A serial capture method for solving the sum of absolute values based on the segment correlation of a correlator; tracking uses a delay locked loop approach. In practical applications, the synchronization process of the codes is relatively complicated, and there are many methods for synchronizing the codes. Most of the major research is in the frequency and time domain, considering the received signal domain. And, compared with the time domain, processing the received signal from the frequency domain to achieve synchronization has quite high anti-interference and multipath effects, and can solve the problems caused by different frequencies and Doppler effect of the transmitting and receiving ends. The pseudo code synchronization process is to make the pseudo codes at two ends of the digital transceiver keep consistent, and the pseudo code synchronization process mainly comprises two parts, one is the pseudo code capture, and the other is the pseudo code follow-up code capture stage, so that the phase difference between the pseudo random code generated by the digital receiver and the received pseudo random code is smaller than a certain threshold, and the threshold is set to be the minimum chip width smaller than half of the pseudo random code in the practical application process. Most of the capturing methods adopt serial capturing, parallel capturing, serial-parallel capturing, multi-channel correlation capturing, matched filter methods and the like, and no special new technology exists at present.

At present, the domestic research on the pseudo code tracking mainly comprises the selection of loop broadband and the design of loop parameters to change the performance of the pseudo code tracking loop. A great number of experts in China want to use technologies such as wavelet transformation and neural network to realize a new way for pseudo code capture, but most of the current methods are only in the research stage and are not applied practically. After the acquisition, the tracking phase is entered, so that the pseudo random phase generated by the digital receiver is closer to the phase of the pseudo random code of the digital transmitter, that is, the phase of the pseudo code received by the digital receiver. Tracking of pseudo codes is also called fine synchronization, and generally, after code tracking, symbol errors of a transmitting end and a receiving end are controlled within one tenth of a symbol. Code tracking is generally a tracking method using a delay-locked loop. The delay-locked-loop approach is very effective in tracking the phase difference of the two signals because the autocorrelation function has a two-valued characteristic so that it can be tracked by the delay-locked loop. This method is used for pseudo code tracking in most communication systems. The transceiver uses digital signal processing technology and is realized by adaptive filtering. The transceivers currently in operation are basically amplitude-keying self-transmitting and self-receiving transceivers, and a non-coherent detection (15' +) mode, namely envelope detection, is adopted. It is simple to implement, but the noise immunity is not ideal. The receiver can be realized by a correlator consisting of a coherent demodulator and an integrator, provided that a filter after coherent demodulation must be designed strictly according to the requirement of matched filtering to realize the real optimal reception. The coherent detection of the signal can enhance the energy resonance of the information, greatly improve the signal-to-noise ratio, but needs to generate local co-frequency and co-phase carriers. Meanwhile, in order to achieve optimal reception, a sharp filter is also implemented to suppress noise energy and improve the signal-to-noise ratio. If the local carrier with the same frequency and phase as the signal carrier can not be generated, serious distortion can be brought after coherent demodulation; meanwhile, the passive filter for the filter with a high Q value is extremely complex in design, high in process level requirement, difficult to ensure performance, and large in time delay, which is the reason that coherent demodulation is rarely adopted in the existing transceiver.

Domestic and foreign literature discloses a plurality of spread spectrum transceivers adopting non-relevant methods, the disclosed schemes usually adopt more relevant spread spectrum receiving methods, most of the schemes adopt a complex code synchronous ring scheme, the receivers are still complex, and FPGA resources are relatively more consumed; the algorithm structure comprises three loops of a code loop, a carrier loop and a bit synchronization loop, and the design is the highest in complexity and is not suitable for low-cost design. The scheme of instantaneous frequency measurement compensation of the present invention is not employed. The direct sequence spread spectrum system can encounter various interferences, and besides multi-path interference, broadband interference (usually, self-noise, such as thunder, atmospheric noise, ignition devices of industrial equipment, and the like) is common. Demodulation adopts a detection structure of frame head detection after non-correlation cross product and dot product calculation, differential demodulation is insensitive to carrier frequency offset, but the carrier frequency offset is too large or generates a phase, and the phase is superposed on data to cause a judgment problem. In a synchronous transmission network, data stations are allocated to a series of time slots, each station being able to transmit data only in its own time slot, while other stations are unable to transmit information in this time slot. Thus, some empty time slots are not utilized, resulting in waste of resources.

Disclosure of Invention

The invention aims to provide an instantaneous frequency measurement and demodulation method of an incoherent spread spectrum digital transceiver, which has the advantages of small volume, light weight, low cost, low algorithm implementation complexity and multi-station interference resistance, aiming at the defects of high cost and high algorithm complexity in the prior art, so as to solve the problems of wireless short-distance remote control and data transmission instantaneous frequency measurement and demodulation.

The above object of the present invention can be achieved by the following measures, a method for instantaneous frequency measurement and demodulation of an incoherent spread spectrum digital transceiver, having the following technical features: the FPGA is internally provided with an incoherent receiving algorithm module and a spread spectrum transmitting algorithm module, and externally connected with a BPI configuration chip, a clock management chip CLK and an analog-digital converter ADC (analog-digital converter) connected with the clock management chip CLK through a Complementary Metal Oxide Semiconductor (CMOS) memory, wherein the analog-digital converter ADC is connected with a first filter through a single-end-to-double-end transformer; the digital-to-analog converter DAC is externally hung at the output end of the FPGA and is connected with the second filter through the double-end-to-single-end transformer; the clock management chip CLK divides the internal and external clocks with single-end input into three paths, the first path of clock is supplied to the FPGA through the first CMOS, the second path of clock outputs 40MHz frequency through the second CMOS and is supplied to the analog-to-digital converter ADC as a sampling clock, and the third path of clock outputs a low-voltage differential signal LVDS to be supplied to the digital-to-analog converter DAC at the output end of the FPGA as the sampling clock; the noncoherent receiving algorithm module receives a filtered signal which is sent to a first filter of an analog-to-digital converter ADC through down-conversion of a first single-end-to-double-end transformer, the filtered signal is filtered, Doppler frequency and code phase are captured, frame header detection is carried out after noncorrelation cross product and dot product calculation is adopted, a synchronous head detects sampling data of the analog-to-digital converter ADC, and correlation is completed; in FPGA, ADC sampling data is subjected to ms magnitude instantaneous frequency measurement and updating period through a digital down-conversion and instantaneous frequency measurement unit module, near real-time ms magnitude Doppler frequency difference compensation eliminates Doppler, sign bit is directly taken from I, Q data after filtering extraction and matched filtering through an IDF filtering extractor, the sign bit is changed into single bit for subsequent processing, then RS decoding is completed, and user data is output after noncoherent demodulation and RS decoding; the spread spectrum transmitting algorithm module receives user data, symbol mapping and modulation are carried out after framing, RS coding, differential coding and direct sequence spread spectrum processing, the user data are sent to a digital-to-analog converter DAC for digital-to-analog conversion, and the digital-to-analog converter DAC outputs instantaneous frequency measurement and demodulation signals through filtering of a second filter through a double-end-to-single-end transformer.

Compared with the prior art, the invention has the following beneficial effects.

Small size, light weight and low cost. The invention adopts a field programmable gate array FPGA to embed an incoherent receiving algorithm module and a spread spectrum transmitting algorithm module, and is externally connected with a BPI configuration chip, a clock management chip CLK and an analog-to-digital converter ADC connected with the clock management chip CLK through a Complementary Metal Oxide Semiconductor (CMOS) memory, wherein the analog-to-digital converter ADC is connected with a first filter through a single-end-to-double-end transformer; and a digital-to-analog converter DAC is externally hung at the output end of the FPGA and is connected with the second filter through a double-end-to-single-end transformer. The FPGA adopts the Xilinx-XC65SLX100 chip with 100 ten thousand logic resources, the hardware design cost is low, the size of the whole PCB is 65mm x 35mm, the weight is 20g, the power consumption is less than 4W, and the whole design requirement is met. The system cost, volume, weight and power consumption can be reduced, the hardware design and the digital algorithm adopt a low-cost and low-complexity implementation method, the adopted software and hardware methods optimize the cost and the implementation complexity from the perspective of a communication system, the system requirements are met, and compared with a complex coherent receiving implementation scheme, the method has the advantages of low cost, small volume, light weight and low power consumption. And a digital down converter with instantaneously adjustable frequency and instantaneous frequency measurement Doppler compensation are adopted. And outputting user data after noncoherent demodulation and RS decoding. Because the signal only takes the sign as the subsequent correlation and the frame head detection are greatly simplified, the method of directly taking the sign bit can eliminate the AGC module required by the preceding stage and also greatly simplify the subsequent operation processing of the system, such as changing multiplication into addition and subtraction and the like.

The algorithm is low in implementation complexity. The invention adopts the field programmable gate array FPGA to embed the incoherent receiving algorithm module and the spread spectrum transmitting algorithm module to realize the capture of Doppler frequency and code phase, and combines the frame synchronization fuzzy detection of dot product cross product data results to enhance the robustness of the detection; demodulation adopts non-correlation cross product and dot product calculation and then frame head detection, an instantaneous frequency measurement unit module ms magnitude order updating period is adopted, an open-loop non-coherent spread spectrum receiving algorithm is adopted, meanwhile, various simplified JPL simplified algorithms in engineering are combined, and various simplified algorithms such as similar accumulators are adopted in correlation, so that the consumption of computing resources and the FPGA power consumption are further reduced. The method does not adopt complex algorithm structures such as a spread spectrum code ring, a carrier ring, a bit synchronization ring and the like, adopts an RS (15, 11) coding, differential coding, a spread spectrum code length of 32-512 and a BPSK (binary phase shift keying) modulation mode, directly receives in an open loop mode, optimizes a communication receiving and transmitting link, does not need to design a complex code synchronization ring, a carrier synchronization ring and a bit synchronization ring in a related receiver scheme, reduces algorithm complexity and reduces FPGA (field programmable gate array) resource consumption. By combining with subsequent incoherent detection, the dot-product cross-product incoherent demodulation can tolerate 2kHz frequency offset, the front Doppler frequency compensation pressure is not large, instantaneous frequency measurement can be satisfied, a complex loop is not needed, and the resource consumption of an algorithm and the complexity of the whole receiving scheme are further reduced; IDF adopts the method of accumulator and periodic output zero clearing to replace the traditional FIR filter, changes the correlator into the accumulator, reduces the resource consumption, JPL simplified algorithm adopts the adder-subtractor to realize the complex modulo substitution of the original multiplier resource, directly carries out hard decision on I, Q data, simplifies the complexity of the subsequent despreading correlation calculation. The method of frame head fuzzy detection is adopted, namely, the data of dot product and cross product of the data and the data of both the dot product and the cross product of the data are taken out and not taken for the subsequent data to carry out frame head detection, the data frame of the detected frame head is output as a correct frame to be received and output, and the necessary complex carrier phase parameter estimation algorithm is avoided.

Multi-station interference resistance. Aiming at the application characteristic that the system needs to quickly enter a working state before the frequency drift is stable due to crystal oscillator and other factors when the system is powered on, the incoherent receiving algorithm module receives the sampling data of the analog-to-digital converter ADC after the down-conversion of the first single-end to double-end transformer and the filtering processing of the first filter, and completes the correlation, synchronous head detection and incoherent demodulation in the FPGA. The adopted incoherent scheme carries out detection judgment on both cross products and dot products, and the problems that a phase-locked loop cannot be locked or is unlocked due to impact and the like by other methods are solved. The spread spectrum emission algorithm module has high processing gain of direct sequence spread spectrum, can perform relevant reception on useful signals, performs parallel spectrum expansion on interference signals, and can filter most of interference power by a receiver intermediate frequency band-pass filter, so that the anti-interference performance of the system is very strong.

The algorithm is low in implementation complexity. The invention adopts a two-stage frequency measurement scheme (rough measurement and accurate measurement), has a frequency compensation updating period of millisecond ms magnitude and can meet the actual engineering requirements; the instantaneous frequency measurement Doppler compensation method, the dot product-cross product non-correlation demodulation method, the synchronous head detection method and the data frame head detection method adopted by the invention ensure that a digital algorithm at a receiving end does not need a complex carrier synchronous ring, a bit synchronous ring and a pseudo code synchronous ring, so the method has obvious advantages in complexity compared with the traditional non-coherent receiving algorithm and the coherent receiving algorithm.

The invention adopts an integral zero clearing IDF filtering extractor, sign bit judgment direct hard judgment, JPL simplified algorithm, simple correlation and the like to reduce the consumption of computing resources; the IDF filter is cleared by the integral when the oversampling multiple of the signal is very high, which is realized by adopting an accumulator instead of the traditional FIR filter by multiplying accumulator resources, and adjacent sampling points are accumulated together, and the functions of the filter and extraction are simultaneously completed, after the required number of points are accumulated, the integrator (accumulator) is cleared for the next accumulation, so that the resource consumption is low; the sign taking is to make hard decision on fixed point data with multi-bit width (such as 10 bits), output and obtain 0 and 1bit streams, simplify various calculations on the bit streams and save FPGA resource consumption; the JPL simplified algorithm simplifies complex modulo operation into addition operation, thereby saving FPGA resource consumption; the correlation after the hard decision is carried out on the bit stream water, a multi-bit fixed point multiplier is not adopted, and simple AND or non-equipotential operation is carried out, so that the operation is simplified.

Drawings

In order that the invention may be more clearly understood, it will now be described by way of example with reference to the accompanying drawings, in which:

fig. 1 is a block diagram of the instantaneous frequency measurement and demodulation hardware circuit of the non-coherent spread spectrum digital transceiver of the present invention.

Fig. 2 is a schematic circuit diagram of the non-coherent reception algorithm module and the spread spectrum transmission algorithm module of fig. 1.

Fig. 3 is a schematic block diagram of the instantaneous frequency measurement module of fig. 2.

Fig. 4 is a schematic diagram of a frequency-code phase two-dimensional slotted search of the frequency slotted search of fig. 3.

Fig. 5 is a schematic block diagram of the non-coherent demodulation module of fig. 2.

Detailed Description

See fig. 1. In the embodiments described below, the hardware circuit for instantaneous frequency measurement and demodulation of the incoherent spread spectrum digital transceiver adopted by the method for instantaneous frequency measurement and demodulation of the incoherent spread spectrum digital transceiver comprises an open-loop incoherent receiving algorithm module and a spread spectrum transmitting algorithm module which are embedded in a Field Programmable Gate Array (FPGA) chip on a PCB (printed circuit board). A clock management chip, a filter chip, a level conversion chip, a BPI configuration chip, an interface plug-in, an analog-to-digital converter (ADC) for receiving signals and transmitting signals and a digital-to-analog converter (DAC) are hung on the periphery of the Field Programmable Gate Array (FPGA). The FPGA is externally connected with a BPI configuration chip, a clock management chip CLK and an analog-to-digital converter ADC (analog-to-digital converter) of which the clock management chip CLK is connected with a Complementary Metal Oxide Semiconductor (CMOS) through a Complementary Metal Oxide Semiconductor (CMOS), wherein the input end of a non-coherent receiving algorithm module is connected with a first single-end-to-double-end transformer and a first filter through the analog-to-digital converter ADC, and the analog-to-digital converter ADC is connected with the first filter through the; the digital-to-analog converter DAC is externally hung at the output end of the FPGA and is connected with the second filter through the double-end-to-single-end transformer; the clock management chip CLK divides the internal and external clocks with single-end input into three paths, the first path of clock is supplied to the FPGA through the first CMOS, the second path of clock outputs 40MHz frequency through the second CMOS and is supplied to the analog-to-digital converter ADC as a sampling clock, and the third path of clock outputs a low-voltage differential signal LVDS to be supplied to the digital-to-analog converter DAC at the output end of the FPGA as the sampling clock; the noncoherent receiving algorithm module receives a filtered signal which is sent to a first filter of an analog-to-digital converter ADC through down-conversion of a first single-end-to-double-end transformer, the filtered signal is filtered, Doppler frequency and code phase are captured, frame header detection is carried out after noncorrelation cross product and dot product calculation is adopted, a synchronous head detects sampling data of the analog-to-digital converter ADC, and correlation is completed; in FPGA, ADC sampling data is subjected to ms magnitude instantaneous frequency measurement and updating period through a digital down-conversion and instantaneous frequency measurement unit module, near real-time ms magnitude Doppler frequency difference compensation eliminates Doppler, sign bit is directly taken from I, Q data after filtering extraction and matched filtering through an IDF filtering extractor, the sign bit is changed into single bit for subsequent processing, then RS decoding is completed, and user data is output after noncoherent demodulation and RS decoding; the spread spectrum transmitting algorithm module receives user data, symbol mapping and modulation are carried out after framing, RS coding, differential coding and direct sequence spread spectrum processing, the user data are sent to a digital-to-analog converter DAC for digital-to-analog conversion, and the digital-to-analog converter DAC outputs instantaneous frequency measurement and demodulation signals through filtering of a second filter through a double-end-to-single-end transformer.

The FPGA is a core algorithm chip of a digital transceiver algorithm, and can adopt an FPGA chip with the model of XC6SLX100-2FG484I of Xilinx company, wherein the voltage of the FPGA core chip is 1.2V, the I/O voltage is 3.3V, and the logic resource is 100 ten thousand gates. A BPI configuration chip is externally hung on the FPGA, and 32MB supporting a BPI mode with the model number of S29GL256P10TFI010 can be adopted.

The ADC chip can adopt ADS6142 chip with 14bit resolution, 80Msps sampling rate and TI company model. The DAC can adopt a chip with 14bit resolution, 1Gsps sampling rate and AD9957 model number of ADI company.

The filter may be a LFCN-80 chip. The clock chip adopts AD9513 of ADI, the clock input range is 0-1.6 GHz, the AD9513 clock output comprises 3 paths of LVDS or 6 paths of CMOS, wherein the maximum output frequency of the LVDS is 800MHz, and the maximum output frequency of the CMOS is 250 MHz. The internal and external clocks are switched by changing an alternating current coupling capacitor, the input end of the AD9513 clock adopts single-end input, 1 path of CMOS (40MHz) is output to be provided for an ADC chip and used as a sampling clock, one path of LVDS output is provided for a DAC sampling clock, and the other path of CMOS is provided for an FPGA.

The single-end to double-end transformer may be a 1:1 level conversion transformer (TC1-1T +) by Mini-Circuit.

The level conversion transformer converts the single-ended input signal into a differential signal and sends the differential signal to the ADC chip or conversely converts the DAC output differential signal into a single-ended analog signal output.

See fig. 2. Because the same-frequency multi-station spread spectrum system adopted by the embodiment is non-correlated reception, and does not affect subsequent demodulation processing according to the fact that the actually-measured Doppler frequency offset is within 2MHz, the requirement on the frequency measurement precision of the instantaneous frequency measurement module is not high, but the real-time performance of frequency measurement has the requirement on the frequency measurement updating period of ms magnitude, the instantaneous frequency measurement module must adopt the conditions of inhibiting signal interference of other stations and using a single station, and the instantaneous frequency measurement scheme can further simplify a search algorithm; the link channel condition of the practical system is better, and the instantaneous frequency measurement method is adopted, so that the requirements of incoherent demodulation and pseudo code correlation can be met, and therefore, no complex loops such as a carrier synchronization loop, a spread spectrum code synchronization loop, a symbol synchronization loop and the like are designed in a receiving algorithm, and the complexity of system implementation is reduced. The FPGA is internally provided with a spread spectrum transmitting algorithm module and an incoherent receiving algorithm module.

The spread spectrum transmission algorithm module comprises: the system comprises a data framing module, an RS coding module, a differential coding module, a direct sequence spread spectrum module, a symbol mapping module, a modulation module, a forming filter module and the like, wherein the data framing module realizes that a user bit stream forms a physical layer transmission frame according to a fixed frame length, and a frame synchronization head and a frame information field for synchronization and information acquisition of a receiving end are added; the RS coding module adopts IPcore in FPGA to realize RS (15, 11) format RS coding; the differential coding module adopts a coding formula:

differential encoding is realized, namely, the encoding output Out (k) at the time k is obtained by the XOR of the input in (k) at the time k and the encoding output Out (k-1) at the time k-1; the direct sequence spread spectrum module selects corresponding pseudo codes from the pseudo code sequence module as spread spectrum codes according to PN code numbers set by users, and carries out spread spectrum on the input user data bit stream; the spread data bit stream realizes the symbol mapping of the binary phase shift keying BPSK modulation, namely, a bit symbol 0 is mapped into a-1 constellation point, and a bit symbol 1 is mapped into a +1 constellation point; constellation to be input by modulation moduleMultiplying the point data by a carrier cos generated by a carrier generation module to obtain modulation output; the shaping filtering module carries out shaping filtering on the modulation signal according to a required shaping coefficient so as to reduce intersymbol interference, improve frequency efficiency and improve the roll-off characteristic of an out-of-band frequency spectrum; the data after the shaping filter is sent to the DAC for digital-to-analog conversion.

The incoherent receiving algorithm module mainly comprises: the system comprises modules of digital down-conversion, filtering extraction, matched filtering, symbol taking, correlation and non-correlation demodulation with synchronous head detection, RS decoding and the like which are sequentially connected in series, and an instantaneous frequency measurement module and a controlled local oscillator module which are connected in parallel between the digital down-conversion module and the filtering extraction. The digital down-conversion module performs digital down-conversion on the digital signal input from the ADC by using the local oscillation signal with the controlled local oscillation module frequency so as to eliminate carrier Doppler frequency offset in the input signal; if the digital down-conversion module can not completely eliminate the carrier Doppler, a certain residual frequency offset is left, the instantaneous frequency measurement module detects the residual frequency offset, the residual frequency offset acts on the controlled local oscillator module to control the output local oscillator frequency value, and the carrier frequency offset residual in the input signal of the ADC is suppressed to a smaller value through the closed-loop control of the loop; the filtering and extracting module realizes low-pass filtering and reduces the higher sampling rate of input data (namely ADC sampling rate) to the rate which meets the bandwidth requirement and is beneficial to realizing low-speed clock in FPGA; the filter shaping coefficient of the matched filter module is matched with the shaping filter of the transmitting end, and the data after matched filtering is further extracted and reduced to the modulation symbol rate; the sign taking module directly takes coincidence with the input sign, namely hard judgment, positive fixed point data is judged to be 0, negative fixed point data is judged to be 1, and therefore output data of the sign module is bit stream data; the related module performs phase-shifting related search for synchronous head arrival information by using local pseudo codes on input bit stream data, transmits the data to the non-related demodulation module for demodulation once the synchronous head is searched, and continues real-time search (burst communication mode) if the data is lost; the non-relevant demodulation module adopts a cross product-dot product differential decoding mode to decode, and then detects a user data frame header to obtain a correct data frame and outputs the correct data frame to the RS decoding module; the RS decoding module also adopts IPcore in FPGA to decode, and the decoding format is the same as the coding format.

See fig. 3. In the instantaneous frequency measurement module, because 64 spread spectrum systems work at the same time with the same frequency, the instantaneous frequency measurement module can not directly adopt FFT to measure the frequency, because it is easy to measure the Doppler frequency of other stations and generate errors, the invention adopts a two-dimensional search method of frequency sub-slot and pseudo code phase sub-slot, the frequency dimension sub-slot can eliminate the frequency deviation of the frequency sub-slot in advance, the local pseudo code phase sub-slot is different delay (phase) versions of the pseudo code, the frequency sub-slot and the local code phase sub-slot are continuously adjusted to search during the two-dimensional search, only when the Doppler frequency and the spread code phase of the input signal fall into the frequency sub-slot and the local pseudo code sub-slot set during the two-dimensional search, the following related integrator can be enabled to obtain higher related peaks to detect; in the search, if the frequency slot is incorrect, the frequency difference existing after the frequency slot is eliminated can cause the integral value of the correlator to be very small and not to pass through the threshold, if the spread spectrum code (signals of other stations) in the signal is different from the local code, the pseudo codes of different stations are not related, the output of the integrator is also very small and not to pass through the threshold, if the spread spectrum code in the signal is the spread spectrum code of the station, but the phases (delays) are different, the cross-correlation integral value cannot pass through the threshold, and only after the signal and the local frequency slot, the pseudo code and the pseudo code phases are all corresponding, the integrator has very high correlation peak output. In order to improve the frequency measurement precision, the invention is also cascaded with a first-level FFT precision frequency measurement after two-dimensional search.

The specific implementation method comprises the following steps: the noncoherent receiving algorithm module sends data output by the digital down-conversion module to an integral zero filter (IDF) in the instantaneous frequency measurement module for filtering and extracting to realize down-sampling, the data after down-sampling restores Doppler frequency signals in the signals through a phase discriminator module, the possible maximum frequency range of carrier Doppler is subdivided into a plurality of sub-slots or sub-slots, the central frequency of the frequency slot is used as Doppler frequency offset, and a plurality of search modules are utilized to perform parallel search in the frequency slots divided in the maximum possible frequency range; when searching in a frequency slot, pseudo code phase shift search is required to be carried out, two-dimensional search instantaneous frequency measurement of Doppler and code phase is realized, and frequency offset is eliminated by dividing the searched current Doppler into slot frequencies; after the Doppler frequency offset is eliminated by the slot frequency, all possible phase-shifting phase correlation searches are carried out by moving the local code phase, the correlation result is compared with a given threshold to determine whether the search is successful, the search is successful through the threshold, otherwise, the same method is adopted to search all frequency slots, the code phase value of which the correlation result passes through the frequency slot threshold is used as the Doppler frequency offset value and the code phase offset value, all phase-shifting phases of all frequency slots and pseudo codes are searched for the reliability of the search process in actual realization, and the frequency and the pseudo code phase of the frequency slot corresponding to the maximum correlation peak are reserved to be used as the final searched frequency measurement result; the output selection module sends the searched data corresponding to the maximum peak frequency slot and the code phase to an FFT fine frequency measurement module for fine frequency measurement, a fast algorithm of a discrete Fourier transform (FFT) is adopted for complex number transformation, after the FFT, power spectrum calculation needs to be carried out, a multiplier needs to be used for modulus calculation, and in order to save resources and simplify calculation, a JPL simplified algorithm is adopted for modulus calculation, and the calculation formula is as follows:

in the formula, the complex number z is x + yi, i is an imaginary unit symbol, and x and y are real numbers.

The instantaneous frequency measurement value finally output by the instantaneous frequency measurement module is the sum of the frequency of the sub-slot and the precision frequency measurement, the sum value is the carrier Doppler frequency offset in the data, the sum value is sent to the controlled local oscillator module to generate a corresponding orthogonal carrier signal, and the carrier Doppler is eliminated by mixing the orthogonal carrier signal with the input signal of the digital down-conversion module.

The phase discriminator module has the functions of eliminating the influence of modulation data information and recovering the Doppler frequency in the suppressed carrier wave, and as the modulation mode adopts BPSK modulation, the complex phase discrimination formula is as follows:

in the formula I_re、Q_imFor the complex phase detection output signal, I, Q for the phase detector input signal, Δ ω is the carrier doppler angular frequency,

is the initial phase of the carrier.

See fig. 4. In order to meet the requirement of ms magnitude instantaneous frequency measurement real-time performance, the instantaneous frequency measurement module of the embodiment adopts 16 parallel search modules to search the code phase slotted frequency simultaneously, so as to realize a coarse frequency measurement value; in the coarse frequency measurement, a searcher of an instantaneous frequency measurement module carries out parallel search outwards in the positive direction and the negative direction from the center frequency f0 of the frequency-code phase slotted frequency; when a searcher searches a certain frequency slot, Doppler of the sub-slot is eliminated, then correlation integral is slid in the code phase dimension, the correlation integral outputs an integral value to each code phase, when the integral value exceeds a design threshold value, the central frequency of the corresponding frequency slot is a coarse frequency measurement value, and the corresponding code phase is the coarse phase of a code.

After the frequency binning is determined, the equation for the bin frequency elimination is as follows, I, Q output data after eliminating the bin frequency,

wherein, i (t), q (t) are output values of the phase detector at time t, i.e. input values of the frequency search, Δ ω is a frequency offset between the slot dividing frequency and the center frequency f0,

is the phase difference in the process of frequency elimination of the sub-slots.

In the embodiment, 64 PN codes with excellent autocorrelation and poor cross-correlation characteristics are selected as the spreading codes of 64 stations, the length of the spreading codes is 32-512, the spreading codes are stored in the RAM, every time 1bit of data is input, the spreading codes with corresponding lengths are read according to the number of the spreading codes, when the input data is 0, the inversion of the spreading codes is used as output, and when the input data is 1, the inversion is not needed, and the output is directly performed.

The receiver does not adopt a complex code ring, a carrier ring and a bit synchronization ring to reduce the complexity and the cost of the receiver any more, the incoherent demodulation part is decomposed by indexes, the requirement on the instantaneous frequency measurement updating period is in the magnitude of ms, the requirement on the frequency measurement precision is about 2MHz, and the method meets the system requirement in time and precision when the search parallelism n is 16.

See fig. 5. In order to avoid the conditions that the small probability exceeds pi/2 and the data bit is fuzzy, a frame header fuzzy detection method is adopted, so that errors, namely data of dot product and cross product of the data and non-subsequent data of the dot product and the cross product of the data are avoided, frame header detection is carried out on the data, and the data frame with the detected frame header is output and accepted as a correct data frame and output.

The uncorrelated differential decoding demodulation is realized by differential decoding, can eliminate the phase ambiguity of symbols, and is not very sensitive to Doppler. In the dot product-cross product incoherent differential decoding, two paths of data of I, Q paths of non-subsequent bit streams are taken and sent to a dot product and cross product module to complete cross product and dot product differential decoding, dot product and cross product results are sent to a frame header detection module to carry out frame header detection on the bit streams of the cross product and the dot product and the bit streams of the two paths of non-subsequent bit streams, and the detected frame header is used as correct data frame differential output data. The formula of the differential decoding is as follows:

dot product: dot (k) ═ I (k-1) · I (k) + Q (k-1) · Q (k)

Cross product: cross (k) ═ I (k-1) × Q (k) — Q (k-1) × I (k)

Wherein dot (k) represents dot product output at time k, cross (k) represents cross product output at time k, i (k), and q (k) represent data bit at time k I, Q, respectively;

the carrier phase and the initial value are eliminated after the dot product and cross product operation, but the carrier frequency offset generates a phase which is superposed on data, so that the problem of judgment is caused. When in use

When the sum of the data is less than pi/2, the correct data is output to the dot product branch; when in use

When the data is larger than pi/2, correct data is output in a cross product branch; the phase values resulting from the frequency offset are:

where Δ f is the frequency offset value, T_bIs a bit interval; the scheme performs data detection on the outputs of cross products and dot products, ensures the correct receiving capability of data frames, and reduces the frequency measurement precision requirement and the real-time requirement of an instantaneous frequency measurement module.

What has been described above is merely a preferred embodiment of the invention. It should be noted that variations and modifications can be made by those skilled in the art without departing from the principle of the present invention, and these variations and modifications should be construed as falling within the scope of the present invention.

Claims

1. An instantaneous frequency measurement and demodulation method of an incoherent spread spectrum digital transceiver has the following technical characteristics: the FPGA is internally provided with an incoherent receiving algorithm module and a spread spectrum transmitting algorithm module, and externally connected with a BPI configuration chip, a clock management chip CLK and an analog-digital converter ADC (analog-digital converter) connected with the clock management chip CLK through a Complementary Metal Oxide Semiconductor (CMOS) memory, wherein the analog-digital converter ADC is connected with a first filter through a single-end-to-double-end transformer; the digital-to-analog converter DAC is externally hung at the output end of the FPGA and is connected with the second filter through the double-end-to-single-end transformer; the clock management chip CLK divides the internal and external clocks with single-end input into three paths, the first path of clock is supplied to the FPGA through the first CMOS, the second path of clock outputs 40MHz frequency through the second CMOS and is supplied to the analog-to-digital converter ADC as a sampling clock, and the third path of clock outputs a low-voltage differential signal LVDS to be supplied to the digital-to-analog converter DAC at the output end of the FPGA as the sampling clock; the noncoherent receiving algorithm module receives a filtered signal which is subjected to down-conversion by the first single-end to double-end transformer and is sent to a first filter of the analog-to-digital converter ADC for filtering, the Doppler frequency and the code phase are captured, noncorrelation cross product and dot product calculation is adopted, then frame header detection is carried out, synchronous head detection is carried out, and sampling data of the analog-to-digital converter ADC are processed to complete correlation; in FPGA, ADC sampling data is subjected to digital down conversion, an instantaneous frequency measurement unit module performs ms magnitude instantaneous frequency measurement and an updating period, two-stage frequency measurement of rough measurement and precise measurement is adopted, near real-time ms magnitude Doppler frequency difference compensation is adopted to eliminate Doppler, I, Q data is directly signed after filtering extraction and matched filtering by an IDF filtering extractor, the sign is changed into single bit for subsequent processing, then noncoherent demodulation and RS decoding are completed, and user data is output after RS decoding; the spread spectrum transmitting algorithm module receives user data, symbol mapping and modulation are carried out after framing, RS coding, differential coding and direct sequence spread spectrum processing, the user data are sent to a digital-to-analog converter DAC for digital-to-analog conversion, and the digital-to-analog converter DAC outputs instantaneous frequency measurement and demodulation signals through filtering of a second filter through a double-end-to-single-end transformer.

2. The instantaneous frequency measurement and demodulation method of an incoherent spread spectrum digital transceiver of claim 1, wherein: the hardware circuit adopted by the instantaneous frequency measurement and demodulation method of the incoherent spread spectrum digital transceiver comprises an open-loop incoherent receiving algorithm module and a spread spectrum transmitting algorithm module which are embedded in a Field Programmable Gate Array (FPGA) chip on a PCB.

3. The instantaneous frequency measurement and demodulation method of an incoherent spread spectrum digital transceiver of claim 2, wherein: a clock management chip, a filter chip, a level conversion chip, a BPI configuration chip, an interface plug-in, an analog-to-digital converter (ADC) and a digital-to-analog converter (DAC) for respectively receiving signals and digitizing and transmitting signals are hung on the periphery of the FPGA.

4. The instantaneous frequency measurement and demodulation method of an incoherent spread spectrum digital transceiver of claim 1, wherein: the FPGA is externally connected with a BPI configuration chip, a clock management chip CLK and an analog-to-digital converter ADC (analog-to-digital converter) of which the clock management chip CLK is connected with a Complementary Metal Oxide Semiconductor (CMOS) through a Complementary Metal Oxide Semiconductor (CMOS), wherein the input end of a non-coherent receiving algorithm module is connected with a first single-end-to-double-end transformer and a first filter through the analog-to-digital converter ADC, and the analog-to-digital converter ADC is connected with the first filter through the; and a digital-to-analog converter DAC is externally hung at the output end of the FPGA and is connected with the second filter through a double-end-to-single-end transformer.

5. The instantaneous frequency measurement and demodulation method of an incoherent spread spectrum digital transceiver of claim 1, wherein: the spread spectrum transmission algorithm module comprises: the system comprises a data framing module, an RS coding module, a differential coding module, a direct sequence spread spectrum module, a symbol mapping module, a modulation module, a forming filter module and the like, wherein the data framing module realizes that a user bit stream forms a physical layer transmission frame according to a fixed frame length, and a frame synchronization head and a frame information field for synchronization and information acquisition of a receiving end are added; the RS coding module adopts IPcore in FPGA to realize RS (15, 11) format RS coding; the differential coding module adopts a coding formula: realizing differential encoding, wherein the encoding output Out (k) at the time k is obtained by the XOR of the input in (k) at the time k and the encoding output Out (k-1) at the time k-1; the direct sequence spread spectrum module selects corresponding pseudo codes from the pseudo code sequence module as spread spectrum codes according to PN code numbers set by users, and carries out spread spectrum on the input user data bit stream; the spread data bit stream realizes the symbol mapping of the binary phase shift keying BPSK modulation, namely, a bit symbol 0 is mapped into a-1 constellation point, and a bit symbol 1 is mapped into a +1 constellation point; the modulation module multiplies the input constellation point data and the carrier cos generated by the carrier generation module to obtain modulation output; the shaping filtering module shapes and filters the modulation signal according to the required shaping coefficient, and the data after the shaping filter is sent to the DAC for digital-to-analog conversion.

6. The instantaneous frequency measurement and demodulation method of an incoherent spread spectrum digital transceiver of claim 1, wherein: the noncoherent receiving algorithm module sends data output by the digital down-conversion module to an integral zero filter IDF in the instantaneous frequency measurement module for filtering and extracting to realize down-sampling, the down-sampled data recovers Doppler frequency signals in the signals through a phase discriminator module, the possible maximum frequency range of carrier Doppler is subdivided into a plurality of sub-slots or sub-slots, the central frequency of the frequency slot is used as Doppler frequency offset, and a plurality of search modules are utilized to perform parallel search in the frequency slots divided in the maximum possible frequency range.

7. The instantaneous frequency measurement and demodulation method of an incoherent spread spectrum digital transceiver of claim 1, wherein: when a search module searches in a frequency slot, pseudo code phase shift search is carried out, two-dimensional search instantaneous frequency measurement of Doppler and code phase is realized, and frequency offset is eliminated by dividing the searched current Doppler into slot frequencies; after the Doppler frequency offset is eliminated by the frequency of the sub-slot, all possible phase-shifting phase correlation searches are carried out by moving the local code phase, the correlation result is compared with a given threshold to determine whether the search is successful, all frequency slots are searched, and the code phase value of the correlation result passing through the frequency slot threshold is used as the Doppler frequency offset and the code phase deviation value.

8. The instantaneous frequency measurement and demodulation method of an incoherent spread spectrum digital transceiver of claim 1, wherein: the output selection module sends the searched data corresponding to the maximum peak frequency slot and the code phase to an FFT fine frequency measurement module for fine frequency measurement, complex number transformation is carried out by adopting a fast algorithm of a discrete Fourier transform (FFT), power spectrum calculation is carried out after the FFT, and a multiplier is used for modulus calculation.

9. The instantaneous frequency measurement and demodulation method of an incoherent spread spectrum digital transceiver of claim 1, wherein: the instantaneous frequency measurement value finally output by the instantaneous frequency measurement module is the sum of the sub-slot frequency and the accurate frequency measurement, the sum is the carrier Doppler frequency offset in the data, and the sum is sent to the controlled local oscillator module to generate a corresponding orthogonal carrier signal which is mixed with the input signal of the digital down-conversion module to eliminate the carrier Doppler.

10. The instantaneous frequency measurement and demodulation method of an incoherent spread spectrum digital transceiver of claim 1, wherein: the instantaneous frequency measurement module adopts 16 parallel search modules to search the code phase slotted frequency simultaneously to realize a coarse frequency measurement value; in the coarse frequency measurement, a searcher of an instantaneous frequency measurement module carries out parallel search outwards in the positive direction and the negative direction from the center frequency f0 of the frequency-code phase slotted frequency; when a searcher searches a certain frequency slot, Doppler of the sub-slot is eliminated, then correlation integral is slid in the code phase dimension, the correlation integral outputs an integral value to each code phase, when the integral value exceeds a design threshold value, the central frequency of the corresponding frequency slot is a coarse frequency measurement value, and the corresponding code phase is the coarse phase of a code.