CN115080498B - Signal data storage method and storage chip based on satellite navigation application - Google Patents
Signal data storage method and storage chip based on satellite navigation application Download PDFInfo
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Abstract
The application relates to the technical field of satellite navigation, and discloses a signal data storage method and a storage chip based on satellite navigation application, wherein the storage method comprises the following steps: respectively squaring and summing the base numbers of in-phase coded data and orthogonal coded data obtained based on a coding algorithm, judging the values of the highest Bit and the second highest Bit of the summed squared data obtained by summation, reserving data of 10 bits corresponding to the summed squared data as the base number of first stored coded data based on a judgment result, and adjusting the index of the in-phase coded data based on the judgment result to be used as the index of the first stored coded data; the first storage encoded data and the second storage encoded data currently stored are added, and the addition result data is stored to update the replacement second storage encoded data. The method and the device solve the problem that a large amount of storage resources are consumed due to overlarge data needing to be stored and processed when the power calculation is carried out on the received satellite signals.
Description
Technical Field
The application relates to the technical field of satellite navigation, in particular to a signal data storage method and a storage chip based on satellite navigation application.
Background
Global Navigation Satellite Systems (GNSS) are space-based radio navigation positioning systems that can provide users with all-weather 3-dimensional coordinates and velocity and time information at any location on the earth's surface or near-earth space. At present, the main global navigation satellite systems comprise GPS, GLONASS, GALILEO and the Beidou satellite navigation system (BDS) of China. In the technical field of satellite navigation, the processing of satellite signals generally comprises the steps of firstly analyzing, capturing and tracking a signal structure and finally obtaining a navigation message.
During satellite navigation, the receiver needs to power the received despread signal. The basic task is to square and sum coherent integration results of N milliseconds (N is an integer between 1 and 20) of in-phase component (I) and quadrature component (Q) data sent by each correlator, and then perform non-coherent integration. The implementation scheme is that the numbers taken out from the RAM memory are accumulated together, and the obtained result is written into the same position of the RAM memory.
The structural block diagram of the existing memory chip is shown in fig. 6, and it can be seen that in the conventional encoding and storing method, two squarers are used to square data fed in I, Q, an adder is used to add up two squared results, an RAM memory is used to store the result, an adder is used to calculate I, Q two squared sums and data stored in the RAM memory, and the result is updated to the RAM memory.
Since the data stored in the RAM memory is small and large for use in the peak search module of the receiver, and I, Q are signed numbers with a bit width of 24bits, the sum of their squares is 48bits. And there are 4096 correlators per channel, the RAM memory storage size required for 12 channels to process the N millisecond integration result is 48 × 4096 × 12bits =288kb. Since the data to be stored and processed is too large, a large amount of storage resources are consumed. Meanwhile, the area of the corresponding memory chip is very large, and the power consumption and the cost of the hardware of the memory chip are increased.
Disclosure of Invention
Based on the technical problems, the application provides a signal data storage method and a storage chip based on satellite navigation application, which solve the problem that in the existing satellite navigation process, when power calculation is carried out on received satellite signals, a large amount of storage resources are consumed due to overlarge data needing to be stored and processed.
In order to solve the technical problems, the technical scheme adopted by the application is as follows:
a method of signal data storage based on satellite navigation applications, comprising:
acquiring input signal data, wherein the signal data comprises an in-phase component and an orthogonal component, and the Bit width of the in-phase component and the Bit width of the orthogonal component are both 24 bits;
respectively encoding the in-phase component and the orthogonal component based on an encoding algorithm to obtain in-phase encoded data and orthogonal encoded data, wherein the in-phase encoded data and the orthogonal encoded data are represented by a base number of a Bit width of 11 bits and an index of a Bit width of 5 bits;
respectively carrying out square calculation on the base numbers of the in-phase coded data and the orthogonal coded data to obtain in-phase square data and orthogonal square data, and supplementing one bit of 0 after the lowest bit of the exponent of the in-phase coded data;
summing the in-phase square data and the orthogonal square data to obtain square addition data;
judging the values of the highest Bit and the second highest Bit of the square addition data, reserving data of 10 bits corresponding to the square addition data as the base number of the first storage coded data based on the judgment result, and adjusting the exponent of the in-phase coded data based on the judgment result to be used as the exponent of the first storage coded data;
and adding the first storage coded data and the currently stored second storage coded data, and storing addition result data to update and replace the second storage coded data, wherein the addition result data is represented by a base number of the Bit width of 10 bits and an exponent of the Bit width of 6 bits.
Further, the encoding algorithm includes:
acquiring data to be encoded, wherein the data to be encoded is an in-phase component or an orthogonal component;
judging whether the highest Bit of the data to be coded is 1, if so, reserving 23 bits of the data to be coded as the deposited data, and if not, reserving 23 bits of the data to be coded and adding 1 to serve as the deposited data;
performing left shift operation on the registered data to enable the highest bit of the registered data to be the most significant bit;
intercepting 11 bits from the most significant Bit of the registered data as the base number of the encoded data, subtracting 1 from the Bit number of the most significant Bit of the registered data to be used as the index of the encoded data, and expressing the index through the binary number with 5 bits of Bit width.
Furthermore, the Bit shift of the left shift operation is that after subtracting 1Bit from 24Bit, the most significant Bit of the data to be encoded is subtracted.
Further, the judging the most significant Bit and the second most significant Bit of the square addition data, retaining the data of 10 bits corresponding to the square addition data as the base number of the first stored encoded data based on the judging result, and adjusting the exponent of the in-phase encoded data based on the judging result to be the exponent of the first stored encoded data includes:
if the highest bit of the square addition data is 1, retaining 10 bits of data from the 22 th bit to the 13 th bit of the square addition data as the base number of the first storage coding data; correspondingly, the exponent of the in-phase coded data is added with 2 to be used as the exponent of the first stored coded data;
if the highest bit of the square addition data is 0 and the second highest bit is 1, retaining 10 bits of data from 21bit to 12bit of the square addition data as the base number of the first storage encoding data; correspondingly, 1 is added to the exponent of the in-phase coded data to serve as the exponent of the first stored coded data;
if the highest bit and the second highest bit of the square addition data are both 0, retaining 10-bit data from the 20 th bit to the 11 th bit of the square addition data as the base number of the first storage encoding data; accordingly, the exponent of the in-phase encoded data is taken as the exponent of the first stored encoded data.
Further, adding the first stored encoded data and the currently stored second stored encoded data comprises:
exponentially aligning the first stored encoded data with the second stored encoded data;
adding the base number parts of the data after the indexes are aligned to obtain a base number addition result, and intercepting the data with 10 bits from the most significant Bit of the base number addition result as the base number of the addition result data;
the value of the most significant bit of the base number of the addition result data is judged, and the exponent of the addition result data is obtained based on the judgment result.
Further, the determining a value of a most significant bit of the base number of the addition result data, and the obtaining an exponent of the addition result data based on the determination result includes:
if the most significant bit of the base number of the addition result data is 1, adding 1 to the exponent of the second stored encoded data to obtain the exponent of the addition result data;
if the most significant bit of the base number of the addition result data is 0 and the second most significant bit is 1, the exponent of the second stored encoded data is taken as the exponent of the addition result data.
A signal data storage chip based on satellite navigation applications, comprising: the device comprises a first encoder, a second encoder, a first squarer, a second squarer, a first adder, a second adder and a RAM memory;
the first encoder is connected with the first squarer, the second encoder is connected with the second squarer, the first encoder and the second encoder are respectively connected with the first adder, the first adder and the first encoder are respectively connected with the second adder, and the second adder is connected with the RAM memory;
the first encoder is used for encoding the obtained in-phase component based on an encoding algorithm to obtain in-phase encoded data, and the in-phase encoded data is represented by a base number with a Bit width of 11 bits and an index with a Bit width of 5 bits;
the second encoder is used for encoding the obtained orthogonal component based on an encoding algorithm to obtain orthogonal encoded data, and the orthogonal encoded data is represented by the base number of the Bit width of 11 bits and the index of the Bit width of 5 bits;
the first squarer is used for carrying out square calculation on the base number of the in-phase coded data to obtain in-phase square data; and the first encoder supplements a bit of 0 after the lowest bit of the exponent of the in-phase encoded data;
the second squarer is used for carrying out square calculation on the base number of the orthogonal coded data to obtain orthogonal square data;
the first adder is used for summing the in-phase square data and the orthogonal square data to obtain square addition data; judging the values of the highest Bit and the second highest Bit of the square addition data, reserving data of 10 bits corresponding to the square addition data as the base number of the first storage coded data based on the judgment result, and adjusting the exponent of the in-phase coded data through a first encoder based on the judgment result to be used as the exponent of the first storage coded data;
and the second adder is used for adding the first storage coded data and the second storage coded data currently stored in the RAM memory, storing the addition result data into the RAM memory to update and replace the second storage coded data, and the addition result data is represented by the base number with the Bit width of 10 bits and the exponent with the Bit width of 6 bits.
Further, the first squarer and the second squarer use a squarer with 11Bit input.
Further, the storage size of the RAM memory is 96KB.
Further, the base of the addition result data is stored in the lower 10 bits of the memory cell of the RAM memory, and the exponent of the addition result data is stored in the upper 6 bits of the memory cell of the RAM memory.
Compared with the prior art, the beneficial effects of this application are:
according to the signal data storage method and the storage chip based on the satellite navigation application, the satellite navigation application is satisfied, and meanwhile, the finally stored signal data only needs 16 × 4096 × 12bits =96KB, so that the consumption of storage resources is greatly reduced.
Meanwhile, the storage size of a corresponding RAM memory is only 96KB, and meanwhile, the squarer can be used only by 11-Bit input, compared with an original RAM memory needing 288KB and a squarer needing 24-Bit input, only 1/3 of RAM memory resources and half of squarer resources are used, and the final satellite navigation use can be met, so that the area of a storage chip is greatly saved, and the cost and the power consumption of the storage chip are greatly reduced.
Drawings
The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the application and together with the description serve to explain the application and not to limit the application. Wherein:
fig. 1 is a schematic flow chart of a signal data storage method based on a satellite navigation application.
Fig. 2 is a flow chart of an encoding algorithm.
FIG. 3 is a schematic flow chart of adding the first stored encoded data and the currently stored second stored encoded data.
FIG. 4 is a data diagram illustrating the addition of first stored encoded data and second stored encoded data that is currently stored.
Fig. 5 is a schematic block diagram of a signal data storage chip structure for satellite navigation applications.
Fig. 6 is a block diagram schematically illustrating a structure of a conventional signal data storage chip.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present disclosure more apparent, the technical solutions of the embodiments of the present disclosure will be described clearly and completely with reference to the drawings of the embodiments of the present disclosure. It is to be understood that the described embodiments are only a few embodiments of the present disclosure, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the described embodiments of the disclosure without any inventive step, are within the scope of protection of the disclosure.
It should be understood that "system", "device", "unit" and/or "module" as used in this specification is a method for distinguishing different components, elements, parts or assemblies at different levels. However, other words may be substituted by other expressions if they accomplish the same purpose.
As used in this specification and the appended claims, the terms "a," "an," "the," and/or "the" are not intended to be inclusive in the singular, but rather are intended to be inclusive in the plural, unless the context clearly dictates otherwise. In general, the terms "comprises" and "comprising" merely indicate that steps and elements are included which are explicitly identified, that the steps and elements do not form an exclusive list, and that a method or apparatus may include other steps or elements.
Flow charts are used in this description to illustrate operations performed by a system according to embodiments of the present description. It should be understood that the preceding or following operations are not necessarily performed in the exact order in which they are performed. Rather, the various steps may be processed in reverse order or simultaneously. Meanwhile, other operations may be added to the processes, or a certain step or several steps of operations may be removed from the processes.
Referring to fig. 1, in some embodiments, a signal data storage method for a satellite navigation-based application includes:
s101, acquiring input signal data, wherein the signal data comprises an in-phase component and an orthogonal component, and the Bit width of the in-phase component and the Bit width of the orthogonal component are both 24 bits;
s102, respectively encoding the in-phase component and the orthogonal component based on an encoding algorithm to obtain in-phase encoded data and orthogonal encoded data, wherein the in-phase encoded data and the orthogonal encoded data are represented by a base number with a Bit width of 11 bits and an index with a Bit width of 5 bits;
s103, performing square calculation on the base numbers of the in-phase coded data and the orthogonal coded data respectively to obtain in-phase square data and orthogonal square data, and supplementing one bit of 0 after the lowest bit of the exponent of the in-phase coded data;
wherein, for x Bit data, 2x Bit data can be obtained at maximum after square calculation, and the operation of expanding by two times is to supplement 0Bit after the lowest Bit in binary number, so that the exponent of in-phase coded data is expanded by two times after square calculation by changing 5Bit to 6 Bit;
s104, summing the in-phase square data and the orthogonal square data to obtain square addition data;
s105, judging the highest Bit and second highest Bit values of the square addition data, reserving data of 10 bits corresponding to the square addition data as the base number of the first storage coded data based on the judgment result, and adjusting the exponent of the in-phase coded data based on the judgment result to be used as the exponent of the first storage coded data;
and S106, adding the first storage coded data and the currently stored second storage coded data, and storing the addition result data to update and replace the second storage coded data, wherein the addition result data is represented by the base number of the Bit width of 10 bits and the exponent of the Bit width of 6 bits.
In this embodiment, the signal data to be stored is known to be larger or smaller in the satellite navigation peak search module, and statistical finding is performed according to the distribution characteristics of the correlator integration results, so that the magnitude relation can be correctly compared by only preserving the digital precision of 9 bits of the signal data. Therefore, the signal data sent by the in-phase component (I) and the quadrature component (Q) are encoded, the size of the finally stored signal data is compressed on the premise that the digital precision of 9 bits can be finally kept, and the storage resource consumption is greatly saved.
Specifically, data M (significant number M + N Bit) is divided into Am (M Bit) and An (N Bit) in high-low order, and data N (significant number not greater than M + N Bit) is divided into Bm (M Bit) and Bn (N Bit) in high-low order, so that:
from the above equation:
from the above equation:
1、
the least significant digit of (W1), specifically, W1=2m +2n-1 Bit;
2、
the most significant digit number of (1) is W2, specifically, W2= m +2n +1 Bit;
3、
the most significant digit of (a) is W3, specifically, W3=2n Bit.
When the temperature is higher than the set temperature
When m is greater than or equal to 11, the accuracy of 9Bit can be obtained by calculating the square by the following formula:
thus, two 24-Bit data (M24 > N24, where 24 represents the Bit width size of the data) may be encoded in the form of a base of 11 bits and an exponent of 5 bits.
Namely, it is
Wherein, A11 is the high significant digit of M24;
namely, it is
Wherein B11 is the digit of N24 corresponding to A11 at M24.
Based on the above principle, the 24-Bit input signal data can be encoded into 11-Bit data for input to the subsequent squaring operation, and the data accuracy can be maintained.
Referring to fig. 2, preferably, the encoding algorithm includes:
s201, acquiring data to be encoded, wherein the data to be encoded is an in-phase component or an orthogonal component;
s202, judging whether the highest Bit of the data to be coded is 1, if so, reserving 23 bits after the data to be coded is used as the register data, and if not, reserving 23 bits after the data to be coded and adding 1 to be used as the register data;
because the input in-phase component and quadrature component are signed numbers, the most significant bit of the input in-phase component and the quadrature component is judged at first;
s203, carrying out left shift operation on the registered data to enable the highest bit of the registered data to be the most significant bit;
s204, intercepting 11 bits from the most significant Bit of the registered data as the base number of the encoded data, subtracting 1 from the Bit number of the most significant Bit of the registered data to be used as the index of the encoded data, and expressing the index through the binary number with 5 bits of Bit width.
Specifically, the shift digit of the left shift operation is 24bits minus 1Bit, and then the most significant digit of the data to be encoded is subtracted.
The input in-phase component or quadrature component is encoded into the expression form of 11-Bit base number and 5-Bit index from the data with 24-Bit width through the encoder, and in the subsequent square calculation, only the base number part needs to be input, so that the squarer can be used only by inputting 11-Bit, and the calculation resource is saved.
Preferably, the judging the most significant Bit and the second most significant Bit of the square addition data, retaining data of 10 bits corresponding to the square addition data as the base of the first stored encoded data based on the judgment result, and adjusting the exponent of the in-phase encoded data based on the judgment result to serve as the exponent of the first stored encoded data includes:
if the highest bit of the square addition data is 1, retaining 10 bits of data from the 22 th bit to the 13 th bit of the square addition data as the base number of the first storage coding data; correspondingly, the exponent of the in-phase coded data is added with 2 to be used as the exponent of the first stored coded data;
if the highest bit of the square addition data is 0 and the second highest bit is 1, retaining 10 bits of data from 21bit to 12bit of the square addition data as the base number of the first storage encoding data; correspondingly, 1 is added to the exponent of the in-phase coded data to serve as the exponent of the first stored coded data;
if the highest bit and the second highest bit of the square addition data are both 0, retaining 10-bit data from the 20 th bit to the 11 th bit of the square addition data as the base number of the first storage encoding data; accordingly, the exponent of the in-phase encoded data is taken as the exponent of the first stored encoded data.
After any data of x bits is squared, the maximum energy becomes data of 2x bits. Then for one N Bit of data (N)>11 Squared code) to become
Is expressed in terms of (M is base number and M is base number)<N), and after square processing.
If the 2N Bit of the highest Bit is 1, the Bit width of the data which is not subjected to square coding is 2N Bit, and the Bit width of the data which is subjected to square coding is 2 times (N-1), so that the data is less than the data which is not subjected to square coding by 2Bit width, and the exponent should be increased by 2;
if the 2N Bit of the most significant Bit is 0 and the second most significant Bit is 1, the data Bit width without square encoding is 2N-1 Bit wide, so the exponent should be added by 1;
if the most significant bit and the second most significant bit are both 0, the data bit width processed by the squarer is consistent whether the data is processed by square coding or not.
Therefore, based on the above principle, the exponent of the encoded data should be adjusted accordingly based on the result of determining the values of the most significant bit and the second most significant bit of the square addition data.
Referring to fig. 3, preferably, adding the first stored encoded data and the currently stored second stored encoded data comprises:
s301, performing exponential alignment on the first storage encoding data and the second storage encoding data;
s302, adding the base number parts of the data after the exponential alignment to obtain a base number addition result, and intercepting 10-Bit data starting from the most significant Bit of the base number addition result as the base number of the addition result data;
s303, the most significant bit value of the base number of the addition result data is determined, and the exponent of the addition result data is obtained based on the determination result.
As can be seen from the addition process shown in fig. 4, the data formats of the first stored encoded data and the second stored encoded data are both base number plus exponent patterns, specifically, the first stored encoded data is base number d10 and exponent s5, and the second stored encoded data is base number d10 'and exponent s5'.
When the RAM stores the second storage coded data taken out from the RAM and adds the first storage coded data, the indexes of the second storage coded data and the first storage coded data may be different, so the addition is carried out in an index alignment mode. Specifically, when the first stored encoded data is index-aligned with the second stored encoded data, and the same operation needs to be performed on the base number after the index of the first stored encoded data is changed, the first stored encoded data is changed to the base number s5 '-s 5+ d10 ″, and the index is identical to the base number of the second stored encoded data as s5'.
Then, the addition operation is performed. Specifically, the addition result data is the base D10 and the exponent S5'. Wherein, D10 represents data with 10 bits from the most significant Bit of the truncated base addition result after the base addition of the first storage encoded data and the second storage encoded data after the exponent alignment.
Specifically, the determining a value of a highest order bit of the base number of the addition result data, and the obtaining an index of the addition result data based on the determination result includes:
if the most significant bit of the base number of the addition result data is 1, adding 1 to the exponent of the second stored encoded data to obtain the exponent of the addition result data;
if the most significant bit of the base number of the addition result data is 0 and the second most significant bit is 1, the exponent of the second stored encoded data is taken as the exponent of the addition result data.
Referring to fig. 5, in some embodiments, a signal data storage chip for a satellite navigation application includes: the device comprises a first encoder, a second encoder, a first squarer, a second squarer, a first adder, a second adder and a RAM memory;
the first encoder is connected with the first squarer, the second encoder is connected with the second squarer, the first encoder and the second encoder are respectively connected with the first adder, the first adder and the first encoder are respectively connected with the second adder, and the second adder is connected with the RAM memory;
the first encoder is used for encoding the obtained in-phase component based on an encoding algorithm to obtain in-phase encoded data, and the in-phase encoded data is represented by a base number with a Bit width of 11 bits and an index with a Bit width of 5 bits;
the second encoder is used for encoding the obtained orthogonal component based on an encoding algorithm to obtain orthogonal encoded data, and the orthogonal encoded data is represented by the base number of the Bit width of 11 bits and the index of the Bit width of 5 bits;
the first squarer is used for carrying out square calculation on the base number of the in-phase coded data to obtain in-phase square data; and the first encoder supplements a bit of 0 after the lowest bit of the exponent of the in-phase encoded data;
the second squarer is used for carrying out square calculation on the base number of the orthogonal coded data to obtain orthogonal square data;
the first adder is used for summing the in-phase square data and the orthogonal square data to obtain square addition data; judging the values of the highest Bit and the second highest Bit of the square addition data, reserving data of 10 bits corresponding to the square addition data as the base number of the first storage coded data based on the judgment result, and adjusting the exponent of the in-phase coded data through a first encoder based on the judgment result to be used as the exponent of the first storage coded data;
and the second adder is used for adding the first storage coded data and the second storage coded data currently stored in the RAM memory, storing the addition result data into the RAM memory to update and replace the second storage coded data, and the addition result data is represented by the base number with the Bit width of 10 bits and the exponent with the Bit width of 6 bits.
In this embodiment, as can be seen from the existing memory chip structure shown in fig. 6, the signal data is encoded into an exponential form by the additional encoder, so that the size of the finally stored signal data is only 16 bits while the satellite navigation application is satisfied, and thus, the memory chip only needs a memory space of 16 × 4096 × 12bits =96kb for storing the relevant signal data, thereby greatly reducing the consumption of memory resources.
Meanwhile, the storage size of a corresponding RAM memory is only 96KB, and meanwhile, the squarer can be used only by 11-Bit input, compared with an original RAM memory needing 288KB size and a squarer needing 24-Bit input, only 1/3 of RAM memory resources and half of squarer resources are used, and the final satellite navigation use can be met, so that the area of a storage chip is greatly saved, and the cost and the power consumption of the storage chip are greatly reduced.
Preferably, the first squarer and the second squarer use a 11-Bit input squarer.
Preferably, the storage size of the RAM memory is 96KB.
Preferably, the base of the addition result data is stored in the lower 10 bits of the RAM memory cell, and the exponent of the addition result data is stored in the upper 6 bits of the RAM memory cell.
Specifically, the register Bit width in the first encoder and the second encoder is 33 bits, because the register Bit width is at least 33 bits when 24bits plus 9 bits of the in-phase component or the quadrature component are 33 bits because the precision of 9 bits needs to be reserved.
The above is an embodiment of the present application. The embodiments and specific parameters in the embodiments are only used for clearly illustrating the verification process of the application and are not used for limiting the patent protection scope of the application, which is defined by the claims, and all the equivalent structural changes made by using the contents of the specification and the drawings of the application should be included in the protection scope of the application.
Claims (10)
1. A method for storing signal data based on a satellite navigation application, comprising:
acquiring input signal data, wherein the signal data comprises an in-phase component and an orthogonal component, and the Bit width of the in-phase component and the Bit width of the orthogonal component are both 24 bits;
respectively encoding the in-phase component and the orthogonal component based on an encoding algorithm to obtain in-phase encoded data and orthogonal encoded data, wherein the in-phase encoded data and the orthogonal encoded data are represented by a base number with a Bit width of 11 bits and an index with a Bit width of 5 bits;
respectively carrying out square calculation on the base numbers of the in-phase coded data and the orthogonal coded data to obtain in-phase square data and orthogonal square data, and supplementing one bit of 0 after the lowest bit of the exponent of the in-phase coded data;
summing the in-phase squared data and the orthogonal squared data to obtain squared summed data;
judging the values of the highest Bit and the second highest Bit of the square addition data, reserving the data of 10 bits corresponding to the square addition data as the base number of first storage coded data based on the judgment result, and adjusting the exponent of the in-phase coded data based on the judgment result to be used as the exponent of the first storage coded data;
and adding the first storage encoding data and the currently stored second storage encoding data, and storing addition result data to update and replace the second storage encoding data, wherein the addition result data is represented by a base number of the Bit width of 10 bits and an exponent of the Bit width of 6 bits.
2. The method of claim 1, wherein the encoding algorithm comprises:
acquiring data to be encoded, wherein the data to be encoded is the in-phase component or the quadrature component;
judging whether the highest Bit of the data to be coded is 1, if so, reserving 23 bits of the data to be coded as register data, and if not, reserving 23 bits of the data to be coded and adding 1 to serve as register data;
performing left shift operation on the registered data to enable the highest bit of the registered data to be the most significant bit;
intercepting 11 bits from the most significant Bit of the registered data as the base number of the encoded data, subtracting 1 from the Bit number of the most significant Bit of the registered data to be used as the index of the encoded data, wherein the index is represented by binary number with 5 bits of Bit width.
3. The method of claim 2, wherein the method further comprises:
and after the displacement digit of the left displacement operation is 24bits minus 1Bit, the most significant digit of the data to be coded is subtracted.
4. The method of claim 1, wherein the determining the most significant Bit and the second most significant Bit of the square-added data, retaining the 10-Bit data corresponding to the square-added data as the base of the first stored encoded data based on the determination result, and adjusting the exponent of the in-phase encoded data based on the determination result to be the exponent of the first stored encoded data comprises:
if the highest bit of the square addition data is 1, reserving 10-bit data of the 22 th bit to the 13 th bit of the square addition data as the base number of the first storage encoding data; correspondingly, the exponent of the in-phase coded data is added by 2 to be used as the exponent of the first stored coded data;
if the highest bit of the square addition data is 0 and the second highest bit is 1, retaining 10 bits of data from 21bit to 12bit of the square addition data as the base number of the first storage encoding data; correspondingly, 1 is added to the exponent of the in-phase encoded data to serve as the exponent of the first stored encoded data;
if the highest bit and the second highest bit of the square addition data are both 0, retaining 10-bit data of 20 th bit to 11 th bit of the square addition data as the base number of the first storage encoding data; correspondingly, the exponent of the in-phase encoded data is taken as the exponent of the first stored encoded data.
5. The method of claim 1, wherein adding the first stored encoded data and the currently stored second stored encoded data comprises:
exponentially aligning the first stored encoded data with the second stored encoded data;
adding the base number parts of the data after the exponential alignment to obtain a base number addition result, and intercepting 10-Bit data starting from the most significant Bit of the base number addition result as the base number of the addition result data;
the value of the most significant bit of the base number of the addition result data is judged, and the exponent of the addition result data is obtained based on the judgment result.
6. The signal data storage method based on satellite navigation application according to claim 5, wherein determining a value of a most significant bit of a base number of the addition result data, and obtaining an index of the addition result data based on a result of the determination includes:
if the most significant bit of the base number of the addition result data is 1, adding 1 to the exponent of the second stored encoded data to serve as the exponent of the addition result data;
and if the most significant bit of the base number of the addition result data is 0 and the second most significant bit is 1, taking the exponent of the second storage coded data as the exponent of the addition result data.
7. A signal data storage chip based on satellite navigation application, comprising: the device comprises a first encoder, a second encoder, a first squarer, a second squarer, a first adder, a second adder and a RAM memory;
the first encoder is connected with the first squarer, the second encoder is connected with the second squarer, the first encoder and the second encoder are respectively connected with the first adder, the first adder and the first encoder are respectively connected with the second adder, and the second adder is connected with the RAM memory;
the first encoder is used for encoding the obtained in-phase component based on an encoding algorithm to obtain in-phase encoded data, and the in-phase encoded data is represented by a base number with a Bit width of 11 bits and an index with a Bit width of 5 bits;
the second encoder is used for encoding the obtained orthogonal component based on an encoding algorithm to obtain orthogonal encoded data, and the orthogonal encoded data is represented by a base number with a Bit width of 11 bits and an index with a Bit width of 5 bits;
the first squarer is used for carrying out square calculation on the base number of the in-phase coded data to obtain in-phase square data; and supplementing a bit of 0 after the lowest bit of the exponent of the in-phase encoded data by the first encoder;
the second squarer is used for carrying out square calculation on the base number of the orthogonal coded data to obtain orthogonal square data;
the first adder is configured to sum the in-phase square data and the orthogonal square data to obtain square addition data; judging the values of the highest Bit and the second highest Bit of the square addition data, reserving the data of 10 bits corresponding to the square addition data as the base number of first storage coded data based on the judgment result, and adjusting the exponent of the in-phase coded data through a first encoder based on the judgment result to be used as the exponent of the first storage coded data;
and the second adder is used for adding the first storage encoding data and the second storage encoding data currently stored in the RAM memory, and storing addition result data into the RAM memory to update and replace the second storage encoding data, wherein the addition result data is represented by a base number with a Bit width of 10 bits and an exponent with a Bit width of 6 bits.
8. The signal data storage chip for a satellite navigation based application according to claim 7, wherein:
the first squarer and the second squarer adopt squarers with 11-Bit input.
9. The signal data storage chip for a satellite navigation based application according to claim 7, wherein:
the storage size of the RAM memory is 96KB.
10. The signal data storage chip for a satellite navigation based application according to claim 7, wherein:
the base number of the addition result data is stored in the lower 10 bits of the memory cell of the RAM memory, and the exponent of the addition result data is stored in the upper 6 bits of the memory cell of the RAM memory.
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Citations (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0608577A1 (en) * | 1993-01-28 | 1994-08-03 | BELL TELEPHONE MANUFACTURING COMPANY Naamloze Vennootschap | GMSK modulator with automatic calibration |
| CN1182315A (en) * | 1996-08-28 | 1998-05-20 | 美国电报电话公司 | Method of synchronizing satellite switched CDMA communication system |
| CN1461527A (en) * | 2001-04-09 | 2003-12-10 | 株式会社Ntt都科摩 | Signal encoding method and apparatus and decording method and apparatus |
| CN1522500A (en) * | 2000-05-30 | 2004-08-18 | 摩托罗拉公司 | Digitized automatic gain control system and methods for a controlled gain receiver |
| CN101022284A (en) * | 2007-03-21 | 2007-08-22 | 中兴通讯股份有限公司 | Normalizing method and device for receiving symbol with wireless receiver |
| JP2008193209A (en) * | 2007-02-01 | 2008-08-21 | Niigata Seimitsu Kk | Quadrature modulator |
| CN101840322A (en) * | 2010-01-08 | 2010-09-22 | 北京中星微电子有限公司 | Method for multiplexing filter arithmetic element and filter arithmetic system |
| CN102841360A (en) * | 2012-09-13 | 2012-12-26 | 中国航天科技集团公司第五研究院第五一三研究所 | Weak signal quick capture method on basis of part correlation |
| CN105515592A (en) * | 2014-09-26 | 2016-04-20 | 苹果公司 | DSP assisted and on demand RF and analog domain processing for low power wireless transceivers |
| CN108270452A (en) * | 2016-12-30 | 2018-07-10 | 芯原微电子（成都）有限公司 | A kind of Turbo decoders and interpretation method |
| CN108667484A (en) * | 2018-03-26 | 2018-10-16 | 西南电子技术研究所（中国电子科技集团公司第十研究所） | Incoherent spread spectrum digital transceiver instantaneous frequency measurement and demodulation method |
| CN112765245A (en) * | 2020-12-31 | 2021-05-07 | 广西中科曙光云计算有限公司 | Electronic government affair big data processing platform |
| CN114793144A (en) * | 2021-01-26 | 2022-07-26 | 华为技术有限公司 | Signal encoding method, signal decoding method, signal encoding device, signal decoding device, electronic equipment, chip and storage medium |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100369794B1 (en) * | 1997-08-18 | 2003-04-11 | 삼성전자 주식회사 | Apparatus and method for generating spread signal of transmitter of mobile communication system |
| CN101030787B (en) * | 2006-02-27 | 2010-12-22 | 凹凸科技（中国）有限公司 | Method and apparatus for estimating signal noise ratio of frequency-amplifying signal |
-
2022
- 2022-07-27 CN CN202210888465.XA patent/CN115080498B/en active Active
Patent Citations (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0608577A1 (en) * | 1993-01-28 | 1994-08-03 | BELL TELEPHONE MANUFACTURING COMPANY Naamloze Vennootschap | GMSK modulator with automatic calibration |
| CN1182315A (en) * | 1996-08-28 | 1998-05-20 | 美国电报电话公司 | Method of synchronizing satellite switched CDMA communication system |
| CN1522500A (en) * | 2000-05-30 | 2004-08-18 | 摩托罗拉公司 | Digitized automatic gain control system and methods for a controlled gain receiver |
| CN1461527A (en) * | 2001-04-09 | 2003-12-10 | 株式会社Ntt都科摩 | Signal encoding method and apparatus and decording method and apparatus |
| JP2008193209A (en) * | 2007-02-01 | 2008-08-21 | Niigata Seimitsu Kk | Quadrature modulator |
| CN101022284A (en) * | 2007-03-21 | 2007-08-22 | 中兴通讯股份有限公司 | Normalizing method and device for receiving symbol with wireless receiver |
| CN101840322A (en) * | 2010-01-08 | 2010-09-22 | 北京中星微电子有限公司 | Method for multiplexing filter arithmetic element and filter arithmetic system |
| CN102841360A (en) * | 2012-09-13 | 2012-12-26 | 中国航天科技集团公司第五研究院第五一三研究所 | Weak signal quick capture method on basis of part correlation |
| CN105515592A (en) * | 2014-09-26 | 2016-04-20 | 苹果公司 | DSP assisted and on demand RF and analog domain processing for low power wireless transceivers |
| CN108270452A (en) * | 2016-12-30 | 2018-07-10 | 芯原微电子（成都）有限公司 | A kind of Turbo decoders and interpretation method |
| CN108667484A (en) * | 2018-03-26 | 2018-10-16 | 西南电子技术研究所（中国电子科技集团公司第十研究所） | Incoherent spread spectrum digital transceiver instantaneous frequency measurement and demodulation method |
| CN112765245A (en) * | 2020-12-31 | 2021-05-07 | 广西中科曙光云计算有限公司 | Electronic government affair big data processing platform |
| CN114793144A (en) * | 2021-01-26 | 2022-07-26 | 华为技术有限公司 | Signal encoding method, signal decoding method, signal encoding device, signal decoding device, electronic equipment, chip and storage medium |
Non-Patent Citations (2)
| Title |
|---|
| "Two-dimensional shift-orthogonal randome-interleaving phase-code multiplexing fo holographic data storage";Jianhua Li等;《Optics Communications》;20111201;第284卷(第24期);第5563-5567页 * |
| "数字信号处理对分布式光纤传感系统性能提升的研究";王松;《中国优秀硕士学位论文全文数据库 信息科技辑》;20170215(第02期);I140-460 * |
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