CN203562423U - LED integrated packaging structure - Google Patents
LED integrated packaging structure Download PDFInfo
- Publication number
- CN203562423U CN203562423U CN201320698382.0U CN201320698382U CN203562423U CN 203562423 U CN203562423 U CN 203562423U CN 201320698382 U CN201320698382 U CN 201320698382U CN 203562423 U CN203562423 U CN 203562423U
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- China
- Prior art keywords
- led chip
- led
- base
- chip
- negative electrode
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- Expired - Fee Related
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/20—Structure, shape, material or disposition of high density interconnect preforms
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/24137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73267—Layer and HDI connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
Abstract
The utility model discloses an LED integrated packaging structure. The LED integrated packaging structure comprises a pedestal; at least one LED chip that is in fixed connection with the pedestal and has a positive electrode and a negative electrode; insulating layers laid on the surface of the pedestal and on the surface of the LED chip, wherein surfaces of the positive electrode and the negative electrode of the LED chip are exposed from the insulating layers; and at least two connection electrodes that are disposed on the pedestal and the LED chip. Compared with the prior art, the LED integrated packaging structure has the characteristics of high integration, high reliability, low cost and diversified functions.
Description
Technical field
The utility model relates to a kind of LED integration packaging technology, particularly a kind of LED integrated encapsulation structure.
Background technology
Along with society day by day strengthens energy-conservation popularization and is tending towards general, LED product is widely used by enterprise and family, and the every field of the illumination and decoration that is widely used.And in order to form outstanding LED product, LED integration packaging is a very important step in its production process.
Rely on current LED integration packaging technology, for the encapsulation of chip and substrate, substantially still according to traditional method for packing and structure, carry out.It is that chip is fixed on substrate substantially, then connects chip and substrate by wiring technique (connecing gold thread).The shortcoming of current this LED integration packaging technology is: only can realize the encapsulation of single mesa devices, encapsulation when can not form a plurality of mesa devices; The gold thread of wiring technique is in use easily damaged, and the reliability of encapsulation is not good; Material cost and process costs based on connecing gold thread technique, the material cost of current encapsulation technology and process costs are all higher; Structure based on substrate, chip and gold thread, the circuit of formation is fairly simple, so its function that can provide is also comparatively single.
Utility model content
The purpose of this utility model is exactly for the problems referred to above, provides that a kind of integrated level is high, reliability is strong, cost is low and the LED integrated encapsulation structure of functional diversities.
To achieve these goals, the utility model provides following technical scheme: LED integrated encapsulation structure, and it comprises:
Base;
At least one LED chip, it is fixedly connected on above-mentioned base, and this LED chip has positive and negative electrode;
Insulating barrier, it is laid in the surface of above-mentioned base and LED chip, and wherein, this insulating barrier is exposed on the surface of the positive and negative electrode of above-mentioned LED chip;
At least two connecting electrodes, it is arranged on above-mentioned base and LED chip.
Preferably, along being provided with limitation in height ring on the edge of above-mentioned base, above-mentioned LED chip is positioned at this limitation in height ring.
Preferably, on above-mentioned connecting electrode, be carved with graphics chip.
Adopt the beneficial effect of above technical scheme to be: an insulating barrier on LED integrated encapsulation structure of the present utility model tiles on the surface of LED chip and base, make the surface of LED chip and base form a plane, then by connecting electrode, connect base and LED chip; It compared with prior art, there is advantage: by including the structure of LED chip, base, insulating barrier and connecting electrode, and by formed plane, not only can realize the encapsulation of single mesa devices, the integration packaging that can also realize a plurality of mesa devices, integrated level is high; By connecting electrode, replace original gold thread that connects, reliability is stronger; Connecting electrode is set, and than adopting gold thread, material cost and process costs have all obtained reduction; Form plane and connecting electrode is set, for the follow-up circuit of making provides condition, follow-uply can the more complicated circuit design such as control circuit be set as required thereon thereon, making the function of this LED integrated encapsulation structure more be tending towards variation; In addition, the encapsulation of double-side structure can also be more easily realized on the surface of smooth connecting electrode.
Accompanying drawing explanation
Fig. 1 is the structural representation under a kind of execution mode of LED integrated encapsulation structure of the present utility model.
Fig. 2 is the structural representation under the another kind of execution mode of LED integrated encapsulation structure of the present utility model.
Wherein, 1. base 11. limitation in height ring 2.LED chip 21. positive electrode 22. negative electrode 3. insulating barrier 4. connecting electrodes.
Embodiment
Below in conjunction with accompanying drawing, describe preferred implementation of the present utility model in detail.
As shown in Figure 1, in the first and optimum execution mode of LED integrated encapsulation structure of the present utility model, this structure comprises: base 1; Three LED chips 2, it is fixedly connected on base 1, and this LED chip 2 has positive and negative electrode 21,22; Insulating barrier 3, it is laid in the surface of base 1 and LED chip 2, wherein, this insulating barrier 3 is exposed on the surface of positive and negative electrode 21,22, be that insulating barrier 3 joint bases 1 and LED chip 2 form a smooth plane, but expose positive and negative electrode 21,22, so that the installation of follow-up connecting electrode 4; Four connecting electrodes 4, it is arranged on base 1 and LED chip 2.Wherein, insulating barrier 3 can be phosphorosilicate glass
,the material that epoxy molding plastic and transparent resin etc. possess the features such as insulation, printing opacity forms, and by these materials, also makes insulating barrier 3 possess effect reflective, optically focused, thereby reduces light loss; Connecting electrode 4 can be arranged on base 1 and LED chip 2 by semiconductor technologies such as evaporation technology, sputtering technologies.This structure is by including the structure of LED chip 2, base 1, insulating barrier 3 and connecting electrode 4, and by formed plane, not only can realize the encapsulation of single mesa devices, can also realize the integration packaging of a plurality of mesa devices, and integrated level is high; By connecting electrode 4, replace original gold thread that connects, reliability is stronger; Connecting electrode 4 is set, and than adopting gold thread, material cost and process costs have all obtained reduction; Form plane and connecting electrode 4 is set, for the follow-up circuit of making provides condition, follow-uply can the more complicated circuit design such as control circuit be set as required thereon thereon, making the function of this LED integrated encapsulation structure more be tending towards variation; In addition, the encapsulation of double-side structure can also be more easily realized on the surface of smooth connecting electrode 4.
As shown in Figure 2, in the second execution mode of LED integrated encapsulation structure of the present utility model, this structure comprises: base 1; A LED chip 2, it is fixedly connected on base 1, and this LED chip 2 has positive and negative electrode 21,22; Insulating barrier 3, it is laid in the surface of base 1 and LED chip 2, wherein, this insulating barrier 3 is exposed on the surface of positive and negative electrode 21,22, be that insulating barrier 3 joint bases 1 and LED chip 2 form a smooth plane, but expose positive and negative electrode 21,22, so that the installation of follow-up connecting electrode 4; Two connecting electrodes 4, it is arranged on base 1 and LED chip 2.Present embodiment can substitute above-mentioned first kind of way and implement, and is applicable in the situation of single mesa devices encapsulation, and its obtained advantage is same as first kind of way.
As depicted in figs. 1 and 2, in the third execution mode of LED integrated encapsulation structure of the present utility model, the first based on above-mentioned or the second execution mode, along being provided with limitation in height ring 11 on the edge of above-mentioned base 1, above-mentioned LED chip 2 is positioned at this limitation in height ring 11.In order to guarantee fastness, limitation in height ring 11 generally can be one-body molded with base 1, and height and evenness that limitation in height ring 11 can guarantee insulating barrier 3 are set.
In the 4th kind of execution mode of LED integrated encapsulation structure of the present utility model, the first based on above-mentioned, the second or the third execution mode, on above-mentioned connecting electrode, can also be carved with graphics chip (not shown), it can be specifically to carry out photoetching by silicon technologies such as photoetching processes, the connecting electrode that is carved with graphics chip can be so that can form on connecting electrode and realize multi-purpose circuit design, and electrode pattern can be drawn as required.
In conjunction with Fig. 1 or Fig. 2, the manufacturing process of LED integrated encapsulation structure of the present utility model comprises the following steps: 1) LED chip 2 with positive and negative electrode 21,22 is fixed on base 1; 2) insulating barrier 3 is laid in to the surface of LED chip 2 and base 1; 3) by dull and stereotyped glossing skim LED chip 2 and the lip-deep partial insulative layer 3 of base 1, until expose the surface of positive and negative electrode 21,22, and form the plane that covers LED chip 2 and base 1 surface; 4) by semiconductor technology, connecting electrode 4 is installed on LED chip 2 and base 1.
Above-described is only preferred implementation of the present utility model; it should be pointed out that for the person of ordinary skill of the art, do not departing under the prerequisite of the utility model creation design; can also make some distortion and improvement, these all belong to protection range of the present utility model.
Claims (3)
1. LED integrated encapsulation structure, is characterized in that: comprising:
Base;
At least one LED chip, it is fixedly connected on described base, and described LED chip has positive and negative electrode;
Insulating barrier, it is laid in the surface of described base and LED chip, and wherein, described insulating barrier is exposed on the surface of the positive and negative electrode of described LED chip;
At least two connecting electrodes, it is arranged on described base and LED chip.
2. LED integrated encapsulation structure according to claim 1, is characterized in that: along being provided with limitation in height ring on the edge of described base, described LED chip is positioned at described limitation in height ring.
3. LED integrated encapsulation structure according to claim 1, is characterized in that: on described connecting electrode, be carved with graphics chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320698382.0U CN203562423U (en) | 2013-11-07 | 2013-11-07 | LED integrated packaging structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320698382.0U CN203562423U (en) | 2013-11-07 | 2013-11-07 | LED integrated packaging structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203562423U true CN203562423U (en) | 2014-04-23 |
Family
ID=50512125
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201320698382.0U Expired - Fee Related CN203562423U (en) | 2013-11-07 | 2013-11-07 | LED integrated packaging structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203562423U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103594462A (en) * | 2013-11-07 | 2014-02-19 | 昆山开威电子有限公司 | LED integration packaging structure and packaging method thereof |
-
2013
- 2013-11-07 CN CN201320698382.0U patent/CN203562423U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103594462A (en) * | 2013-11-07 | 2014-02-19 | 昆山开威电子有限公司 | LED integration packaging structure and packaging method thereof |
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Legal Events
| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140423 Termination date: 20171107 |
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| CF01 | Termination of patent right due to non-payment of annual fee |