CN203445129U - Insulated gate bipolar transistor - Google Patents
Insulated gate bipolar transistor Download PDFInfo
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- CN203445129U CN203445129U CN201320220815.1U CN201320220815U CN203445129U CN 203445129 U CN203445129 U CN 203445129U CN 201320220815 U CN201320220815 U CN 201320220815U CN 203445129 U CN203445129 U CN 203445129U
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Abstract
The utility model provides an insulated gate bipolar transistor comprising a collector, gates, emitters and a semiconductor. The semiconductor includes a body region, source regions, a drift region, at least one first trench and at least one second trench, wherein the body region has a first conductive type; the source regions have a second conductive type different from the first conductive type and form a first pn junction with the body region; the drift region has the second conductive type, is positioned on the one side opposite to the emitter side in the body region, and forms a second pn junction with the body region; the at least one first trench is formed in the surface of the semiconductor body and extended to the drift region, comes into contact with the gates and has a first trench portion having a first width and a second trench portion having a second width different from the first width; and the at least second trench is formed in the surface of the semiconductor and extended to the drift region, and comes into contact with the emitters. Through some contacted emitters rather than gates in multiple trenches, the gate-emitter capacitance can be reduced and the emitter-collector capacitance can be increased.
Description
Technical field
The utility model relates to a kind of semiconductor device, more specifically, relates to a kind of insulated gate bipolar transistor.
Background technology
Insulated gate bipolar transistor (IGBT:Insulated Gate Bipolar Transistor) is the semiconductor device being composited by mos field effect transistor (MOSFET:Metal-Oxide-Semiconductor Field-Effect Transistor) and bipolar transistor (BJT:Bipolar Junction Transistor), it has the advantage of these two kinds of devices concurrently, both had advantages of that the driving power of MOSFET was little and switching speed is fast, had advantages of again that the on-state voltage drop of BJT was low and current capacity is large.Therefore, IGBT has been widely used in the field that such as alternating current machine, frequency converter, Switching Power Supply, lighting circuit, Traction Drive etc. need to be carried out electric power conversion in recent years.
Fig. 1 shows an example of existing IGBT.As shown in Figure 1, IGBT10 is shown as has trench gate field termination type structure, it comprises p-type collector region 11, terminator, N-shaped field 12,13,pXing base, n-type drift region 14 and the n+ type source region 15 of stacked above one another, and is formed on grid 16 and the gate oxide 17 in 13,pXing base, n-type drift region 14 and n+ type source region 15.
Further, in the IGBT10 shown in Fig. 1, grid 16 comprises having the upper gate 161 of uniform cross-section width and the bottom grid 162 of the cross-sectional width that cross-sectional width is greater than upper gate 161.This structure can be called as local narrow (PNM:Partially Narrow Mesa) structure.In being published in No. US7800187B2nd, the paper " Low Loss IGBT with Partially Narrow Mesa Structure (PNM-IGBT) " of the international power semiconductor of 24Jie in 2012 and power integrated circuit meeting (ISPSD:International Symposium on Power Semiconductor Devices and IC) and United States Patent (USP), the people such as Masakiyo Sumitomo recorded the IGBT with similar structures.By forming narrow of the part structure (base between two adjacent trenches grid is narrowed) as shown in dotted line frame in Fig. 1, can in the situation that guaranteeing not reduce metal-semiconductor contact area, reduce mesa width (width of the base between two adjacent trenches grid), thereby the saturation voltage of IGBT10 significantly reduces, and also can obtain good tradeoff between on state voltage and turn-off power loss.
In the active region of IGBT so-called " local narrow (PNM) ", this geometry of narrow of part between the bottom of the groove of filling by polysilicon, has strengthened the carrier concentration near this top device.This polysilicon trench contacts with the gate terminal of IGBT, guarantees when the positive voltage with respect to emitter is applied to grid, forms n communication channel in p-type base.
PNM-IGBT is characterised in that narrow, in other words, it is characterized in that the high density of polysilicon filling groove.Consider the electric capacity of this device, easily recognize, due to narrow this geometric properties, grid-collector capacitance significantly increases than emitter-collector capacitance.Therefore, the ratio that shifts electric capacity (it is provided by grid-collector capacitance) and input capacitance (it is provided by grid-collector capacitance and grid-emitter capacity sum) increases along with the narrowing of platform between the bottom of groove, and the ratio of transfer electric capacity and output capacitance (it is provided by grid-collector and emitter-collector capacitance sum) also increases.This has increased gate charge, and has increased grid driving power.In addition, while there is the ohmage (that is, the impedance of gate driver circuit) that can not ignore between grid and emitter, larger transfer electric capacity cause device in bridge configuration to being easier to suffer parasitic turn-on.To device, apply larger dU/dt and will make grid potential separated with emitter electromotive force, and then cause the parasitic turn-on of this device, this has increased total losses and has increased unnecessary burden to device.
Utility model content
In view of the above problems, expectation provides a kind of IGBT device that can optimize PNM-IGBT electric capacity.
According to an execution mode of the present utility model, a kind of insulated gate bipolar transistor (20 is provided, 30,40,50), comprise collector electrode (C), gate electrode (32), emitter (29) and semiconductor body (31), it is characterized in that, described semiconductor body (31) comprising: tagma (24), have the first conduction type; Source region (25), has second conduction type different from described the first conduction type, and forms a pn knot with described tagma (24); Drift region (23), has described the second conduction type, and is positioned at a side contrary with described emitter side in described tagma (24) and forms the 2nd pn knot with described tagma (24); At least one first groove (26a, 26c), be formed on the surface of described semiconductor body (31), extend to described drift region (23) and contact with described gate electrode (32), and wherein, described at least one first groove (26a, 26c) there is the first channel portions (261a, 261c) He the second channel portions (262a, 262c), described the first channel portions (261a, 261c) has the first width, described the second channel portions (262a, 262c) has second width different from described the first width; And at least one second groove (26b, 26d), be formed on the surface of described semiconductor body (31), extend to described drift region (23) and contact with described emitter (29).
Preferably, described at least one second groove (26b, 26d) comprising: first (261b, 261d), has described the first width; And second portion (262b, 262d), there is described the second width.
Preferably, in the vertical direction of described insulated gate bipolar transistor (30), described the second channel portions (262a, 262b, 262c, 262d) be arranged in described the first channel portions (261a, 261b, 261c, 261d) below, and wherein, at described insulated gate bipolar transistor (20,30,40,50) in a lateral direction, described the second width is greater than described the first width.
Preferably, along described the first channel portions (261a, 261b, 261c, 261d), described first width of described the first channel portions is consistent.
Preferably, described at least one first groove and described at least one second groove all comprise by electrode (26) at least with the insulating barrier (27) of described source region (25) and described tagma (24,34) electric insulation.
Preferably, the contiguous described tagma (24) of described the first channel portions (261a, 261b, 261c, 261d), the contiguous described tagma (24) of described the second channel portions (262a, 262b, 262c, 262d) and described drift region (23).
Preferably, the contiguous described tagma (24) of described the first channel portions (261a, 261b, 261c, 261d) and described drift region (23), the contiguous described tagma (24) of described the second channel portions (262a, 262b, 262c, 262d).
Preferably, described at least one first groove and described at least one second groove extend to same depth in described drift region (23).
Preferably, described at least one first groove (26a, 26c) and described at least one second groove (26b, 26d) are alternately arranged in the horizontal-extending direction of described semiconductor body (31).
Preferably, a plurality of described the first groove (26a, 26c; 46a) with a plurality of described the second groove (26b, 26d; 46b) in the horizontal-extending direction of described semiconductor body (31), according to the quantitative proportion of 1:1, arrange.
Preferably, described the first groove (26a, 26c; Quantity 46a) is greater than described the second groove (26b, 26d; Quantity 46b).
Preferably, described the first groove (26a, 26c; Quantity 46a) is less than described the second groove (26b, 26d; Quantity 46b).
Preferably, described at least one first groove (26a, 26c) and described at least one second groove (26b, 26d) are polysilicon filling grooves.
Preferably, at polysilicon and described at least one first groove (26a, 26c) and described at least one second groove (26b, between sidewall 26d) and at polysilicon and described at least one first groove (26a, 26c) and, form dielectric layer (27) at the end of described at least one the second groove (26b, 26d).
Preferably, further comprise: be formed on the surface of described semiconductor body and be positioned at least in part the groove (G1 in described source region (25), G2), wherein, a part for described emitter electrode (29) is filled described groove (G1, G2), described emitter electrode is contacted with described tagma with described source region.
Preferably, the degree of depth of described groove (G1, G2) is more than or equal to the degree of depth of a described pn knot of described source region (25) and described tagma (24,34) formation
Preferably, further comprise: be formed in described tagma (24) and there is described the first conduction type and doping content is greater than the anti-breech lock district (P) of the doping content in described tagma (24), wherein, described emitter electrode (29) contacts with described anti-breech lock district (P).
Preferably, further comprise: collector region (21), have described the first conduction type, and be positioned at a side contrary with described tagma side of described drift region (23); And collector electrode (C), contact with described collector region (21).
Preferably, further comprise: terminator (22), there is described the second conduction type and be arranged in described drift region (23) and described collector region (21) between.
According in insulated gate bipolar transistor of the present utility model, by by some contact emitters but not gate electrodes in a plurality of grooves, can reduce grid-emitter capacity and increase emitter-collector capacitance, thereby reduced gate charge, reduce the power requirement of gate drive stage, and alleviated the risk of parasitic turn-on.In addition, owing to not forming raceway groove near the p tagma groove contacting with emitter, so can reduce the channel width of device.In this way, can reduce the short circuit current level of device, increase the Short Circuit withstand time.
Accompanying drawing explanation
In the accompanying drawings, the similar reference symbol in different views generally represents same section.Accompanying drawing is not necessarily drawn in proportion, focuses on principle of the present utility model to carry out graphic extension.In the following description, according to the following drawings, the various embodiments of the utility model is illustrated, in the accompanying drawings:
Fig. 1 is the oblique view that an example of existing IGBT is shown;
Fig. 2 A is the sectional view illustrating according to the IGBT of an execution mode of the present utility model, and Fig. 2 B and Fig. 2 C are the amplification diagrams of part A shown in Fig. 2 A; And
Fig. 3 A to Fig. 3 C is the sectional view illustrating according to the IGBT of a variation of the present utility model
Embodiment
Below describe in detail with reference to accompanying drawing and carry out, accompanying drawing schematically illustrates can implement detail of the present utility model and execution mode.
Can use herein about side or surface " on " form material word " on ", represent this material can be formed at " directly " described side or surface " on ", for example, be in direct contact with it.Can use herein about side or surface " on " form material word " on ", represent material can " indirectly " be formed at described side or surface " on ", between described side or surperficial and this material, be provided with one or more extra plays.
Fig. 2 A is the sectional view illustrating according to the IGBT of an execution mode of the present utility model.With reference to Fig. 2 A, IGBT20 is shown as has trench gate field termination type structure, it comprises collector electrode C, p-type collector region 21, terminator, optional N- shaped field 22,23,pXing tagma, n-type drift region 24 and the n+ type source region 25 of stacked above one another, and polysilicon filling groove (trench) 26a to 26d(is referred to as groove 26 below) and gate oxide 27.In addition, on the upper surface of p-type base 24, n+ type source region 25, groove 26, be formed with dielectric layer 28.
IGBT20 also has emitter 29, and emitter 29 is formed on dielectric layer 28 and with p-type base 24 and contacts with n+ type source region 25.
Particularly, in the semiconductor body 31 that comprises 23,pXing tagma, n-type drift region 24 and n+ type source region 25, be formed with groove 26.In this groove 26, be filled with polysilicon.Contrary with the configuration in conventional art, groove all being contacted with gate electrode, in the utility model, some in a plurality of grooves are contacted with emitter 29, but not gate electrode 32.Particularly, groove 26b is contacted with emitter 29 with 26d, groove 26a is contacted with gate electrode 32 with 26c.By this configuration, can reduce grid-emitter capacity, and increase emitter-collector capacitance, thereby reduce gate charge, further reduced the power demand of gate drive stage.
In addition, for example,, owing to not forming raceway groove (channel) near the p tagma groove (, groove 26b and groove 26d) in emitter contact, therefore can reduce the channel width of device.Therefore, can reduce the short circuit current level of device, improve the Short Circuit withstand time.
Further, in the IGBT20 shown in Fig. 2 A, groove 26 comprises upper groove 261(first channel portions with uniform cross-section width) and from upper groove 261 to downward-extension and cross-sectional width be greater than lower channel 262(second channel portions of the cross-sectional width of upper groove 261).Also, IGBT20 has local narrow structure.
In having the IGBT20 of local narrow structure, because table top narrows down, therefore the current density in the narrowed region of table top becomes large.Yet, owing to having formed the contact structures of emitter 29 with part groove in IGBT20, even therefore in the situation that IGBT20 has been applied in larger dU/dt, also can not make grid potential away from emitter electromotive force, thereby avoided the generation of parasitic turn-on, improved the useful life of IGBT20.
Fig. 2 B and Fig. 2 C are the amplification diagrams of the part A shown in Fig. 2 A.Particularly, the upper surface in p-type base 24 is formed with groove (groove) G, and the bearing of trend of groove G1 can be identical with the bearing of trend of the groove (trench) of grid 26, in figure perpendicular to the direction of paper.The bottom of the second emitter part 292 is through n+ type source region 25 and be filled into groove G1.
Because having formed groove with p-type base 24, emitter 29 contacts, therefore at IGBT20 between the off period, the part that is arranged in 25 belows, n+ type source region of p-type base 24 there will not be high hole current density, thereby destroyed the PNPN structure being formed by p- type collector region 21,23, pXing base 24,22/n-type drift region, terminator, N-shaped field and n+ type source region 25, also destroyed the parasitic thyristor structure of IGBT20.Therefore, avoid IGBT20 between the off period, to occur breech lock, guaranteed the normal operation of IGBT20.
Preferably, the degree of depth that the degree of depth of groove G1 is at least tied corresponding to the pn forming between p-type base 24 and n+ type source region 25.For example, the bottom of groove G1 can be apart from semiconductor uper side surface 0.2 to the 1.5 μ m jointly being formed by p-type base 24 and n+ type source region 25.Thus, can guarantee not form in IGBT20 parasitic thyristor structure.With reference to figure 2C, it is the sectional view illustrating according to the part A structure of a variation of the present utility model.Particularly, the impurity that contact zone P for example can inject such as boron by the bottom at groove G2 forms, thereby the p-type impurity concentration in contact zone P is greater than p-type base 34.The bottom of the second emitter part 392 of emitter 39 directly contacts with contact zone P.
Formation contact zone, bottom P by groove G2, has guaranteed can not form parasitic thyristor structure in IGBT30, thereby has avoided the generation of latch-up.
Although in Fig. 2 A, by be shown gate electrode contact trench and the emitter contact trench horizontal direction along IGBT20 according to the IGBT of an embodiment of the present utility model, replace the structure of arranging, but obviously, in order to optimize PNM-IGBT electric capacity, can be according to freely select the quantitative proportion of gate electrode contact trench and emitter contact trench with application.Below, with reference to figure 3A to Fig. 3 C, show the variation of arranging gate electrode contact trench and emitter contact trench with different quantitative proportions.
Fig. 3 A illustrates according to the sectional view of the IGBT of a variation of the present utility model.According to the IGBT20 shown in the IGBT30 of this variation and Fig. 2, have similar structure, below only describe its difference, omission is repeated in this description.
With reference to Fig. 3 A, in IGBT30, be arranged on groove P type tagma 34 peripheral and that extend along the surface direction of the semiconductor body of IGBT30 adjacent with 36b with two gate electrode contact trench 36a.Order according to gate electrode contact trench 36a-gate electrode contact trench 36b-emitter contact trench 36c repeats to arrange groove.
With reference to Fig. 3 B, in IGBT40, be arranged on groove P type tagma 44 peripheral and that extend along the surface direction of the semiconductor body of IGBT40 adjacent with an emitter contact trench 46b with a gate electrode contact trench 46a.
With reference to Fig. 3 C, in IGBT50, be arranged on groove P type tagma 54 peripheral and that extend along the surface direction of the semiconductor body of IGBT50 adjacent with 56b with two emitter contact trench 56a.Order according to emitter contact trench 56a-emitter contact trench 56b-gate electrode contact trench 56c repeats to arrange groove.
By optionally groove being contacted with emitter or gate electrode contacts, can regulate neatly PNM-IGBT electric capacity to adapt to the needs of practical application, alleviated the generation of the parasitic turn-on of IGBT device simultaneously.
Although the IGBT device with local narrow structure of above take is illustrated as example, technology of the present utility model is not limited to this, for example, also can be applicable to have the IGBT device of common trench gate structure.Although the IGBT device with trench gate field termination type structure of above take is illustrated as example, technology of the present utility model is not limited to this, for example, also can be applicable to the IGBT device of planar gate structure.In the IGBT device with other structures the IGBT device except mentioned above, apply technology of the present utility model, can effectively avoid equally the generation of latch-up.
Above according to specific implementations, the utility model is specifically illustrated and illustrated, but only one skilled in the art will understand that otherwise depart from purport of the present utility model and the scope that claims limit, can carry out various changes to its form and details.Therefore, scope of the present utility model as described in the appended claims, therefore, as long as meet meaning and the scope of claim equivalent, can be carried out various changes.
Claims (19)
1. an insulated gate bipolar transistor (20,30,40,50), comprises collector electrode (C), gate electrode (32), emitter (29) and semiconductor body (31), it is characterized in that, described semiconductor body (31) comprising:
Tagma (24), has the first conduction type;
Source region (25), has second conduction type different from described the first conduction type, and forms a pn knot with described tagma (24);
Drift region (23), has described the second conduction type, and is positioned at a side contrary with described emitter side in described tagma (24) and forms the 2nd pn knot with described tagma (24);
At least one first groove (26a, 26c), be formed on the surface of described semiconductor body (31), extend to described drift region (23) and contact with described gate electrode (32), and wherein, described at least one first groove (26a, 26c) there is the first channel portions (261a, 261c) He the second channel portions (262a, 262c), described the first channel portions (261a, 261c) has the first width, described the second channel portions (262a, 262c) has second width different from described the first width; And
At least one second groove (26b, 26d), is formed on the surface of described semiconductor body (31), extends to described drift region (23) and contacts with described emitter (29).
2. insulated gate bipolar transistor according to claim 1 (20,30,40,50), is characterized in that, described at least one second groove (26b, 26d) comprising:
First (261b, 261d), has described the first width; And
Second portion (262b, 262d), has described the second width.
3. insulated gate bipolar transistor according to claim 2 (20,30,40,50), it is characterized in that, in the vertical direction of described insulated gate bipolar transistor (30), described the second channel portions (262a, 262b, 262c, 262d) be arranged in described the first channel portions (261a, 261b, 261c, 261d) below, and wherein, at described insulated gate bipolar transistor (20,30,40,50) in a lateral direction, described the second width is greater than described the first width.
4. according to the insulated gate bipolar transistor described in any one in claims 1 to 3 (20,30,40,50), it is characterized in that, along described the first channel portions (261a, 261b, 261c, 261d), described first width of described the first channel portions is consistent.
5. according to the insulated gate bipolar transistor (20 described in any one in claims 1 to 3,30,40,50), it is characterized in that, described at least one first groove and described at least one second groove all comprise by electrode (26) at least with the insulating barrier (27) of described source region (25) and described tagma (24,34) electric insulation.
6. according to the insulated gate bipolar transistor described in any one in claims 1 to 3 (20,30,40,50), it is characterized in that described the first channel portions (261a, 261b, 261c, 261d) be close to described tagma (24), described the second channel portions (262a, 262b, 262c, 262d) contiguous described tagma (24) and described drift region (23).
7. according to the insulated gate bipolar transistor described in any one in claims 1 to 3 (20,30,40,50), it is characterized in that described the first channel portions (261a, 261b, 261c, 261d) be close to described tagma (24) and described drift region (23), described the second channel portions (262a, 262b, 262c, 262d) contiguous described tagma (24).
8. according to the insulated gate bipolar transistor described in any one in claims 1 to 3 (20,30,40,50), it is characterized in that, described at least one first groove and described at least one second groove extend to same depth in described drift region (23).
9. according to the insulated gate bipolar transistor (20 described in any one in claims 1 to 3,30,40,50), it is characterized in that, described at least one first groove (26a, 26c) and described at least one second groove (26b, 26d) are alternately arranged in the horizontal-extending direction of described semiconductor body (31).
10. according to the insulated gate bipolar transistor described in any one in claims 1 to 3 (20,30,40,50), it is characterized in that a plurality of described the first groove (26a, 26c; 46a) with a plurality of described the second groove (26b, 26d; 46b) in the horizontal-extending direction of described semiconductor body (31), according to the quantitative proportion of 1:1, arrange.
11. according to the insulated gate bipolar transistor described in any one in claims 1 to 3 (20,30,40,50), it is characterized in that described the first groove (26a, 26c; Quantity 46a) is greater than described the second groove (26b, 26d; Quantity 46b).
12. according to the insulated gate bipolar transistor described in any one in claims 1 to 3 (20,30,40,50), it is characterized in that described the first groove (26a, 26c; Quantity 46a) is less than described the second groove (26b, 26d; Quantity 46b).
13. according to the insulated gate bipolar transistor described in any one in claims 1 to 3 (20,30,40,50), it is characterized in that described at least one first groove (26a, 26c) polysilicon filling groove with described at least one second groove (26b, 26d).
14. insulated gate bipolar transistors (20 according to claim 13,30,40,50), it is characterized in that, at polysilicon and described at least one first groove (26a, 26c) and described at least one second groove (26b, between sidewall 26d) and at polysilicon and, form dielectric layer (27) at the end of described at least one first groove (26a, 26c) and described at least one the second groove (26b, 26d).
15. according to the insulated gate bipolar transistor described in any one in claims 1 to 3 (20,30,40,50), it is characterized in that, further comprise:
Be formed on the surface of described semiconductor body and be positioned at least in part the groove (G1, G2) in described source region (25),
Wherein, a part for described emitter (29) is filled described groove (G1, G2), and described emitter is contacted with described tagma with described source region.
16. insulated gate bipolar transistors according to claim 15 (20,30,40,50), it is characterized in that described groove (G1, G2) the degree of depth is more than or equal to the degree of depth of a described pn knot of described source region (25) and described tagma (24,34) formation.
17. insulated gate bipolar transistors according to claim 15 (20,30,40,50), is characterized in that, further comprise:
Be formed in described tagma (24) and there is described the first conduction type and doping content is greater than the anti-breech lock district (P) of the doping content in described tagma (24),
Wherein, described emitter (29) contacts with described anti-breech lock district (P).
18. according to the insulated gate bipolar transistor described in any one in claims 1 to 3 (20,30,40,50), it is characterized in that, further comprise:
Collector region (21), has described the first conduction type, and is positioned at a side contrary with tagma side of described drift region (23); And
Collector electrode (C), contacts with described collector region (21).
19. insulated gate bipolar transistors according to claim 18 (20,30,40,50), it is characterized in that, further comprise: terminator (22), there is described the second conduction type and be arranged in described drift region (23) and described collector region (21) between.
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| CN201320220815.1U CN203445129U (en) | 2013-04-26 | 2013-04-26 | Insulated gate bipolar transistor |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107833915A (en) * | 2016-09-16 | 2018-03-23 | 英飞凌科技奥地利有限公司 | Semiconductor devices |
| CN109686782A (en) * | 2018-12-18 | 2019-04-26 | 吉林华微电子股份有限公司 | Semiconductor devices and preparation method thereof |
| CN111900202A (en) * | 2020-09-07 | 2020-11-06 | 珠海市浩辰半导体有限公司 | Trench gate IGBT device |
-
2013
- 2013-04-26 CN CN201320220815.1U patent/CN203445129U/en not_active Expired - Lifetime
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107833915A (en) * | 2016-09-16 | 2018-03-23 | 英飞凌科技奥地利有限公司 | Semiconductor devices |
| CN109686782A (en) * | 2018-12-18 | 2019-04-26 | 吉林华微电子股份有限公司 | Semiconductor devices and preparation method thereof |
| CN109686782B (en) * | 2018-12-18 | 2021-11-12 | 吉林华微电子股份有限公司 | Semiconductor device and method for manufacturing the same |
| CN111900202A (en) * | 2020-09-07 | 2020-11-06 | 珠海市浩辰半导体有限公司 | Trench gate IGBT device |
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Granted publication date: 20140219 |