CN203434982U

CN203434982U - Fiber channel data interface card capable of being configured work modes

Info

Publication number: CN203434982U
Application number: CN201320531995.5U
Authority: CN
Inventors: 胡钢; 邱昆
Original assignee: CHENGDU CHENGDIAN GUANGXIN TECHNOLOGY Co Ltd
Current assignee: Chengdu Uestc Optical Communication Co ltd
Priority date: 2013-08-29
Filing date: 2013-08-29
Publication date: 2014-02-12
Anticipated expiration: 2023-08-29

Abstract

The utility model discloses a fiber channel data interface card capable of being configured work modes. The fiber channel data interface card capable of being configured the work modes comprises a microprocessor, a field programmable gate array (FPGA) and a clock circuit. The FPGA and the clock circuit are both connected with the microprocessor, and the FPGA is connected with a memorizer and a light transmitting-receiving module, and is also connected with a dial switch. The advantage of the utility model is that the modes of the FPGA can be configured according to the actual conditions to adapt to different use environments.

Description

The optical-fibre channel data interface card of configurable mode of operation

Technical field

The utility model relates to a kind of optical-fibre channel data interface card, relates in particular a kind of optical-fibre channel data interface card of configurable mode of operation.

Background technology

Due to optical fiber communication have capacity large, transmit that information quality is high, the advantage such as long transmission distance, stable performance, anti-electromagnetism, resistance to corrosion are strong.And optical-fibre channel is a kind of high performance serial transmission protocol, there is the feature of high broadband, high real-time, become the preferred option of advanced synthesis electronic system of new generation network interconnection.Optical-fibre communications data interface card, as the interface of electronic system and network, is the key component that forms electric network, and its research has become important and urgent task.Interface card generally adopts FPGA design, and FPGA contains inside a plurality of patterns, and for different environments for use, the most applicable pattern is not identical.

Utility model content

The utility model provides a kind of optical-fibre channel data interface card of configurable mode of operation, and the pattern of its FPGA can configure according to actual conditions, to adapt to different environments for use.

For solving above-mentioned technical problem, the utility model by the following technical solutions:

The optical-fibre channel data interface card of configurable mode of operation, it comprises microprocessor, FPGA and clock circuit, described FPGA and clock circuit are all connected on microprocessor, are connected with memory and optical transceiver module on described FPGA, are also connected with toggle switch on described FPGA.

In the utility model, the operating state of microprocessor for managing FPGA, and memory is managed, optical transceiver module provides optical fiber interface, realizes the conversion of light signal and the signal of telecommunication.There is multiplex mode FPGA inside, comprise JTAG pattern, main string pattern, from string pattern, master pattern, from and pattern and SPI pattern, according to the dial-up of toggle switch can be realized the pattern of FPGA is configured.

Further technical scheme is:

Described toggle switch is 4 toggle switchs.Because FPGA internal schema is counted quantitative limitation, adopt 4 toggle switchs.

Described memory comprises SRAM and FLASH.SRAM is static random access memory; FLASH is flash memory.Because adopting CMOS configuration, FPGA latchs to realize configurable interconnected between wiring and logical block, volatibility, while removing power supply, can not retain original configuration.Therefore power on each time and all must reinitialize CMOS configuration and latch.Will select non-volatile configuration memory to realize the configuration to FPGA, memory will adopt non-volatile configuration memory.

Described clock circuit comprises the first clock circuit and second clock circuit.Adopt the first clock circuit and second clock circuit, it can effectively improve the clock stability of internal system.

The first described clock circuit comprises DS4106.

Described second clock circuit comprises DS4212.

DS4106 and DS4212, its phase jitter and phase noise are extremely low, effectively guarantee the superiority of the performance of interface card.

Described microprocessor is ARM microprocessor.

Compared with prior art, the beneficial effects of the utility model are: toggle switch of the present utility model can be realized the pattern progress configuration to FPGA, so that optical-fibre channel data interface card adapts to different environment, make performance reach optimum.

Accompanying drawing explanation

Below in conjunction with the drawings and specific embodiments, the utility model is described in further detail.

Fig. 1 is theory diagram of the present utility model.

Embodiment

Below in conjunction with accompanying drawing, the utility model is further described.Execution mode of the present utility model includes but not limited to the following example.

[embodiment]

The optical-fibre channel data interface card of configurable mode of operation as shown in Figure 1, it comprises microprocessor, FPGA and clock circuit, described FPGA and clock circuit are all connected on microprocessor, on described FPGA, be connected with memory and optical transceiver module, on described FPGA, be also connected with toggle switch.

Described toggle switch is 4 toggle switchs.

Described memory comprises SRAM and FLASH.

Described clock circuit comprises the first clock circuit and second clock circuit.

The first described clock circuit comprises DS4106.

Described second clock circuit comprises DS4212.

Described microprocessor is ARM microprocessor.

In the utility model, optical transceiver module can be selected FTRJ-8519-1-2.5, and it provides 2.125Gbps transmission rate, adopts 850nm laser, has good shake and EMI characteristic, can finely meet the demands.ARM microprocessor can adopt CORTEX-M3.FPGA can be adopted as XC5VLX110T.Toggle switch can adopt SW-DIP4.

Be as mentioned above embodiment of the present utility model.The utility model is not limited to above-mentioned execution mode, and anyone should learn the structural change of making under enlightenment of the present utility model, every with the utlity model has identical or close technical scheme, within all falling into protection range of the present utility model.

Claims

1. the optical-fibre channel data interface card of configurable mode of operation, it is characterized in that: it comprises microprocessor, FPGA and clock circuit, described FPGA and clock circuit are all connected on microprocessor, on described FPGA, be connected with memory and optical transceiver module, on described FPGA, be also connected with toggle switch.

2. the optical-fibre channel data interface card of configurable mode of operation according to claim 1, is characterized in that: described toggle switch is 4 toggle switchs.

3. the optical-fibre channel data interface card of configurable mode of operation according to claim 1, is characterized in that: described memory comprises SRAM and FLASH.

4. the optical-fibre channel data interface card of configurable mode of operation according to claim 1, is characterized in that: described clock circuit comprises the first clock circuit and second clock circuit.

5. the optical-fibre channel data interface card of configurable mode of operation according to claim 4, is characterized in that: the first described clock circuit comprises DS4106.

6. according to the optical-fibre channel data interface card of the configurable mode of operation described in claim 4 or 5, it is characterized in that: described second clock circuit comprises DS4212.

7. the optical-fibre channel data interface card of configurable mode of operation according to claim 1, is characterized in that: described microprocessor is ARM microprocessor.