CN203414277U - High-precision data acquisition apparatus used in model plane engine - Google Patents

Abstract

The utility model diskloses a high-precision data acquisition apparatus used in a model plane engine. The apparatus comprises a signal amplification circuit, an A/D converter, an FPGA, an LCD, an SDRAM, a FLASH, an FIFO, an ARM9 and a UART. The signal amplification circuit inputs model plane engine analog signals. The FPGA is respectively correspondingly connected with the A/D converter, the FIFO and the ARM9. The FIFO is also connected with the A/D converter. The ARM9 is further respectively correspondingly connected with the LCD, the SDRAM, the FLASH and the UART. The apparatus performs signal A/D sampling and data storage through the FPGA. Data processed by the ARM9 and the FPGA in an algorithm way are stored in the off-chip SDRAM and the FLASH in a DMA means and further transmitted to a host through the UART interface. The apparatus which makes full use of the advantages of a high-end processor and large amounts of hardware resources performs high-precision data acquisition, rapid analysis and transmission on real-time data in an uninterrupted way. The apparatus is very suitably used for data acquisition in the model plane engine.

Description

High-accuracy data acquisition device for engine model

Technical field

The utility model relates to a kind of data collector, relates in particular to a kind of high-accuracy data acquisition device for engine model.

Background technology

Along with the develop rapidly of modern society's new and high technology, various industrial technologies are more and more higher to the requirement of data acquisition system (DAS).Data collector is widely used in the every field such as industry, national defence, image processing, input, and in these application, available high-speed data acquisition card gathers these data-signals, processes and storage.In the experimentation of engine model, need to carry out high-precision data acquisition and express-analysis and transmission to the parameters of engine model, but adopt of the data collector that engine model is used at present be take A/D converter+FPGA as main tactic pattern more, the precision of its image data is limited, data analysis and transmission speed are not enough, and be difficult to carry out exchanges data with extraneous main frame, so its application drawback is day by day obvious.

Utility model content

The purpose of this utility model provides a kind of high-accuracy data acquisition device for engine model with regard to being in order to address the above problem.

The utility model is achieved through the following technical solutions above-mentioned purpose:

High-accuracy data acquisition device for engine model described in the utility model comprises signal amplification circuit, A/D converter, FPGA, LCD, SDRAM, FLASH, FIFO, ARM9 and UART, described signal amplification circuit input engine model simulating signal, described FPGA is respectively with described A/D converter, described FIFO with described ARM9 is corresponding is connected, described FIFO is also connected with described A/D converter, and described ARM9 is also respectively with described LCD, described SDRAM, described FLASH with described UART is corresponding is connected.

FPGA(Field-Programmable Gate Array), i.e. field programmable gate array, it is the product further developing on the basis of the programming devices such as PAL, GAL, CPLD.It occurs as a kind of semi-custom circuit in special IC (ASIC) field, has both solved the deficiency of custom circuit, has overcome again the limited shortcoming of original programming device gate circuit number.

SDRAM(Synchronous Dynamic Random Access Memory), synchronous DRAM, synchronously refers to Memory need of work synchronous clock, and the inner transmission of order and the transmission of data all be take it as benchmark; Dynamically refer to that storage array need to constantly refresh to guarantee that data do not lose; Refer to that at random data are not that linearity is stored successively, but free assigned address carries out reading and writing data.

FLASH is a kind of of storage chip, can revise the data of the inside by specific program.In FLASH electronics and semiconductor applications, often represent the meaning of Flash Memory, i.e. " flash memory ", is named as Flash EEPROM Memory entirely.

UART(Universal Asynchronous Receiver/Transmitter), Universal Asynchronous Receiver & dispensing device, UART is the chip that a parallel input becomes serial output, is conventionally integrated on mainboard.

FIFO is the abbreviation of First Input First Output, First Input First Output, this is a kind of traditional manner of execution according to the order of sequence, the instruction being introduced into first completes and retires from office, and then just carry out second instruction, it is a kind of data buffer of first in first out, the difference of he and normal memory is there is no exterior read-write address wire, use so very simple, but shortcoming be exactly can only order data writing, the sense data of order, its data address automatically adds 1 by inside read-write pointer and completes, can not as normal memory, can be determined to read or write by address wire the address of certain appointment.

ARM9 series processors is the main flow flush bonding processor of Britain ARM company design, mainly comprises the series such as ARM9TDMI and ARM9E-S.ARM9 represents the processor of LiaoARM company main flow, at aspects such as cell-phone, Set Top Box, digital camera, GPS, personal digital assistant and internet equipments, has had application widely.

The beneficial effects of the utility model are:

The utility model, by FPGA, signal is carried out to A/D sampling and data are stored, by the data after ARM9FPGA algorithm process, by dma mode, be stored into the outer SDRAM of sheet and FLASH, and can send main frame to by UART interface, take full advantage of the advantage of high-end processor and a large amount of hardware resources, real time data is carried out to continual high-accuracy data acquisition and express-analysis and transmission, be highly suitable for the data acquisition of engine model.

Accompanying drawing explanation

Fig. 1 is the circuit block diagram of the high-accuracy data acquisition device for engine model described in the utility model;

Fig. 2 be FPGA described in the utility model respectively with the data transmission structure schematic diagram of A/D converter and ARM9.

Embodiment

Below in conjunction with accompanying drawing, the utility model is described in further detail:

As shown in Figure 1, high-accuracy data acquisition device for engine model described in the utility model comprises signal amplification circuit, A/D converter, FPGA, LCD, SDRAM, FLASH, FIFO, ARM9 and UART, signal amplification circuit input engine model simulating signal, the output signal of signal amplification circuit is transferred to A/D converter, FPGA is connected with A/D converter, FIFO and ARM9 are corresponding respectively, FIFO is also connected with A/D converter, and ARM9 is also connected with LCD, SDRAM, FLASH and UART are corresponding respectively.

As shown in Figure 2, communication between FPGA and ARM9 is by the some addresses in read-write bus, to carry out the transmission of instruction and data, being connected except data Date, address Addr and read-write Reset between ARM9 and FPGA, also have look-at-me nCS, nOE and nWE, make system can respond corresponding hardware and software and interrupt processing; Between FPGA and A/D converter, except mutual transmission of control signals, FPGA is also to A/D converter transmission frequency division trigger pip.

The model that in high-accuracy data acquisition device described in the utility model, critical piece adopts is as follows:

A/D converter: adopt the high-speed a/d converter of ADI, the AD7874 of 12, adopts the good LC2MOS technique of the linearity to make, and has height and very little relative delay;

FPGA: adopting the CycloneII Series FPGA device of altera corp, is low-cost FPGA type, adopts TSMC90nm, Low-K technique, 1.2V kernel.

ARM9: the ARM9TDMI that adopts Britain ARM company.

FIFO: the CY7C4235-15AC series of products that adopt CYPRESS (Sai Pulasi).

UART: adopt 16650AFN chip.

Claims (1)

1. the high-accuracy data acquisition device for engine model, comprise signal amplification circuit, A/D converter, on-site programmable gate array FPGA, liquid crystal display LCD, synchronous DRAM SDRAM and flash memory FLASH, described signal amplification circuit input engine model simulating signal; It is characterized in that: also comprise first in first out data buffer FIFO, processor A RM9 and Universal Asynchronous Receiver & dispensing device UART, described FPGA is respectively with described A/D converter, described FIFO with described ARM9 is corresponding is connected, described FIFO is also connected with described A/D converter, and described ARM9 is also respectively with described LCD, described SDRAM, described FLASH with described UART is corresponding is connected.