CN203339713U - Static var generator SVG for inhibiting unbalanced load - Google Patents
Static var generator SVG for inhibiting unbalanced load Download PDFInfo
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Abstract
Disclosed is a static var generator SVG for inhibiting unbalanced load. A traditional three-phase three-leg main circuit topology structured SVG only can be applied in a three-phase three-wire system. However, a lot of three-phase four-wire systems and unbalanced systems exist in practical application, wherein neutral current is also very harmful. The static var generator SVG provided by the utility model is structured as follows: a three-phase four-leg inverter (2) is connected with a three-phase alternating-current supply (1); the three-phase four-leg inverter is connected with an isolating driver circuit (3) which is connected with a DSP2812 chip (4); the DSP2812 chip is connected with a Hall voltage module (5); the DSP2812 chip is connected with a Hall current module (6) which is connected with the three-phase alternating-current supply which is connected with a load (7); and the three-phase alternating-current supply is connected with a voltage zero-cross detection module (8). The static var generator SVG provided by the utility model is used to improve grid power quality.
Description
Technical field:
The utility model relates to a kind of static reacance generator SVG that suppresses unbalanced load.
Background technology:
In recent years, the power electronic technology fast development, particularly be used in power domain on a large scale.Because uneven and nonlinear load constantly increase in low-voltage network, the quality of power supply has been subject to serious impact, in the three-phase three-wire system system, owing to there is no neutral line current, thereby reactive power compensation strategy under this system only needs to consider the compensation negative-sequence current.
Along with high-power nonlinear-load increases gradually in three-phase four-wire system, accumulated a large amount of zero-sequence currents on center line, make the qualification rate degradation of electrical design, a large amount of reactive powers and harmonic wave have also caused great potential safety hazard to electrical network, and the SVG of traditional three-phase three brachium pontis main circuit topological structures adopts
i p ,
i q electric current detecting method and PWM modulation technique, can only in the three-phase three-wire system system, apply, yet in practical application, be three-phase four-wire system mostly, a large amount of three-phase four-wire systems, the existence of unbalanced system, make wherein neutral line current also produce larger harm, in this case, traditional three-phase three brachium pontis SVG just can't be used, necessary with novel three-phase four-arm SVG.
The utility model content:
The purpose of this utility model is to provide a kind of static reacance generator SVG that suppresses unbalanced load.
Above-mentioned purpose realizes by following technical scheme:
A kind of static reacance generator SVG that suppresses unbalanced load, its composition comprises: three-phase four-leg inverter, described three-phase four-leg inverter is connected with three-phase alternating-current supply, described three-phase four-leg inverter is connected with isolated drive circuit, described isolated drive circuit is connected with the DSP2812 chip, described DSP2812 chip is connected with voltage Hall module, described DSP2812 chip is connected with the current Hall module, described current Hall module is connected with described three-phase alternating-current supply, described three-phase alternating-current supply is connected with load, described three-phase alternating-current supply is connected with the voltage zero-cross detection module.
The static reacance generator SVG of described inhibition unbalanced load, the a phase line of described three-phase alternating-current supply is connected by inductance with the brachium pontis A of described three-phase four-leg inverter, the b phase line of described three-phase alternating-current supply is connected by inductance with the brachium pontis B of described three-phase four-leg inverter, the c phase line of described three-phase alternating-current supply is connected by inductance with the brachium pontis C of described three-phase four-leg inverter, the center line of described three-phase alternating-current supply is connected with the brachium pontis D of described three-phase four-leg inverter, described a phase line is connected with described voltage zero-cross detection module, described current Hall module respectively with described a phase line, described b phase line, described c phase line connects.
Beneficial effect:
1. the utility model adopts the zero-sequence current partition method on the basis of instantaneous reactive power theory, not only can detect idle and harmonic wave and can also detect zero-sequence current, thereby make its application wider.Its main circuit topological structure adopts based on SVPWM (SVPWM) technology can reduce the harmonic content of load current, the utilance of raising DC bus-bar voltage.The 4th brachium pontis increased can also, in the situation that laod unbalance still can carry out reactive power compensation well, even still can compensate each phase current in the situation that load is opened circuit mutually.
The utility model provides a kind of stable, energy-conservation, reliable reactive power compensator, has very wide application, compensating reactive power, harmonic wave, zero-sequence current well, and in the situation that phase shortage or single-phase fault still can compensate well.In addition, system also has overvoltage, under-voltage, overheat protector function, has guaranteed system safety, reliability service.
The accompanying drawing explanation:
Accompanying drawing 1 is entire system block diagram of the present utility model.In figure, 1 is three-phase alternating-current supply, and 2 is three-phase four-leg inverter, 3 is isolated drive circuit, and 4 is the DSP2812 chip, and 5 is voltage Hall module, 6 is the current Hall module, and 7 is load, and 8 is the voltage zero-cross detection module, 9 is a phase line, and 10 is the b phase line, and 11 is the c phase line, 12 is center line, and 13 is brachium pontis A, and 14 is brachium pontis B, 15 is brachium pontis C, and 16 is brachium pontis D.
Accompanying drawing 3 is slip mean filter sampled data window schematic diagrames of the present utility model.
Accompanying drawing 4 is circuit theory diagrams of voltage zero-cross detection module of the present utility model.
Accompanying drawing 6 is circuit theory diagrams that four-leg inverter of the present utility model is connected with electrical network.
Accompanying drawing 7 is circuit theory diagrams of three-phase isolated drive circuit of the present utility model.
Accompanying drawing 8 be of the present utility model under the alpha-beta coordinate system polar plot of voltage and electric current.
Accompanying drawing 9 is structure diagrams of three-phase four-leg inverter of the present utility model.
Accompanying drawing 10 is the polar plots of 3D-SVPWM under ABC coordinate system of the present utility model.
Switch sequence schematic diagram when accompanying drawing 12 is N=1 of the present utility model.
Accompanying drawing 13 is system main program flow charts of the present utility model.
Accompanying drawing 14 is capture interrupt subroutine flow charts of the present utility model.
Accompanying drawing 15 is A/D interruption subroutine flow charts of the present utility model.
Accompanying drawing 16 is error protection interruption subroutine flow charts of the present utility model.
Accompanying drawing 17 is 3D-SVPWM program flow diagrams.
Accompanying drawing 18 is oscillograms of the front A phase voltage of compensation and electric current.
Accompanying drawing 19 is oscillograms of the rear A phase voltage of compensation and electric current.
Accompanying drawing 20 is DC side busbar voltage figure.
Accompanying drawing 21 is unbalanced load compensation three-phase power network current figure.
Accompanying drawing 22 is three phase network map of current after the unbalanced load compensation.
Accompanying drawing 23 is oscillograms of neutral line current before the unbalanced load compensation.
Accompanying drawing 24 is oscillograms of neutral line current after the unbalanced load compensation.
Accompanying drawing 25 is that the front oscillogram of three phase network current compensation in the open circuit fault situation occurs.
Accompanying drawing 26 is that oscillogram after the three phase network current compensation occurs in the open circuit fault situation.
Accompanying drawing 27 is front oscillograms of fault phase electric current and voltage compensation when single-phase open circuit fault occurs.
Accompanying drawing 28 is rear oscillograms of fault phase electric current and voltage compensation when single-phase open circuit fault occurs.
Embodiment:
Embodiment 1:
A kind of static reacance generator SVG that suppresses unbalanced load, its composition comprises: three-phase four-leg inverter, described three-phase four-leg inverter is connected with three-phase alternating-current supply, described three-phase four-leg inverter is connected with isolated drive circuit, described isolated drive circuit is connected with the DSP2812 chip, described DSP2812 chip is connected with voltage Hall module, described DSP2812 chip is connected with the current Hall module, described current Hall module is connected with described three-phase alternating-current supply, described three-phase alternating-current supply is connected with load, described three-phase alternating-current supply is connected with the voltage zero-cross detection module.
Embodiment 2:
Static reacance generator SVG according to the described inhibition unbalanced load of embodiment 1, the a phase line of described three-phase alternating-current supply is connected by inductance with the brachium pontis A of described three-phase four-leg inverter, the b phase line of described three-phase alternating-current supply is connected by inductance with the brachium pontis B of described three-phase four-leg inverter, the c phase line of described three-phase alternating-current supply is connected by inductance with the brachium pontis C of described three-phase four-leg inverter, the center line of described three-phase alternating-current supply is connected with the brachium pontis D of described three-phase four-leg inverter, described a phase line is connected with described voltage zero-cross detection module, described current Hall module respectively with described a phase line, described b phase line, described c phase line connects.
Embodiment 3:
The control method of the static reacance generator SVG of above-mentioned inhibition unbalanced load,
(1) control method of control unit:
In the alpha-beta coordinate system, the instantaneous value of each phase voltage in three-phase system is made as respectively
e a , e b , e c , the three-phase current instantaneous value is
i a , i b , i c .At first convert three variablees under three-dimensional coordinate system to two two-dimentional variablees under the alpha-beta coordinate system, the instantaneous voltage under two-dimensional coordinate system
e α , e β and transient current
i α , i β can be obtained by following formula;
Wherein:
Rotating vector e and i are respectively by the vector on the alpha-beta plane
e α , e β with
i α , i β synthetic:
In formula (4), (5), vector
,
mould be respectively e and i, its argument is respectively
,
;
The instantaneous active current of three-phase system is
, instantaneous reactive current is
, and
.The instantaneous active power p of system and instantaneous reactive power q can be expressed as:
Wherein,
To in formula (1) and (2) substitution (6), have:
The method of work of (2) four brachium pontis inversion control:
At first detect the threephase load electric current
i a ,
i b ,
i c , then remove zero-sequence current, and recycle the electric current testing based on Instantaneous Power Theory, go out the active current of system through Clarke, Park transformation calculations
i p ,reactive current
i q with the zero sequence compensation electric current
i n ' .Real component
i p after low pass filter filtering
i p ' , disconnect
i q passage, more right
i p ' carry out the coordinate inverse transformation and obtain the first-harmonic real component
i af ,
i bf ,
i cf , and use the threephase load electric current
i a , i b , i c deduct this first-harmonic real component, obtain the instruction current signal of required compensation
i ah ,
i bh ,
i ch , with compensating current signal, through PI, regulate, obtain the command voltage signal
u a ,
u b ,
u c , finally by 3D-SVPWM modulate, 8 power switch pipes of power amplification rear drive four-leg inverter, exported the current feedback electrical network of required compensation by inverter;
In order to compensate the electric current on center line, three-phase four-leg inverter has increased by one and has put with load neutral the brachium pontis be connected on the basis of three-phase three brachium pontis, because three-phase four-arm system load electric current
i a , i b , i c contain identical zero-sequence current component
, and
, the zero-sequence current in system that hence one can see that
i n for
, by zero-sequence current component
remove from each phase current, obtain only having the electric current of positive sequence component and negative sequence component:
(9)
(10)
And their sums are zero, that is:
（11）
Now just can utilize based on instantaneous reactive power theory
i p , i q detection method is detected, and obtains fundamental positive sequence as follows:
Use again load current
i a , i b , i c deduct this fundamental positive sequence current component, just obtain comprising the compensating instruction current signal of idle, harmonic wave, first-harmonic negative phase-sequence and zero-sequence current,
(13)
When certain mutually open-phase fault occurs, suppose here
aoccur mutually open circuit fault (
b, Cwhile mutually open circuit fault occurring, situation is identical with it), now have
i a =0, because null vector can resolve into three vectorial sums, above-mentioned (9) ~ (12) formula is constant, and formula (13) is:
By (14) formula, can be found out, when
awhile mutually open circuit fault occurring, the current compensation signal of A phase becomes the reverse of fundamental positive sequence electric current
, because A opens circuit mutually, size is
the current direction electrical network, be equivalent to size and be
electric current flows out from A phase electrical network, and B, C phase power network current still only contain fundamental positive sequence after compensation, visible, under certain is short-circuited failure condition mutually, through overcompensation, finally makes each only contain the fundamental positive sequence electric current mutually, does not contain zero-sequence current, current in middle wire in A, B, C
i n =0, therefore under single-phase open circuit fault, still can well compensate.Figure 25 and Figure 26 have provided A 0.04
sthe front electrical network three-phase current of compensation and the rear electrical network three-phase current waveform of compensation under constantly unexpected open circuit conditions.Figure 27 and Figure 28 have provided the front voltage current waveform of compensation and the rear line voltage current waveform of compensation under the A failure condition.
Embodiment 4:
Control method according to the static reacance generator SVG of the described inhibition unbalanced load of embodiment 3, in the normal operation of SVG, DC capacitor voltage can fluctuate because of the existence of harmonic wave and switching device loss, for making voltage be constantly equal to set point, must be controlled the busbar voltage of DC side, so the method that adopts PI to regulate is controlled the voltage of DC side; Because acting on to be connected on inductance with the difference of AC supply voltage, the capacitance voltage that offset current is DC side produces, so must meet the variation that DC voltage is greater than the peak value ability control and compensation electric current of alternating voltage;
The peak value of AC voltage is:
Therefore, the DC side reference voltage is chosen 800V;
The magnitude of voltage U of a given DC side
dc, U
dcthe DC voltage U returned with actual feedback
efcompare U
dc-U
efdifference after pi regulator, the command signal △ i of adjusted DC voltage
p; By △ i
pbe input on the meritorious branch road of first-harmonic, therefore, in the offset current that main circuit produces, just comprised certain fundamental active current, make the DC side of static reacance generator and AC carry out energy exchange, thereby by U
efbe adjusted to set-point.
Embodiment 5:
Static reacance generator SVG according to embodiment 1 or 2 or 3 or 4 described inhibition unbalanced loads, while calculating reactive current, at first each phase current deducts zero-sequence current (ia+ib+ic)/3, carry out again coordinate transform, the real component that obtains direct current is carried out filtering, adopt improved digital slip mean filter, it calculates simple, real-time is better, the instruction current that final conversion obtains can the compensating reactive power electric current, harmonic current, zero-sequence current in also can compensation network, the filter operation principle as shown in Figure 3.
Embodiment 6:
Static reacance generator SVG according to embodiment 1 or 2 or 3 or 4 described inhibition unbalanced loads, as shown in Figure 4, in order to carry out coordinate transform, need to know the phase place of any time A phase voltage, therefore need the synchronized testing circuit, adopt herein voltage zero-cross detection module CHV-25P the A phase voltage reduce to amplitude be about 5V with electrical network with the low pressure sinusoidal signal of homophase frequently, this signal finally obtains the square-wave signal of 0 ~ 3.3V through treatment circuit, to meet the requirement of DSP2812 to input voltage.Catch the trailing edge of this square wave signal by DSP capturing unit CAP3, can obtain the zero crossing of line voltage.
Embodiment 7:
Static reacance generator SVG according to embodiment 1 or 2 or 3 or 4 described inhibition unbalanced loads, as shown in Figure 5, because SVG is higher to requirement of real-time, the hysteresis caused in order to reduce sampling element as far as possible, its current sample all adopts current Hall module CHB-25NP at a high speed to realize three-phase current detection, take the A phase current sampling as example, the Hall element secondary current is sampled and is obtained UM by resistance R M, and the A/D conversion mouthful that is input to DSP after isolation, biasing, low-pass filtering and clamped processing is processed.
Embodiment 8:
According to the static reacance generator SVG of embodiment 1 or 2 or 3 or 4 described inhibition unbalanced loads, as shown in Figure 6, be inverter and electrical network connection layout, the DC voltage Udc in figure is 800V.Static reacance generator SVG adopts GTO and these two kinds of electronic power switch devices of IGBT mostly.The switching device that the utility model is selected is IGBT, and during due to laod unbalance, the 4th brachium pontis will be processed current in middle wire, the capacity of IGBT is not only relevant with the capacity of SVG, also relevant with the size of load neutral electric current, so, the current class of switching tube can suitably be improved.
Embodiment 9:
Static reacance generator SVG according to embodiment 1 or 2 or 3 or 4 described inhibition unbalanced loads, as shown in Figure 7, in order to improve the antijamming capability of system, the pwm signal that DSP is sent is given optocoupler TLP250 chip after carrying out level conversion through 74HC06, and signal amplifies and carrys out the driving power pipe through isolation, the use of optocoupler, can reduce signal delay, realize the isolation of forceful electric power and light current, improve reliability.
Embodiment 10:
Static reacance generator SVG according to embodiment 1 or 2 or 3 or 4 described inhibition unbalanced loads, the key control unit of system adopts the DSP of TI company process chip TMS320F2812, highest frequency can reach 150MHz, and this chip peripheral hardware comprises 12,16 tunnel Precision A/D C, 2 road SCI and two event manager modules (EVA and EVB) etc.Each event manager module comprises 6 road PWM/CMP, 2 road QEP and 3 road CAP.
Embodiment 11:
According to the static reacance generator SVG of embodiment 1 or 2 or 3 or 4 described inhibition unbalanced loads, as shown in Figure 9, the phase mid-point voltage of inverter is the three-phase four-leg inverter structure diagram
u aN ,
u bN ,
u cN .For the expression that makes the switching voltage vector clear simple and clear, first right here
u aN , U bN , U cN value carry out standardization (order
u dc=1), with perunit value, mean space vector of voltage.
Suppose
s a , S b , S c , S n mean respectively four brachium pontis
a, B, C, Non off state, managing conducting (lower pipe turn-off) on each brachium pontis is 1, it is 0 that upper pipe turn-offs (conducting of lower pipe), such one has 16 on off states; The synthetic switching vector selector that each on off state is corresponding, order here
u 0arrive
u 15for these 16 switching vector selectors, wherein
u 0with
u 15for zero vector, its corresponding relation is as shown in table 1.
Table 1 three-phase four-leg inverter on off state table
| State | S A | S B | S C | S N | U AN | U BN | U CN | Vector |
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
|
| 1 | 0 | 0 | 1 | 0 | 0 | 0 | 1 |
|
| 2 | 0 | 1 | 0 | 0 | 0 | 1 | 0 |
|
| 3 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | U 3 |
| 4 | 1 | 0 | 0 | 0 | 1 | 0 | 0 |
|
| 5 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | U 5 |
| 6 | 1 | 1 | 0 | 0 | 1 | 1 | 0 |
|
| 7 | 1 | 1 | 1 | 0 | 1 | 1 | 1 |
|
| 8 | 0 | 0 | 0 | 1 | -1 | -1 | -1 |
|
| 9 | 0 | 0 | 1 | 1 | -1 | -1 | 0 |
|
| 10 | 0 | 1 | 0 | 1 | -1 | 0 | -1 |
|
| 11 | 0 | 1 | 1 | 1 | -1 | 0 | 0 |
|
| 12 | 1 | 0 | 0 | 1 | 0 | -1 | -1 |
|
| 13 | 1 | 0 | 1 | 1 | 0 | -1 | 0 |
|
| 14 | 1 | 1 | 0 | 1 | 0 | 0 | -1 |
|
| 15 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | U 15 |
By these 16 synthetic switching voltage vectors rest frame (
aBCcoordinate system) be drawn as three dimensional vector diagram under and just obtained a space dodecahedron, as shown in figure 10.The state 13 of take has as example, now
s a , S b , S c , S n be respectively 1,0,1,1;
u aN , U bN , U cN be respectively 0 ,-1,0; This expression be
a, C, Nmanage conducting on brachium pontis, lower pipe turn-offs;
bon brachium pontis, pipe turn-offs, lower pipe conducting.The switching voltage vector is
u 13, be arranged in rest frame (0 ,-1,0) coordinate place.
For switching vector selector Figure 10, we can use plane
=0,
=0,
=0 He
-
=0,
-
=0,
-
=0 is divided into 24 little space tetrahedrons by control area, and each tetrahedron consists of two zero switching voltage vectors of three non-zero switching voltage vectors, as long as determined that like this space, reference voltage vector place tetrahedron just can utilize corresponding switching voltage vector to carry out matching.For example, the reference voltage vector in a certain moment exists
aBCcoordinate in coordinate system be (
,
,
), and have
0,
0,
0,
-
0,
-
0,
-
0, can judge its little space, place tetrahedron, thereby determine that three non-zero switching voltage vectors that synthesize it are
,
,
.
In order to simplify this judgement, we have defined
k 1arrive
k 6these six variablees, these six variablees are representing the division direction on six planes, as long as determined that they are 0 or 1 just can judge the reference voltage vector position.The expression formula of six variablees is as follows
(18)
In formula,
,
,
for the standardization reference voltage vector.
The definition pointer function:
Will
arrive
the symbol of these six variablees and unique pointer variable
nconnect, by calculating
nhave 24 values, just in time corresponding one by one with 24 tetrahedrons.Figure 11 has provided pointer variable
ncorresponding tetrahedral site and three non-zero switching voltage vectors.
Judge tetrahedral position, reference voltage vector place, after having determined three non-zero switching voltage vectors for the synthesis of it, just can equate that principle calculates each non-zero switching voltage vector and the corresponding duty ratio of zero vector by the weber area.Owing to will reference voltage vector being synthesized to equivalence with two zero vectors of three non-zero switching voltage vectors, the reference voltage vector size equals each switching voltage vector that current time is corresponding and the sum of products of its duty ratio so, shown in (22).In order to obtain the value of duty ratio, formula (23) is converted, obtain formula (24) and (25).
In formula,
u reffor reference voltage vector;
d 1,
d 2,
d 3be respectively three corresponding duty ratios of non-zero switching voltage vector;
u dx_A,
u dx_B,
u dx_Cfor the switching voltage vector exists
aBCprojection value under coordinate system (x=1,2,3);
d 0that (this zero vector can be for the duty ratio of zero vector
u 0with
u 15any one in two zero vectors can be also both combinations).With
n=1 is example, and non-zero switching voltage vector is
u 8,
u 9,
u 11, the duty ratio of calculating them according to formula (23) is
Arrange:
Use the same method, can obtain
ncorresponding situation while equaling other 23 values, the pointer variable that provided as shown in table 2
nwith non-zero switching voltage vector with and the corresponding relation of duty ratio.
Table 2 pointer variable
ncorresponding relation with set of vectors, duty ratio
| N | U d1 | U d2 | U d3 | d 1 | d 2 | d 3 |
| 1 | U 9 | U 10 | U 12 | - U Cref | - U Bref+ U Cref | - U Aref+ U Bref |
| 5 | U 1 | U 9 | U 11 | U Cref | - U Bref | - U Aref+ U Bref |
| 7 | U 1 | U 3 | U 11 | - U Bref+ U Cref | - U Bref | - U Aref |
| 8 | U 1 | U 3 | U 7 | - U Bref+ U Cref | - U Aref+ U Bref | U Aref |
| 9 | U 8 | U 9 | U 13 | - U Cref | - U Aref+ U Cref | U Aref- U Bref |
| 13 | U 1 | U 9 | U 13 | U Cref | - U Aref | U Aref- U Bref |
| 14 | U 1 | U 5 | U 13 | - U Aref+ U Cref | U Aref | - U Bref |
| 16 | U 1 | U 5 | U 7 | - U Aref+ U Cref | U Aref- U Bref | U Bref |
| 17 | U 8 | U 10 | U 11 | - U Bref | U Bref- U Cref | - U Aref+ U Cref |
| 19 | U 2 | U 10 | U 11 | U Bref | - U Cref | - U Aref+ U Cref |
| 23 | U 2 | U 3 | U 11 | U Bref- U Cref | U Cref | - U Aref |
| 24 | U 2 | U 3 | U 7 | U Bref- U Cref | - U Aref+ U Cref | U Aref |
| 41 | U 8 | U 12 | U 13 | - U Aref | U Aref- U Cref | - U Bref+ U Cref |
| 42 | U 4 | U 12 | U 13 | U Aref | - U Cref | - U Bref+ U Cref |
| 46 | U 4 | U 5 | U 13 | U Aref- U Cref | U Cref | - U Bref |
| 48 | U 4 | U 5 | U 7 | U Aref- U Cref | - U Bref+ U Cref | U Bref |
| 49 | U 8 | U 10 | U 14 | - U Bref | - U Aref+ U Bref | U Aref- U Cref |
| 51 | U 2 | U 10 | U 14 | U Bref | - U Aref | U Aref- U Cref |
| 52 | U 2 | U 6 | U 14 | - U Aref+ U Bref | U Aref | - U Cref |
| 56 | U 2 | U 6 | U 7 | - U Aref+ U Bref | U Aref- U Cref | U Cref |
| 57 | U 8 | U 12 | U 13 | - U Aref | U Aref- U Bref | U Bref- U Cref |
| 58 | U 4 | U 12 | U 14 | U Aref | - U Bref | U Bref- U Cref |
| 60 | U 4 | U 6 | U 14 | U Aref- U Bref | U Bref | - U Cref |
| 64 | U 4 | U 6 | U 7 | U Aref- U Bref | U Bref- U Cref | U Cref |
After drawing the duty ratio of each switching voltage vector, be multiplied by the ON time that can obtain them cycle time, below only need to sequentially be arranged the conducting of each switching voltage vector, reasonably arrange switching sequence.In order to reduce harmonic wave of output voltage content, switch motion number of times and loss thereof, this paper adopts the Central Symmetry sortord that inserts two zero vectors.With pointer variable
n=within 1 o'clock, be example,
u 8,
u 9,
u 11for now corresponding non-zero switching voltage vector, sortord as shown in figure 12.
Finally according to this Central Symmetry sortord, provide its switching over point computing formula suc as formula shown in (27),
t 1 , T 2,
t 3 , T 4be followed successively by the duty ratio upper pipe conducting moment from big to small in four brachium pontis.
Embodiment 12:
Static reacance generator SVG according to embodiment 1 or 2 or 3 or 4 described inhibition unbalanced loads, the integrated planning of SVG systems soft ware completes by program design, its mainly to the operational environment of dsp system be configured, in system correlated variables initialization, each initialization of interrupting, judge whether opens interrupters subprogram etc., then enter and receive and send in the circulation of data, wait for the generation of interrupt event simultaneously.When interrupting being unlocked, temporarily stop major cycle, enter into corresponding interrupt service subroutine and carry out various computings and configuration pwm control signal.After having interrupted, return to major cycle, continue to wait for the generation of next time interrupting.Main program flow chart as shown in figure 13.
The main detection of grid frequency of capture interrupt subprogram, complete digital phase-locked loop, zero cross detection circuit is opened the capture interrupt subprogram by the zero crossing that detects phase voltage signal, when the capture interrupt subprogram is unlocked, the value that reads current counter starts timer T1 in disconnected subprogram simultaneously hereinto, and by preset sine table pointer zero clearing.Capture interrupt as shown in figure 14.
The all control algolithms of three-phase four-arm SVG system all complete in the A/D interruption subroutine, comprising sampled voltage with current signal, zero-sequence current, separate, idle instruction current extraction, mean filter, 3D-SVPWM algorithm realize etc.Be the flow chart of A/D interruption subroutine as shown in figure 15, because the switching frequency of system is made as 18kHz, so the time of carrying out the A/D interruption subroutine can not surpass 55
, otherwise also do not execute last interruption subroutine, and just entered into next time and interrupted, can cause system disorders.
Error protection interruption subroutine flow chart as shown in figure 16.When over-current phenomenon avoidance appears in system, can in time fault-signal be fed back to core controller DSP, block all pulse signals by current foldback circuit and carry out the protection system hardware circuit.
Figure 17 is the 3D-SVPWM algorithm flow chart.
For verification system reactive power compensation effect, Figure 18 and Figure 19 are power network compensation A phase voltage, current waveform and compensation before A phase voltage current waveforms afterwards, and as can be seen from the figure, before compensation, electric current obviously lags behind voltage, after compensation, and electric current and voltage same-phase.Figure 21 and Figure 22 are before repaying and the rear three-phase current waveform of compensation, obviously find out, satisfactory for the unbalanced load compensation effect.Figure 23 and Figure 24 are current in middle wire waveforms before and after compensation, and compensation antemedial line electric current is very large, and compensation postmedial line electric current is close to zero.
Claims (2)
1. a static reacance generator SVG who suppresses unbalanced load, its composition comprises: three-phase four-leg inverter, it is characterized in that: described three-phase four-leg inverter is connected with three-phase alternating-current supply, described three-phase four-leg inverter is connected with isolated drive circuit, described isolated drive circuit is connected with the DSP2812 chip, described DSP2812 chip is connected with voltage Hall module, described DSP2812 chip is connected with the current Hall module, described current Hall module is connected with described three-phase alternating-current supply, described three-phase alternating-current supply is connected with load, described three-phase alternating-current supply is connected with the voltage zero-cross detection module.
2. according to the static reacance generator SVG of the described inhibition unbalanced load of claim 1, it is characterized in that: a phase line of described three-phase alternating-current supply is connected by inductance with the brachium pontis A of described three-phase four-leg inverter, the b phase line of described three-phase alternating-current supply is connected by inductance with the brachium pontis B of described three-phase four-leg inverter, the c phase line of described three-phase alternating-current supply is connected by inductance with the brachium pontis C of described three-phase four-leg inverter, the center line of described three-phase alternating-current supply is connected with the brachium pontis D of described three-phase four-leg inverter, described a phase line is connected with described voltage zero-cross detection module, described current Hall module respectively with described a phase line, described b phase line, described c phase line connects.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103475004A (en) * | 2013-07-29 | 2013-12-25 | 哈尔滨理工大学 | Unbalanced-load-inhibiting SVG and control method |
| CN104181390A (en) * | 2014-08-18 | 2014-12-03 | 信元瑞电气有限公司 | Harmonic detection method based on zero-sequence current separation of three-phase four-wire system |
| CN105958492A (en) * | 2016-05-26 | 2016-09-21 | 国网宁夏电力公司固原供电公司 | Active electric power reactive compensation filter |
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2013
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103475004A (en) * | 2013-07-29 | 2013-12-25 | 哈尔滨理工大学 | Unbalanced-load-inhibiting SVG and control method |
| CN103475004B (en) * | 2013-07-29 | 2016-01-20 | 哈尔滨理工大学 | Suppress static reacance generator SVG and the control method of unbalanced load |
| CN104181390A (en) * | 2014-08-18 | 2014-12-03 | 信元瑞电气有限公司 | Harmonic detection method based on zero-sequence current separation of three-phase four-wire system |
| CN105958492A (en) * | 2016-05-26 | 2016-09-21 | 国网宁夏电力公司固原供电公司 | Active electric power reactive compensation filter |
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