CN103715704B - A kind of micro-electrical network common bus Voltage unbalance inhibition method - Google Patents

A kind of micro-electrical network common bus Voltage unbalance inhibition method Download PDF

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CN103715704B
CN103715704B CN201310722247.XA CN201310722247A CN103715704B CN 103715704 B CN103715704 B CN 103715704B CN 201310722247 A CN201310722247 A CN 201310722247A CN 103715704 B CN103715704 B CN 103715704B
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electrical network
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CN103715704A (en
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李永丽
张玮亚
孙广宇
靳伟
李小叶
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Tianjin University
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
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Abstract

The invention belongs to distributed power source control technology field in micro-grid system, relate to a kind of micro-electrical network common bus Voltage unbalance inhibition method, the method is carried out direct compensation to micro-grid system PCC Nodes bus negative sequence voltage, each distributed power source in micro-electrical network can be from the variation of the micro-electrical network PCC of dynamic response Nodes busbar voltage degree of unbalancedness, self adaptation is adjusted negative sequence voltage compensating controller (UVC), make each distributed power source idle according to its specified negative phase-sequence reactive capability output negative phase-sequence, maintain the balance of voltage degree of PCC Nodes bus. The present invention can make distributed power source in parallel in micro-electrical network have the function that suppresses micro-unbalanced source voltage.

Description

A kind of micro-electrical network common bus Voltage unbalance inhibition method
Technical field
The invention belongs to distributed power source control technology field in micro-grid system, relate to a kind of common bus Voltage unbalance inhibition method based on the parallel connection of many distributed power sources.
Background technology
Being widely used of grid-connected power generation system, makes based on multiple distributed power source, and the micro-grid system of load and energy storage device becomes the elementary cell of intelligent grid. Micro-grid system is generally low-pressure system, and in low-pressure system, single-phase load is extensively to exist, and has caused the asymmetric of three-phase inverter three-phase output voltage, thereby has caused larger energy loss, affects the stability of micro-grid system. Therefore, must take measures to be suppressed, ensure that distributed power source keeps the relative equilibrium of output voltage under unbalanced load.
IEEE and IEC have all made clear and definite regulation to definition, the maximum permissible value etc. of Voltage unbalance degree[1]. Regulation in standard GB/T/T15543-2008 " quality of power supply imbalance of three-phase voltage " that State Bureau of Technical Supervision of China promulgates, power system points of common connection (PointofCommonCoupling, PCC) normal voltage degree of unbalancedness permissible value is 2%, must not exceed 4% in short-term[2]. Therefore, micro-unbalanced source voltage compensation is of crucial importance.
The micro-unbalanced power supply voltage compensation of existing low pressure mainly contains two kinds of modes, and one is by series connection electric energy regulator, injects negative sequence voltage realize to circuit; Another is to adopt electric energy regulator in parallel, realizes by injecting negative-sequence current to circuit. The former applies lessly because cost is high and affect line parameter circuit value, and the latter's its negative-sequence current that is input to system in the time that serious imbalance appears in circuit will increase fast, can exceed the output limit of electric energy regulator seriously time, cause the accident. Moreover, these two kinds common imbalance compensation devices only drop in the time that Voltage unbalance occurs, and are inoperative in the time that system is normally moved, and utilization rate of equipment and installations is low, and economic benefit is poor.
Distributed power sources a large amount of in micro-electrical network are by three-phase grid-connected inverter connecting system, structure and the power quality adjusting device of its inverter are similar, and therefore utilizing distributed power source in micro-electrical network to realize that Voltage unbalance suppresses is that a kind of cost-effective quality of voltage improves scheme.
Bibliography
PillayP,ManyageM.Definitionsofvoltageunbalance[J].IEEEPowerEngineeringReview,2001,21(5):50-51.
CNS GB/T15543-2008: quality of power supply imbalance of three-phase voltage [S]. Beijing: China Standards Press, 2008.
Woods the new year, Duan Shanxu, Kang Yong, Chen Jian. the no control interconnection parallel UPS modeling based on droop characteristic control and stability analysis [J]. Proceedings of the CSEE, 2004,24 (2), 34-39.
Bao Wei, Hu Xuehao, Li Guanghui, Bao Weiyu. the improvement droop control [J] based on virtual impedance in the micro-electrical network of self. protecting electrical power system and control, 2013,41 (16), 7-13.
WangX,BlaabjergF,ChenZ.SynthesisofVariableHarmonicImpedanceinInverter-InterfacedDistributedGenerationUnitforHarmonicDampingThroughoutaDistributionNetwork[J].IndustryApplications,IEEETransactionson,2012,48(4),1407-1417.
Summary of the invention
The object of the invention is to overcome the above-mentioned deficiency of prior art, provide a kind of and utilize the distributed power source in micro-electrical network to realize Voltage unbalance inhibition, is that a kind of cost-effective quality of voltage improves scheme. Technical scheme of the present invention is as follows:
A kind of micro-electrical network common bus Voltage unbalance inhibition method, it is characterized in that, the method is carried out direct compensation to micro-grid system PCC Nodes bus negative sequence voltage, each distributed power source in micro-electrical network can be from the variation of the micro-electrical network PCC of dynamic response Nodes busbar voltage degree of unbalancedness, self adaptation is adjusted negative sequence voltage compensating controller (UVC), make each distributed power source idle according to its specified negative phase-sequence reactive capability output negative phase-sequence, the balance of voltage degree that maintains PCC Nodes bus, comprises the following steps:
1) step 1, detects the positive sequence voltage of micro-electrical network PCC Nodes bus in real timeAnd negative sequence voltageCalculate the real-time voltage degree of unbalancedness coefficient of micro-electrical network PCC Nodes bus
2) step 2, detects i distributed power source DG in micro-electrical network in real timeiNegative phase-sequence output idle
3) step 3, works as VUBpccWhile being greater than certain default percentage, drop into negative sequence voltage compensating controller (UVC): establishFor the rated voltage degree of unbalancedness coefficient of micro-electrical network points of common connection (PCC); niFor DGiThe idle distribution coefficient of negative phase-sequence; keFor Voltage unbalance degree error proportionality coefficient; kP,kIFor proportionality coefficient and integral coefficient that PI controls, DGiThe negative sequence voltage penalty coefficient of UVC:
VCR i = ( k P + k I s ) Δ VCR i ,
Wherein, Δ VCR i = k e ( VUB pcc - VUB pcc * ) - n i Q i - ;
4) step 4, by VCRiWith DGiThe negative sequence voltage of output multiplies each other and obtains DGiThe reference value of negative sequence voltage compensation;
5) step 5, obtains DGiThe reference value of negative sequence voltage compensation after, coordinate its positive sequence meritorious/frequency and REACTIVE POWER/VOLTAGE droop control, virtual impedance control, synthetic DGiThe reference voltage of control system, through the laggard horizontal pulse width modulated of electric current and voltage dicyclo control.
The present invention is by changing the control system of the distributed power source accessing in micro-electrical network, make distributed power source in parallel in micro-electrical network there is the function that suppresses micro-unbalanced source voltage, each distributed power source is by transmission line parallel connection separately, in the time carrying out the uneven inhibitory control of PCC Nodes busbar voltage between each distributed power source without signal transmssion line. Two independent targets of controlling have been realized: (1) has guaranteed the quality of voltage of micro-electrical network PCC Nodes bus simultaneously; (2) distributed power source in parallel is idle according to the negative phase-sequence of the specified negative sequence compensation capability distribution output of self. The method is not only applicable to the micro-grid system under the mode of being incorporated into the power networks, also be applicable to the micro-grid system of independent operating, strengthen the control ability of distributed power source to micro-grid voltage quality, improved the quality of voltage of micro-electrical network, realized economy and the stable operation of micro-electrical network.
Brief description of the drawings
Fig. 1 is the micro-grid system schematic diagram that contains multiple distributed power sources;
Fig. 2 is primary circuit structure and the control system structure of a distributed power source;
Fig. 3 is PSCAD simulation model schematic diagram;
Fig. 4 is PCC Nodes busbar voltage degree of unbalancedness change curve;
Fig. 5 is two idle curves of distributed power source output negative phase-sequence;
Fig. 6 is PCC voltage curve before negative sequence voltage compensating controller drops into;
Fig. 7 is PCC voltage curve after negative sequence voltage compensating controller drops into.
Detailed description of the invention
Below in conjunction with drawings and Examples, the present invention will be described.
Many distributed power sources of one embodiment of the invention parallel system comprises that several distributed power sources in parallel are connected on same micro-electrical network bus by PCC, and busbar voltage is 400V, as shown in Figure 1. Distributed power source comprises the micro-source of direct current, three-phase full-bridge inverter, LC filter circuit and control system. As shown in Figure 2, the control strategy of every distributed power source comprises positive sequence meritorious/frequency and REACTIVE POWER/VOLTAGE droop control, virtual impedance control and Voltage unbalance inhibitory control. Gain merit/frequency of positive sequence and REACTIVE POWER/VOLTAGE droop control are guaranteed output voltage level and the power level of each distributed power source; Virtual impedance control ensures the control effect of gain merit/frequency of positive sequence and REACTIVE POWER/VOLTAGE droop control by additional impedance in distributed electrical source control system; Voltage unbalance inhibitory control detects the Voltage unbalance degree VUB at PCC place in real timepcc, work as VUBpcc>=2% time, start, the Voltage unbalance degree that each distributed power source maintains PCC place by quick adjustment maintains setting level.
1. the Voltage unbalance inhibition method of the many distributed power sources parallel connection in micro-electrical network, comprises the following steps:
(1) as shown in Figure 2, each distributed power source detects the positive sequence voltage of micro-electrical network PCC Nodes bus in real timeAnd negative sequence voltageForm the real-time voltage degree of unbalancedness constant of micro-electrical network PCC Nodes bus
1) the control system collection of distributed power source outlet voltage vCabc=[vCavCbvCc]TWith outlet current iCabc=[iCaiCbiCc]T. According to symmetrical component method, in three-phase circuit, any asymmetric three-phase voltage or electric current all can resolve into by symmetrical component method the component of three groups of three-phase symmetricals, i.e. positive sequence, negative phase-sequence and zero-sequence component. In phase three-wire three circuit, owing to there is no zero sequence path, therefore do not have zero-sequence current, and residual voltage also can be ignored on the impact of micro-grid system. From instantaneous symmetrical component method, instantaneous voltage positive-sequence componentAnd negative sequence componentCan be expressed as,
v Cabc + = [ v Ca + v Cb + v Cc + ] T = T + [ v Ca v Cb v Cc ] T v Cabc - = [ v Ca - v Cb - v Cc - ] T = T - [ v Ca v Cb v Cc ] T ,
Transient current positive-sequence componentAnd negative sequence componentCan be expressed as,
i Cabc + = [ i Ca + i Cb + i Cc + ] T = T + [ i Ca i Cb i Cc ] T i Cabc - = [ i Ca - i Cb - i Cc - ] T = T - [ i Ca i Cb i Cc ] T .
Wherein T + = 1 3 1 a a 2 a 2 1 a a a 2 1 , T - = 1 3 1 a 2 a a 1 a 2 a 2 a 1 , And a = e j 2 3 π .
2) by abc → α β conversion, this output voltage and output current are converted into vCαβAnd iCαβ
v Cαβ = [ v Cα v Cβ ] T = T abc → αβ [ v Ca v Cb v Cc ] T i Cαβ = [ i Cα i Cβ ] T = T abc → αβ [ i Ca i Cb i Cc ] T , Wherein T abc → αβ = 2 3 1 - 1 / 2 - 1 / 2 0 3 / 2 3 / 2 .
3) utilize vCαβAnd iCαβCalculate respectively fundamental positive sequence output voltageFirst-harmonic negative phase-sequence output voltageFundamental positive sequence output currentFirst-harmonic negative phase-sequence output currentWherein,
v Cαβ + = [ v Cα + v Cβ + ] T = T abc → αβ v Cabc + = T abc → αβ T + v Cabc = T abc → αβ T + T abc → αβ T v Cαβ v Cαβ - = [ v Cα - v Cβ - ] T = T abc → αβ v Cabc - = T abc → αβ T - v Cabc = T abc → αβ T - T abc → αβ T v Cαβ ,
i Cαβ + = [ i Cα + i Cβ + ] T = T abc → αβ i Cabc + = T abc → αβ T + i Cabc = T abc → αβ T + T abc → αβ T i Cαβ i Cαβ - = [ i Cα - i Cβ - ] T = T abc → αβ i Cabc - = T abc → αβ T - i Cabc = T abc → αβ T - T abc → αβ T i Cαβ .
4) positive sequence voltage of PCC Nodes bus V pcc + = ( v Cα + ) 2 + ( v Cβ + ) 2 , negative sequence voltage V pcc - = ( v Cα - ) 2 + ( v Cβ - ) 2 . The real-time voltage degree of unbalancedness coefficient of micro-electrical network PCC Nodes bus
(2) detect in real time i distributed power source DG in micro-electrical networkiNegative phase-sequence output idle
Q i - = v Cα - i Cβ - - v Cβ - i Cα - .
(3) work as VUBpcc>=2% time, drop into UVC. IfFor the rated voltage degree of unbalancedness coefficient of micro-electrical network PCC Nodes bus; niFor DGiThe idle distribution coefficient of negative phase-sequence; keFor Voltage unbalance degree error proportionality coefficient; kP,kIFor proportionality coefficient and the integral coefficient of PI control. DGiThe negative sequence voltage penalty coefficient of UVC:
VCR i = ( k P + k I s ) Δ VCR i , Wherein Δ VCR i = k e ( VUB pcc - VUB pcc * ) - n i Q i - .
In the time that system enters stable state,Due to the VUB of each DGpccWithCorresponding same PCC node, and keFor fixed constant, therefore(subscript i, j represents respectively two distributed power source DG different in micro-electrical networkiAnd DGj), according to DGiSpecified negative phase-sequence reactive capability n is seti, any two different distributed power sources will be according to the proportional output negative phase-sequence of specified negative phase-sequence reactive capability is idle separately.
(4) by the VCR calculating in step (3)iWith DGiThe negative sequence voltage of output multiply each other obtain negative sequence voltage compensation reference value (by VCRiWith DGiThe negative sequence voltage of output multiplies each other and ensures DGiThe reference value of negative sequence voltage compensation consistent with the phase place of the actual negative sequence voltage of micro-grid system PCC Nodes bus):
v Cαβ - * = VCR i · v Cαβ - .
(5) obtain after the reference value of negative sequence voltage compensation, coordinate positive sequence to gain merit/frequency and REACTIVE POWER/VOLTAGE droop control [3], virtual impedance control [4], the reference voltage of synthetic inverter, through interior loop voltag double current loop modulation[5]Laggard horizontal pulse width modulated.
1) positive sequence of gain merit/frequency of positive sequence and REACTIVE POWER/VOLTAGE droop control is meritorious with the idle method for solving of positive sequence is:
P i + = v Cα + i Cα + + v Cβ + i Cβ + Q i + = v Cα + i Cβ + - v Cβ + i Cα + .
Obtained the meritorious and positive sequence of positive sequence idle after, the control method of meritorious/frequency and REACTIVE POWER/VOLTAGE droop control is:
ω i * = ω 0 - m pi P i + E i * = E 0 - n qi Q i + ,
Wherein,For reference value and the amplitude reference value of DGi output positive sequence voltage; ω0And E0For DGiRated frequency and rated voltage amplitude; mpiAnd nqiBe respectively meritorious and idle sagging coefficient. Obtain DGiThe reference value of output positive sequence voltageWith amplitude reference valueAfter, obtain DG by abc → α β conversioniThe reference value of output positive sequence voltage
2) virtual impedance control ensures the control effect of positive sequence voltage, frequency droop control by additional impedance in distributed electrical source control system, and its control method is:
v Cfα = i Cα R vi - i Cβ ω i * L fi v Cfβ = i Cβ R vi + i Cα ω i * L fi ,
Wherein, vCfαβ=[vCfαvCfβ]TFor the output reference value of virtual impedance control, RviAnd LfiFor the equivalent output resistance and the outputting inductance value that fictionalize in controlling unit.
3) positive sequence of comprehensive every distributed power source meritorious/frequency and REACTIVE POWER/VOLTAGE droop control, virtual impedance control and Voltage unbalance inhibitory control, obtain the input reference of outer voltage
U αβ * = v Cαβ + * - v Cfαβ - v Cαβ - * .
4) control of electric current and voltage dicyclo has adopted ratio resonant controller (PR),And vCαβBy PR controller, obtain the current reference value under static coordinateDeduct iLαβ, through PR controller, obtain the PWM control inputs signal U under rest framePWMαβ;UPWMαβThrough α β → abc, conversion obtains the PWM control inputs signal U under three phase coordinate systemsPWMabc, input value PWM generation unit carries out pulse width modulation. The transfer function that PR controls is:
G ( s ) = k PRp + 2 k PRr ω c s s 2 + 2 ω c s + ( ω i * ) 2 s ,
Wherein, kPRpAnd kPRrRespectively proportionality coefficient and the resonance gain that PR controls, ωcFor cut-off frequency.
2. in order to verify the correctness of institute of the present invention extracting method, with reference to Fig. 3, on PSCAD emulation platform, build the micro-grid system that contains two distributed power sources, system voltage is 400V, load is one and is connected on the 10 Ω resistance between mutually of A phase and B on PCC bus, and degree of unbalancedness is 2.5%. The systematic parameter of two distributed power sources is identical, controls parameter and loading condition as shown in table 1. In the time of t=0.5 second, add negative sequence voltage compensating controller. Carrier frequency is made as 12.8kHz. As seen from the figure, after adding negative sequence voltage compensating controller, Voltage unbalance degree is reduced to the idle ratio of negative phase-sequence of 1.6%, two distributed power source outputContrary with the ratio of the idle distribution coefficient of negative phase-sequence, prove the validity of institute of the present invention extracting method. Table 1 control system parameter:

Claims (2)

1. a micro-electrical network common bus Voltage unbalance inhibition method, is characterized in that, the method is to micro-grid system points of common connection (PCC)Place's bus negative sequence voltage carries out direct compensation, and each distributed power source in micro-electrical network can be from the micro-electrical network points of common connection of dynamic response (PCC)The variation of place's busbar voltage degree of unbalancedness, self adaptation is adjusted negative sequence voltage compensating controller (UVC), makes each distributed power source according to its volumeDetermine negative phase-sequence reactive capability output negative phase-sequence idle, maintain points of common connection (PCC) and locate the balance of voltage degree of bus, comprise the following steps:
1) step 1, detects micro-electrical network points of common connection (PCC) and locates the positive sequence voltage of bus in real timeAnd negative sequence voltageCalculate micro-Electrical network points of common connection (PCC) is located the real-time voltage degree of unbalancedness coefficient of bus
2) step 2, detects i distributed power source DG in micro-electrical network in real timeiNegative phase-sequence output idle
3) step 3, works as VUBpccWhile being greater than certain default percentage, drop into negative sequence voltage compensating controller (UVC): establishForMicro-electrical network points of common connection (PCC) is located the rated voltage degree of unbalancedness coefficient of bus; niFor DGiThe idle distribution coefficient of negative phase-sequence; keFor electricityPress degree of unbalancedness error proportionality coefficient; kP,kIFor proportionality coefficient and integral coefficient that PI controls, DGiNegative sequence voltage compensating controller(UVC) negative sequence voltage penalty coefficient:
VCR i = ( k P + k I s ) ΔVCR i ,
Wherein, ΔVCR i = k e ( VUB p c c - VUB p c c * ) - n i Q i - ;
4) step 4, by VCRiWith DGiThe negative sequence voltage of output multiplies each other and obtains DGiThe reference value of negative sequence voltage compensation;
5) step 5, obtains DGiThe reference value of negative sequence voltage compensation after, coordinate its positive sequence meritorious/frequency and REACTIVE POWER/VOLTAGE droop control,Virtual impedance control, synthetic DGiThe reference voltage of control system, through the laggard horizontal pulse width modulated of electric current and voltage dicyclo control.
2. micro-electrical network common bus Voltage unbalance inhibition method according to claim 1, is characterized in that, works as VUBpcc>=2% time, drop intoNegative sequence voltage compensating controller (UVC).
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CN104836235B (en) * 2015-06-02 2017-12-01 国网山东省电力公司聊城供电公司 A kind of micro-capacitance sensor multi-inverter parallel progress control method using generatrix voltage compensation
CN104836258B (en) * 2015-06-02 2017-01-25 国家电网公司 Microgrid control method having functions of voltage unbalance compensation and harmonic suppression
CN105226683B (en) * 2015-11-05 2017-11-10 武汉理工大学 The compensation method of micro-capacitance sensor three unbalanced power compensator inverter device
CN106130026B (en) * 2016-05-15 2018-10-09 华南理工大学 A kind of micro-capacitance sensor group's voltage control method of double-layer structure
CN107508298B (en) * 2017-09-28 2020-03-17 合肥工业大学 Hierarchical optimization control method for unbalanced voltage of micro-grid
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Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103368191A (en) * 2013-07-22 2013-10-23 湖南大学 Micro-grid multi-inverter parallel voltage unbalanced compensation method

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1396963B1 (en) * 2009-10-20 2012-12-20 Meta System Spa SYSTEM AND METHOD FOR THE COMPENSATION OF THE UNBALANCE OF INPUT VOLTAGES IN THE MULTILEVEL INVERTER

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103368191A (en) * 2013-07-22 2013-10-23 湖南大学 Micro-grid multi-inverter parallel voltage unbalanced compensation method

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
An Islanding Microgrid Power Sharing Approach Using Enhanced Virtual Impedance Control Scheme;Jinwei He等;《IEEE TRANSACTIONS ON POWER ELECTRONICS》;20131130;第28卷(第11期);第5272-5281页 *
基于改进下垂控制的分布式电源并联运行技术;谢玲玲,等;《电网技术》;20130430;第37卷(第4期);第992-997页 *

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