CN203338344U - On-line debugging circuit for single-chip microcomputer system with external watchdog - Google Patents
On-line debugging circuit for single-chip microcomputer system with external watchdog Download PDFInfo
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- CN203338344U CN203338344U CN201320356451XU CN201320356451U CN203338344U CN 203338344 U CN203338344 U CN 203338344U CN 201320356451X U CN201320356451X U CN 201320356451XU CN 201320356451 U CN201320356451 U CN 201320356451U CN 203338344 U CN203338344 U CN 203338344U
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- chip microcomputer
- circuit
- reset signal
- debugger
- watchdog
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Abstract
The utility model relates to an on-line debugging circuit for a single-chip microcomputer system with an external watchdog, and belongs to the technical field of single-chip microcomputer control. The debugging circuit comprises a debugger, a drive circuit and a single-chip microcomputer with the external watchdog, wherein the reset signal output end of the debugger is connected with the reset signal end of the single-chip microcomputer through the drive circuit. According to the on-line debugging circuit, a reset signal of the BDM debugger is in connection with a reset signal of the single-chip microcomputer system with the external watchdog after being enhanced through the drive circuit, when a program needs to be debugged or downloaded, the reset signal of the debugger is in connection with the reset signal of the single-chip microcomputer system after being enhanced through the drive circuit so that the Reset signal state of the reset end of the single-chip microcomputer can be directly controlled, therefore, the single-chip microcomputer can conduct normal downloading or debugging along with the watchdog without being influenced by a reset signal of the external watchdog, and the on-line debugging function of the single-chip microcomputer with the watchdog can be achieved.
Description
Technical field
The utility model relates to a kind of circuit of the on-line debugging with the outer watchdog Single Chip Microcomputer (SCM) system, belongs to the single-chip microcomputer control technology field.
Background technology
Single-chip microcomputer is widely used in electronic product, for monitoring Single Chip Microcomputer (SCM) program running status need to increase watchdog circuit.When producing or debug, be difficult to produce the feeding-dog signal that house dog needs, therefore need single-chip microcomputer and house dog to disconnect, generally realize by the mode that increases switch, to increase cost and take board area but increase switch, and also needing manual reversion to be not suitable for batch production.
The utility model content
The purpose of this utility model is to provide a kind of circuit of the on-line debugging with the outer watchdog Single Chip Microcomputer (SCM) system, to solve at present with the single-chip microcomputer of house dog, is producing or need to increase the problem that switch realizes that single-chip microcomputer and house dog disconnect during debugging.
The utility model provides a kind of circuit of the on-line debugging with the outer watchdog Single Chip Microcomputer (SCM) system for solving the problems of the technologies described above, this debug circuit comprises debugger, driving circuit and, with the Single Chip Microcomputer (SCM) system of watchdog circuit, the reset signal output terminal of debugger is connected with the reset signal end of single-chip microcomputer by driving circuit.
Described driving circuit is AND circuit, and two input ends of AND circuit all connect the reset signal output terminal of described debugger.
The reset output terminal of described watchdog circuit is connected with the reset signal end of single-chip microcomputer through resistance.
Described debug circuit also comprises the connector that connects debugger and single-chip microcomputer, be provided with the connector corresponding with each port of debugger on this connector, wherein the reset signal output terminal of debugger is connected with corresponding connector on connector by driving circuit, and this connector is for being connected with the corresponding port of single-chip microcomputer.
The beneficial effects of the utility model are: the utility model is connected to the reset signal end with the outer watchdog Single Chip Microcomputer (SCM) system by the reset signal by the BDM debugger after overdrive circuit strengthens, when needs are debugged or are downloaded, the debugger reset signal is connected with Single Chip Microcomputer (SCM) system after gate circuit strengthens driving, direct control single chip computer reset terminal Reset state, make single-chip microcomputer not be subject to the watchdog reset effect of signals, can be with house dog download normally or debug, realize the on-line debugging function with the house dog Single Chip Microcomputer (SCM) system.
The accompanying drawing explanation
Fig. 1 is the on-line debugging circuit diagram of the utility model band outer watchdog Single Chip Microcomputer (SCM) system;
Fig. 2 is the reset circuit figure with the outer watchdog Single Chip Microcomputer (SCM) system.
Embodiment
Below in conjunction with accompanying drawing, embodiment of the present utility model is further described.
On-line debugging with outer watchdog Single Chip Microcomputer (SCM) system circuit of the present utility model comprises debugger, driving circuit and with the Single Chip Microcomputer (SCM) system of outer watchdog circuit, the reset signal output terminal of debugger is connected with the reset signal end of single-chip microcomputer by driving circuit, the driving circuit here is AND circuit, two input ends of AND circuit all connect the reset signal output terminal of described debugger, and the reset output terminal of watchdog circuit is connected with the reset signal end of single-chip microcomputer through resistance.Between debugger and single-chip microcomputer, by connector, be connected, be provided with the connector corresponding with each port of debugger on this connector, wherein the reset signal output terminal of debugger is connected with corresponding connector on connector by driving circuit, and this connector is for being connected with the corresponding port of single-chip microcomputer.
In the present embodiment, we choose the S12 series monolithic, as shown in Figure 2, Single Chip Microcomputer (SCM) system with outer watchdog comprises single-chip microcomputer U2 and house dog U1, the reset signal that Reset is single-chip microcomputer, Bkgd is monolithic pusher side debugging signal, Vcc and Gnd are Power of SCM System and ground, the reset output terminal of house dog U1 is connected with the reset signal end of single-chip microcomputer U2 through resistance R 2, node between the reset output terminal of house dog U1 and resistance R 2 is linked into the power Vcc end by resistance R 1, , when normal operating conditions, watchdog chip can be through this resistance single-chip microcomputer U2 that resets, the reset signal end Reset of single-chip microcomputer, monolithic pusher side debugging signal end Bkgd, Power of SCM System end Vcc and ground Gnd link respectively the corresponding port of machine P2.Debugger is connected as shown in Figure 1 with driving circuit, comprise the BDM debugger, with door U3 and connector P1, Rst0, Bkgd0, Vcc0 and Gnd0 are respectively the reset signal end of BDM debugger, debugger side debugging signal end, power end and earth terminal, the reset signal end of BDM debugger through with door U3 after be connected to No. 2 connectors of connector P1, strengthen its driving force, debugger side debugging signal end, power end and earth terminal be No. 1 connector of connecting connector respectively, No. 3 connectors and 4 good connectors, each connector of connector P1 connects for each corresponding connector of the connector P2 with single-chip microcomputer U2 side.
The on-line debugging circuit working principle of the utility model band outer watchdog Single Chip Microcomputer (SCM) system is as follows: the output that resets of house dog U1 is connected with Single Chip Microcomputer (SCM) system through resistance R 2, at the normal operating conditions watchdog chip, can pass through this resistance single-chip microcomputer U2 that resets; When needs are debugged or are downloaded, P1 is docked with P2, BDM debugger reset signal Rst0 is through being connected with the reset signal end of single-chip microcomputer with after door enhancing driving, direct control single chip computer reset terminal Reset signal, make single-chip microcomputer not be subject to the watchdog reset effect of signals, can be with house dog download normally or debug.Solved and disconnected single-chip microcomputer and be connected with house dog and increase cost and take the problem of board area producing or need to increase switch during debugging.
The utility model improves the connected mode of watchdog reset circuit, and strengthens the driving force of BDM reset signal, realizes with the Single Chip Microcomputer (SCM) system on-line debugging of outer watchdog, the function downloaded.This circuit is applicable to Single Chip Microcomputer (SCM) system on-line debugging and the batch production with outer watchdog, raises the efficiency and reduces production costs.
Claims (4)
1. with the Single Chip Microcomputer (SCM) system on-line debugging circuit of outer watchdog, it is characterized in that: this debug circuit comprises debugger, driving circuit and, with the Single Chip Microcomputer (SCM) system of outer watchdog, the reset signal output terminal of debugger is connected with the reset signal end of single-chip microcomputer by driving circuit.
2. the circuit of the on-line debugging with the outer watchdog Single Chip Microcomputer (SCM) system according to claim 1, it is characterized in that: described driving circuit is AND circuit, two input ends of AND circuit all connect the reset signal output terminal of described debugger.
3. the circuit of the on-line debugging with the outer watchdog Single Chip Microcomputer (SCM) system according to claim 1 and 2, it is characterized in that: the reset output terminal of described watchdog circuit is connected with the reset signal end of single-chip microcomputer through resistance.
4. the circuit of the on-line debugging with the outer watchdog Single Chip Microcomputer (SCM) system according to claim 3, it is characterized in that: described debug circuit also comprises the connector that connects debugger and single-chip microcomputer, be provided with the connector corresponding with each port of debugger on this connector, wherein the reset signal output terminal of debugger is connected with corresponding connector on connector by driving circuit, and this connector is for being connected with the corresponding port of single-chip microcomputer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320356451XU CN203338344U (en) | 2013-06-20 | 2013-06-20 | On-line debugging circuit for single-chip microcomputer system with external watchdog |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320356451XU CN203338344U (en) | 2013-06-20 | 2013-06-20 | On-line debugging circuit for single-chip microcomputer system with external watchdog |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203338344U true CN203338344U (en) | 2013-12-11 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201320356451XU Expired - Fee Related CN203338344U (en) | 2013-06-20 | 2013-06-20 | On-line debugging circuit for single-chip microcomputer system with external watchdog |
Country Status (1)
| Country | Link |
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| CN (1) | CN203338344U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103324544A (en) * | 2013-06-20 | 2013-09-25 | 郑州宇通客车股份有限公司 | Online debugging circuit for single chip microcomputer system with external watchdog |
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2013
- 2013-06-20 CN CN201320356451XU patent/CN203338344U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103324544A (en) * | 2013-06-20 | 2013-09-25 | 郑州宇通客车股份有限公司 | Online debugging circuit for single chip microcomputer system with external watchdog |
| CN103324544B (en) * | 2013-06-20 | 2017-02-15 | 郑州宇通客车股份有限公司 | Online debugging circuit for single chip microcomputer system with external watchdog |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20131211 Termination date: 20200620 |