CN203312325U - Coating crystalline-silicon battery piece with resistance to PID effect - Google Patents
Coating crystalline-silicon battery piece with resistance to PID effect Download PDFInfo
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- CN203312325U CN203312325U CN201320292810XU CN201320292810U CN203312325U CN 203312325 U CN203312325 U CN 203312325U CN 201320292810X U CN201320292810X U CN 201320292810XU CN 201320292810 U CN201320292810 U CN 201320292810U CN 203312325 U CN203312325 U CN 203312325U
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- film
- battery piece
- deposited
- sinx
- pid effect
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
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Abstract
The utility model relates to a photovoltaic solar battery piece structure, and specifically relates to a coating crystalline-silicon battery piece with the resistance to a PID effect. The battery piece consists of an Si substrate layer, a lower SiNx film which is deposited on the Si substrate layer and has a higher refractive index, an upper SiNx film which is deposited on the lower SiNx film and has a lower refractive index, and an SiO2 film which is deposited on the upper SiNx film. According to the utility model, three coating films SiNx / SiNx / SiO2 which are deposited on the surface of the battery piece are used for replacing a double-layer SiNx film with a conventional structure, thereby eliminating the PID effect effectively and improving conversion efficiency of the crystalline-silicon battery piece.
Description
Technical field
The utility model relates to a kind of photovoltaic solar cell chip architecture, specifically a kind of crystalline silicon battery plate with anti-PID effect plated film.
Background technology
In the crystal silicon solar energy battery production process, PECVD(plasma vapor deposition method) be the method that forms a kind of large-scale industry utilization of antireflective film.General antireflective film mainly comprises: single double-deck SiN
x(silicon nitride) film, SiO
2(silicon dioxide) film, SiO
2/ SiN
xDuplicature etc.SiO
2Have outstanding light transmission features, but due to SiO
2Formation need at high temperature (over 800 ℃) to realize.And polysilicon can be activated when high temperature owing in body, having a large amount of dislocations and impurity defect, cause the cell piece quality to descend.And SiN
x(silicon nitride) film is due to its good passivation effect, and can be by PECVD(plasma gaseous phase deposition method) realize low temperature depositing, thus realized industrialized large-scale promotion.But SiN
x(silicon nitride) film is not good for the absorption of short-wave band sunlight, the formation to a certain extent current crystalline silicon average efficiency improved inhibition.The PID effect is mainly concerned with the useful life of assembly solar cell.So-called PID effect is commonly considered as the Na of battery panel components soda lime glass packaging material the inside
+Ion under extreme conditions as, temperature is 85 ℃, relative humidity is 85%, assembly housing ground connection, and apply reverse 1000V voltage moves to a kind of effect that the cell piece surface causes cell piece to lose efficacy.Existing photovoltaic solar cell sheet is subjected to the PID effects larger, has limited the raising of solar battery sheet efficiency.
Summary of the invention
Technical problem to be solved in the utility model is, a kind of ability that can improve the anti-PID effect of cell piece is provided, and improves the crystalline silicon battery plate of the anti-PID effect of having of battery efficiency plated film.
Crystalline silicon battery plate with anti-PID effect plated film of the present utility model by the Si substrate layer, be deposited on the higher SiN of lower floor of refractive index on the Si substrate layer
xFilm, be deposited on the SiN of lower floor
xThe upper strata SiN that refractive index on film is lower
xFilm, be deposited on upper strata SiN
xSiO on film
2Film forms.
The formation of current known PID effect is mainly because the metal Na ion in soda lime glass in the crystal silicon cell chip module passes the surface that EVA arrives cell piece under damp and hot environment, on the surface of cell piece, form the gathering of metal ion, cause forbidden band to change, thereby cause cell piece to lose efficacy.The utility model passes through at cell piece surface deposition SiNx/SiNx/SiO
2The SiNx duplicature of triple-layer coating replace traditional structural.Due to SiO
2Film is for metal ion Na
+The barrier effect that ion has, prevent that metal ion from arriving battery surface, thereby can effectively eliminate the PID effect.Through the actual proof that detects, cell piece reflectivity of the present utility model declines to a great extent, especially aspect shortwave, can effectively reduce reflection of light, improve the response current of light at short-wave band, improve the crystal silicon cell short circuit current, and then improve the transformation efficiency of crystalline silicon battery plate.
The accompanying drawing explanation
Fig. 1 is cross section structure schematic diagram of the present utility model.
Embodiment
As shown in the figure, this crystalline silicon battery plate with anti-PID effect plated film by Si substrate layer 1, be deposited on the higher SiN of lower floor of refractive index on the Si substrate layer
xFilm 2, be deposited on the SiN of lower floor
xThe upper strata SiN that refractive index on film is lower
xFilm 3, be deposited on upper strata SiN
xSiO on film
2Film 4 forms.
Below with the embodiment that manufactures the utility model cell piece on flat direct method silicon nitride filming equipment, elaborate.Manufacturing process is as follows:
Step B1, pass into N in reactor
2Make silicon chip reach constant temperature, N
2Flow c1 scope 20000 sccm/min; Temperature c2 is 350 ℃ (it is consistent with this step that the following steps temperature all keeps);
Step B2, NH
3Flow c3 is 400 sccm/min, N
2Flow c4 is 20000 sccm/min, SiH
4Flow c5 is 2000 sccm/min, and controlled pressure c6 is 1.3 Torr;
Step B3, open radio-frequency power supply and carry out ground floor SiNx plated film, and radio-frequency power c7 is 8000 W, and time c8 is 21 s;
Step B4, then close radio-frequency power supply, passes into second layer SiNx plated film desired gas, passes into NH
3Flow c9 is 350 sccm/min, N
2Flow c10 is 15000 sccm/min, SiH
4Flow c11 is 1700 sccm/min, and reaching constant voltage c12 is 1.3 Torr;
Step B5, open radio-frequency power supply and carry out second layer SiNx plated film, and radio-frequency power c13 is 8000 W, and time c14 is 32 s;
Step B6, close radio-frequency power supply, and the residual gas in reaction cavity is extracted out, is follow-up silicon dioxide SiO
2Deposition prepare;
Step B7, pass into the silicon dioxide deposited gas, NH
3Flow c15 is 7000 sccm/min, N
2Flow c16 is 10000 sccm/min, SiH
4Flow c17 is 2100 sccm/min, and reaching constant voltage c18 is 1.0 Torr
Step B6, open radio-frequency power supply, and radio-frequency power c19 is 5000 W, and time c19 is 21 s; Carry out silicon dioxide SiO
2Thin film deposition.The final product that obtains.
Claims (1)
1. crystalline silicon battery plate with anti-PID effect plated film is characterized in that: it by the Si substrate layer, be deposited on the SiN of lower floor on the Si substrate layer
xFilm, be deposited on the SiN of lower floor
xUpper strata SiN on film
xFilm, be deposited on upper strata SiN
xSiO on film
2Film forms.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN201320292810XU CN203312325U (en) | 2013-05-27 | 2013-05-27 | Coating crystalline-silicon battery piece with resistance to PID effect |
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---|---|---|---|
CN201320292810XU CN203312325U (en) | 2013-05-27 | 2013-05-27 | Coating crystalline-silicon battery piece with resistance to PID effect |
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CN203312325U true CN203312325U (en) | 2013-11-27 |
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CN201320292810XU Expired - Fee Related CN203312325U (en) | 2013-05-27 | 2013-05-27 | Coating crystalline-silicon battery piece with resistance to PID effect |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103996720A (en) * | 2014-05-20 | 2014-08-20 | 奥特斯维能源(太仓)有限公司 | Crystalline silicon battery surface passive film and manufacturing method thereof |
CN104498908A (en) * | 2014-11-19 | 2015-04-08 | 横店集团东磁股份有限公司 | PECVD coating technology used for preparing assembly crystal silicon solar energy battery |
CN109494262A (en) * | 2018-12-28 | 2019-03-19 | 苏州腾晖光伏技术有限公司 | A kind of crystal silicon solar batteries double-layer reflection reducing coating structure and its deposition method |
-
2013
- 2013-05-27 CN CN201320292810XU patent/CN203312325U/en not_active Expired - Fee Related
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103996720A (en) * | 2014-05-20 | 2014-08-20 | 奥特斯维能源(太仓)有限公司 | Crystalline silicon battery surface passive film and manufacturing method thereof |
CN104498908A (en) * | 2014-11-19 | 2015-04-08 | 横店集团东磁股份有限公司 | PECVD coating technology used for preparing assembly crystal silicon solar energy battery |
CN104498908B (en) * | 2014-11-19 | 2017-03-29 | 横店集团东磁股份有限公司 | It is a kind of to be used to prepare component crystal silicon solar batteries PECVD coating process |
CN109494262A (en) * | 2018-12-28 | 2019-03-19 | 苏州腾晖光伏技术有限公司 | A kind of crystal silicon solar batteries double-layer reflection reducing coating structure and its deposition method |
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20131127 Termination date: 20190527 |