CN203312287U - Integrated semiconductor display panel - Google Patents
Integrated semiconductor display panel Download PDFInfo
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- CN203312287U CN203312287U CN2013200712435U CN201320071243U CN203312287U CN 203312287 U CN203312287 U CN 203312287U CN 2013200712435 U CN2013200712435 U CN 2013200712435U CN 201320071243 U CN201320071243 U CN 201320071243U CN 203312287 U CN203312287 U CN 203312287U
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Abstract
The utility model relates to an integrated semiconductor display panel including a substrate, a first circuit layer, a second circuit layer, a third circuit layer, a first insulating adhesive layer, a second insulating adhesive layer and a plurality of red, green and blue semiconductor crystal plates. The first circuit layer is fixed on the substrate. The first insulating layer bonds the first circuit layer and the second circuit layer together in an insulating way. The second insulating layer bonds the second circuit layer and the third circuit layer together in an insulating way. The red, green and blue semiconductor crystal plates are electrically connected with the first circuit layer, the second circuit layer and the third circuit layer in a one-to-one corresponding way. Through a unique circuit-structure layout, the integrated semiconductor display panel enables each of the red, green and blue semiconductor light-emitting elements to be corresponding to a respective circuit structure and the semiconductor light-emitting elements are each conveniently and rapidly connected electrically to a corresponding circuit structure through adoption of a eutectic technology so that integration of semiconductor display is realized in a limited arrangement space, a display effect of the semiconductor display panel is improved and increasing display demands of the mass of users are met.
Description
Technical field
The utility model relates to semiconductor applications, relates in particular to a kind of integrated semiconductor display panel.
Background technology
The variation of twice directivity has appearred in the demonstration field in recent ten years.Before and after 2000, the cathode ray tube (CRT) industry faces alternative crisis.After that, main flow direction trends towards plasma demonstration (PDP) and tft liquid crystal demonstration (TFT-LCD).By development in more than 10 years, TFT-LCD became demonstration field main flow.Then, along with the progress of TFT-LCD and electroluminescence (EL) technology, active organic light emitting display (AMOLED) also starts industrialization.In addition, the novel Display Techniques such as flexible demonstration (Flexible Display), laser display (Laser Display) continue to bring out.At present, the arguement of the relevant display industries developing direction of a new round starts again.No matter, from TFT-LCD or AMOLED development angle, all can clearly see two large key driving force of semiconductor display industries development: the one, technological progress; The 2nd, the market application.For this reason, the people in the industry has proposed " semiconductor demonstration " this industry and has newly defined, and expectation can produce guiding and help to the development of next step display industries.
For example, the application of semiconductor light-emitting-diode (LED, Light Emitting Diode) has jumbo expansion in this year, and wherein, the market of the tool potentiality of growing up at the soonest is application backlight of LCDs (LCD).Between several years, white light-emitting diode is general gradually along with the application backlight of small display screen, and the color liquid crystal panel in current nearly all mobile phone all provides backlight by light-emitting diode.Recently, white light-emitting diode more start to march toward high-performance more and more the farm labourer do the display backlight application on knee of time.Yet light-emitting diode is entering the large scale display screen, if not smooth on the road of PC display screen and TV applications.This situation is because except more best performance and longer off-the-job, large-scale liquid crystal panel need to be used as this class light-emitting diode of red, green, blue (RGB) and create abundanter Color Range, just can provide than using CCFL better buying inducement backlight.
Yet the prior art that semiconductor shows has various bottlenecks and problem, for example, the integrated problem of semiconductor display panel.With regard to this point, how on the limited area of semiconductor display panel, to integrated relevant means, to settle more intensive semiconductor light-emitting elements by topology layout and circuit arrangement etc., the display effect demand improved constantly to meet the user is this area urgent problem.
The utility model content
The purpose of this utility model is to provide a kind of integrated semiconductor display panel that can overcome above-mentioned defect.
The utility model provides a kind of integrated semiconductor display panel, it is characterized in that comprising: substrate, the first circuit layer, the second circuit layer, the tertiary circuit layer, the first dielectric adhesive layer, the second dielectric adhesive layer, the red wafer of a plurality of semiconductors, the blue wafer of a plurality of semiconductor green wafers and a plurality of semiconductor, wherein: described the first circuit layer is fixed on described substrate, described the first dielectric adhesive layer is combined described the first circuit layer and described second circuit layer insulating sticky, described the second dielectric adhesive layer will be combined in described second circuit layer and described tertiary circuit layer insulating sticky, between the red wafer of described a plurality of semiconductor, described a plurality of semiconductor green wafers and the blue wafer of described a plurality of semiconductor and described the first circuit layer, described second circuit layer and described tertiary circuit layer, has electrical connection one to one.
Preferably, described integrated semiconductor display panel also comprises: the copolar layer, and it is formed on described substrate; The 3rd dielectric adhesive layer, it is combined described copolar layer and described the first circuit layer insulating sticky; Wherein, the red wafer of described a plurality of semiconductor, described a plurality of semiconductor green wafers and the blue wafer of described a plurality of semiconductor are electrically connected to described copolar layer.
Preferably, the red wafer of described a plurality of semiconductor, described a plurality of semiconductor green wafers and the blue wafer of described a plurality of semiconductor are by forming copolar with being electrically connected to of described copolar layer.
Preferably, described copolar layer comprises the first copolar layer and the second copolar layer, described the first copolar layer and described the second copolar layer mutually insulated, the red wafer of described a plurality of semiconductors is by forming copolar, described a plurality of semiconductor green wafers and the blue wafer of described a plurality of semiconductor by with being electrically connected to of the second copolar layer, forming copolar with being electrically connected to of the first copolar layer.
Preferably, described copolar layer by heavy copper repeatedly, repeatedly heavy silver, repeatedly one of mode of turmeric ashbury metal is formed on described substrate.
Preferably, described copolar layer forms three grades of steps in the position be electrically connected to the red wafers of described a plurality of semiconductors, described a plurality of semiconductor green wafers and the blue wafer of described a plurality of semiconductor, described three grades of steps from low to high respectively with described the first circuit layer, described second circuit layer is concordant with described tertiary circuit layer and do not contact.
Preferably, the red wafer of described a plurality of semiconductor, described a plurality of semiconductor green wafers and the blue wafer of described a plurality of semiconductor are by forming respectively copolar with being electrically connected to of corresponding circuits layer.
Preferably, described the first circuit layer, described second circuit layer and described tertiary circuit layer are formed by one or more layers circuit respectively.
Preferably, the synthetic many group wafers of the red wafer of described a plurality of semiconductor, described a plurality of semiconductor green wafers and the blue wafer set of described a plurality of semiconductor, between the center of described many group wafers, be equally spaced, each group wafer comprises the red wafer of a semiconductor, a semiconductor green wafer and the blue wafer of semiconductor.
Preferably, the red wafer of described a plurality of semiconductor, described a plurality of semiconductor green wafers and the blue wafer of described a plurality of semiconductor are semiconductor eutectic wafers, and described semiconductor eutectic wafer forms electrical connection by the eutectic solder technology with corresponding circuit layer and described copolar layer.
The utility model is by adopting unique circuit structure layout, the semiconductor light-emitting elements of redgreenblue is corresponding with circuit structure separately respectively, and adopt the eutectic technology by semiconductor light-emitting elements easily be electrically connected to corresponding circuit structure, in limited arrangement space, realized that semiconductor shows integrated, improve the display effect of semiconductor display panel, met the demonstration demand that users increase.
The accompanying drawing explanation
Fig. 1 is according to the RGB semiconductor wafer of the utility model embodiment schematic diagram of the semiconductor display panel of copolar not;
Fig. 2 is the schematic diagram according to the semiconductor display panel of the RGB semiconductor wafer copolar of the utility model embodiment; And
Fig. 3 is the schematic diagram according to the semiconductor display panel of the bluish-green semiconductor wafer copolar of the utility model embodiment.
Embodiment
Below by drawings and Examples, the technical solution of the utility model is described in further detail.
Fig. 1 is according to the RGB semiconductor wafer of the utility model embodiment schematic diagram of the semiconductor display panel of copolar not.
As shown in Figure 1, according to the semiconductor display panel of the utility model embodiment, comprise: substrate 10; Red wafer circuit layer 15, green wafer circuit layer 17; Blue wafer circuit layer 19; And red wafer circuit layer insulating 16, green wafer circuit layer insulating 18 and blue wafer circuit layer insulating 20; Some semiconductor eutectic wafers, i.e. some DA(directly attached) the red wafer 24 of eutectic, the green wafer 25 of some DA eutectics and the blue wafer 26 of some DA eutectics.
Blue wafer circuit layer insulating 16 is formed on substrate, and blue wafer circuit layer 19 is formed on blue wafer circuit layer insulating 20 then; Next, green wafer circuit layer insulating 18 is formed on blue wafer circuit layer 19, and green wafer circuit layer 17 is formed on green wafer circuit layer insulating 18 then; Then, red wafer circuit layer insulating 16 is formed on green wafer circuit layer 17, and red wafer circuit layer 15 is formed on red wafer circuit layer insulating 16 then.Three-layer insulated layer can be made by the material with adhesive effect, thereby makes three layers of circuit layer, insulating barrier and substrate be closely linked, and between three layers of circuit layer and bottom circuit layer (being blue wafer circuit layer at this) and substrate mutually insulated.
Red, the green and blue wafer of semiconductor eutectic has direct joint DA(directly attached) characteristic, so DA eutectic wafer can complete the electrical combination with the related circuit layer by the eutectic solder technology.For example, can semiconductor eutectic wafer be welded on circuit layer by seamless ultrasonic die bond welding.Particularly, the red wafer of semiconductor eutectic is welded on red wafer circuit layer by eutectic, the green wafer of semiconductor eutectic is welded on green wafer circuit layer by eutectic, the blue wafer of semiconductor is welded on blue wafer circuit layer by eutectic, wherein, the red wafer of semiconductor eutectic is by red wafer circuit layer copolar (red copolar 230), the green wafer of semiconductor eutectic is by green wafer circuit layer copolar (green copolar 231), and the blue wafer of semiconductor eutectic is by blue wafer circuit layer copolar (blue copolar 232).For example, in the situation that semiconductor eutectic wafer adopts eutectic LED, described copolar can be common cathode or common anode.
The synthetic many group wafers of the red wafer of a plurality of semiconductor eutectics, the green wafer of a plurality of semiconductor eutectic and the blue wafer set of a plurality of semiconductor eutectic, between the center of many group wafers, be equally spaced, described spacing can be no more than 1.0 millimeters, and each group wafer comprises the red wafer of a semiconductor, a semiconductor green wafer and the blue wafer of semiconductor.
Semiconductor eutectic wafer can be the Light-Emitting Diode LED made by the eutectic technology, can be also other semiconductor eutectic light-emitting component.For example, one utmost point of red, green and blue LED is provided respectively copolar conducting voltage separately, another utmost point is connected to a large amount of semi-conductive drive circuit contained such as transistor, by being provided, voltage and switch control, the LED wafer that can control redgreenblue is luminous, thereby is combined into the base pixel form of semiconductor three primary colors.Drive circuit 33,34,35 completes and shows the communication of data between drive circuit and display circuit by wired or wireless connection, drive circuit mainly is comprised of very lagre scale integrated circuit (VLSIC) and integrated drive electronics, to complete control, processing and the driving that shows data.Drive circuit can be powered for display part.
Three layers of circuit layer see one by one and cover from the broad sense angle although should be appreciated that, on relatively high circuit layer, remain with on the circuit layer by relatively low be used to the via hole of the pad position (PAD) of welding semiconductor eutectic wafer.For example, green wafer circuit layer leaves hole be used to the place, all pads position of welding the red wafer of semiconductor eutectic on blue wafer circuit layer, and namely green wafer circuit layer can not block the pad position of blue circuit layer; In like manner, the red circuit layer also leaves hole be used to the place, all pads position of welding the red wafer of semiconductor eutectic and the green wafer of semiconductor eutectic on green and blue wafer circuit layer, namely red wafer circuit layer can not block the pad position of green and blue circuit layer.In addition, those skilled in the art also should be appreciated that insulating barrier can not cover circuit layer fully, but can will on it, come out for the sector of breakdown such as pad be electrically connected to.
It is also understood that the corresponding relation of redgreenblue semiconductor eutectic wafer in the present embodiment and red wafer circuit layer, green wafer circuit layer and blue wafer circuit layer and do not mean that restriction, but can change.For example, the red eutectic wafer of semiconductor can be connected to the circuit layer circuit layer of substrate (near) of the bottom, and the blue eutectic wafer of semiconductor can be connected to the circuit layer circuit layer of substrate (away from) of the superiors, like that.Preferably, one or more layers circuit of described redness, blueness and green wafer circuit layer forms, by increasing the thickness of whole circuit layer, and can be in the situation that semiconductor eutectic wafer density increases on circuit layer, connects up more at leisure.
Fig. 2 is the schematic diagram according to the semiconductor display panel of the RGB semiconductor wafer copolar of the utility model embodiment.
As shown in Figure 2, according to the semiconductor display panel of the utility model embodiment, comprise: substrate 10; Adhesive layer; Copolar layer (step copolar 14); Red wafer circuit layer 15, green wafer circuit layer 17; Blue wafer circuit layer 19; And red wafer circuit layer insulating 16, green wafer circuit layer insulating 18 and blue wafer circuit layer insulating 20; Some semiconductor eutectic wafers, the i.e. red wafer 24 of some direct joints (DA, directly attached) eutectic, the green wafer 25 of some DA eutectics and the blue wafer 26 of some DA eutectics.
The copolar layer is by repeatedly sinking copper or repeatedly heavy silver or repeatedly turmeric ashbury metal formation on substrate, so that micron-sized semiconductor wafer (chip dice) carries out copolar, a utmost point that is about to the eutectic wafer of redgreenblue is joined together to form copolar.Preferably, the copolar layer forms step at the electrically connecting position place of corresponding RGB eutectic wafer and copolar layer and corresponding circuits layer.
Blue wafer circuit layer insulating 20 is formed on copolar layer 14, and blue wafer circuit layer 19 is formed on blue wafer circuit layer insulating 20 then; Next, green wafer circuit layer insulating 18 is formed on blue wafer circuit layer 19, and green wafer circuit layer 17 is formed on green wafer circuit layer insulating 18 then; Then, red wafer circuit layer insulating 16 is formed on green wafer circuit layer 17, and red wafer circuit layer 15 is formed on red wafer circuit layer insulating 16 then.The circuit layer insulating barrier can be made by the insulating material with adhesive effect, thereby three layers of circuit layer, insulating barrier and copolar layer are closely linked, and make between three layers of circuit layer and bottom circuit layer (at this for blue wafer circuit layer) and copolar layer between insulate.
Preferably, blue wafer circuit layer is concordant with the first order step of copolar layer, green wafer circuit layer is concordant with the second level step of copolar layer, red wafer circuit layer is concordant with the third level step of copolar layer, is unlikely and produces inclination so that the redgreenblue wafer can be welded to stable position on copolar layer and corresponding circuit layer.Between copolar level step and corresponding with it each circuit layer, leave gap, insulate between the circuit layer of the layer of above-mentioned insulating barrier, so copolar in addition and redgreenblue wafer.
Semiconductor eutectic redness, green and blue wafer have direct joint (DA, directly attached) characteristic, so DA eutectic wafer can complete and copolar layer and the electrical combination of circuit layer accordingly by the eutectic solder technology.For example, can semiconductor eutectic wafer be welded on the pad (PAD) of copolar layer and circuit layer by seamless ultrasonic die bond welding.Particularly, the red wafer of semiconductor eutectic is welded on copolar layer and red wafer circuit layer by eutectic, the green wafer of semiconductor eutectic is welded on copolar layer and green wafer circuit layer by eutectic, the blue wafer of semiconductor is welded on copolar layer and blue wafer circuit layer by eutectic, wherein, redgreenblue eutectic wafer is by forming copolar with being electrically connected to of copolar layer.For example, in the situation that semiconductor eutectic wafer adopts eutectic LED, described copolar can be common cathode or common anode.
The synthetic many group wafers of the red wafer of a plurality of semiconductor eutectics, the green wafer of a plurality of semiconductor eutectic and the blue wafer set of a plurality of semiconductor eutectic, between the center of many group wafers, be equally spaced, described spacing can be no more than 1.0 millimeters, and each group wafer comprises the red wafer of a semiconductor, a semiconductor green wafer and the blue wafer of semiconductor.
Semiconductor eutectic wafer can be the Light-Emitting Diode LED made by the eutectic technology, can be also other semiconductor eutectic light-emitting component.For example, one utmost point of red, green and blue LED provides unified copolar conducting voltage by the copolar layer, another utmost point is connected to the drive circuit that contains a large amount of semiconductors (switch element), by being provided, voltage and switch control, the LED wafer that can control redgreenblue is luminous, thereby is combined into the base pixel form of semiconductor three primary colors.Drive circuit 33,34,35 completes and shows the communication of data between drive circuit and display circuit by wired or wireless connection, drive circuit mainly is comprised of very lagre scale integrated circuit (VLSIC) and integrated drive electronics, to complete control, processing and the driving that shows data.Drive circuit can be powered for display part.
Be to be understood that, although three layers of circuit layer see one by one and cover from the broad sense angle, on relatively high circuit layer, remain with on the circuit layer by relatively low and the low step of copolar layer be used to the via hole of the pad position (PAD) of welding semiconductor eutectic wafer.For example, green wafer circuit layer leaves hole be used to the place, all pads position of welding the blue wafer of semiconductor eutectic on blue wafer circuit layer and the minimum step of copolar layer, namely green wafer circuit layer can not block the pad position of the first circuit layer and the minimum step of copolar layer; In like manner, red wafer circuit layer also leaves hole be used to the place, all pads position of welding the blue wafer of semiconductor eutectic and the green wafer of semiconductor eutectic on the two-stage step below green and blue circuit layer and copolar layer, namely red wafer circuit layer can not block the pad position on the two-stage step below green and blue wafer circuit layer and copolar layer.In addition, those skilled in the art also should be appreciated that insulating barrier can not cover circuit layer and copolar layer fully, but can will on it, come out for the sector of breakdown such as pad be electrically connected to.
It is also understood that the corresponding relation of redgreenblue semiconductor eutectic wafer in the present embodiment and red wafer circuit layer, green wafer circuit layer and blue wafer circuit layer and do not mean that restriction, but can change.For example, the red eutectic wafer of semiconductor can be connected to the circuit layer circuit layer of copolar layer (near) of the bottom, and the blue eutectic wafer of semiconductor can be connected to the circuit layer circuit layer of copolar layer (away from) of the superiors, like that.Preferably, one or more layers circuit of described redness, blueness and green wafer circuit layer forms, by increasing the thickness of whole circuit layer, and can be in the situation that semiconductor eutectic wafer density increases on circuit layer, connects up more at leisure.
Fig. 3 is the schematic diagram according to the semiconductor display panel of the bluish-green semiconductor wafer copolar of the utility model embodiment.
As shown in Figure 3, according to the semiconductor display panel of the utility model embodiment, comprise: substrate 10; Adhesive layer; Copolar layer (being formed by step blue-green copolar 218 and the red copolar 217 of step); Red wafer circuit layer 15, green wafer circuit layer 17; Blue wafer circuit layer 19; And circuit layer 15,17 and 19 circuit layer insulating barrier separately, i.e. red wafer circuit layer insulating 16, green wafer circuit layer insulating 18 and blue wafer circuit layer insulating 20; Some semiconductor eutectic wafers, the i.e. red wafer 24 of some direct joints (DA, directly attached) eutectic, the green wafer 25 of some DA eutectics and the blue wafer 26 of some DA eutectics.
The copolar layer comprises blue-green semiconductor wafer copolar layer and red semiconductor wafer copolar layer, the red copolar 217 of the step blue-green copolar 218 namely indicated in figure and step, they are by repeatedly sinking copper or repeatedly heavy silver or repeatedly turmeric ashbury metal formation on substrate, so that micron-sized semiconductor wafer (chip dice) carries out copolar, the mutually same utmost point that is about to the eutectic wafer of bluish-green dichromatism all is electrically connected to step blue-green copolar 218, simultaneously the mutually same utmost point of red semiconductor eutectic wafer all is electrically connected to the red copolar 217 of step.It should be pointed out that between blue-green semiconductor wafer copolar layer and red semiconductor wafer copolar layer and insulate, this can realize by between the surface two copolar layer next-door neighbours, arranging insulation/jointing material.Preferably, blue-green semiconductor wafer copolar layer in the welding position of corresponding blue-green eutectic wafer/PAD place, pad position forms step, red semiconductor wafer copolar layer in the welding position of the red eutectic wafer of correspondence/PAD place, pad position and blue-green semiconductor wafer copolar layer form step.As shown in the figure, blue-green semiconductor wafer copolar layer and red semiconductor wafer copolar layer form a plurality of three grades of continuous steps in the pad position.
Blue wafer circuit layer insulating 20 is formed on blue-green semiconductor wafer copolar layer 218, and blue wafer circuit layer 19 is formed on blue wafer circuit layer insulating 20 then; Next, green wafer circuit layer insulating 18 is formed on blue wafer circuit layer 19, and green wafer circuit layer 17 is formed on green wafer circuit layer insulating 18 then; Then, red wafer circuit layer insulating 16 is formed on green wafer circuit layer 17, and red wafer circuit layer 15 is formed on red wafer circuit layer insulating 16 then.Three-layer insulated layer can be made by the material with adhesive effect, thereby three layers of circuit layer and copolar layer are closely linked, and three layers of circuit layer insulate each other and between bottom circuit layer (being blue wafer circuit layer at this) and copolar layer.
Preferably, blue wafer circuit layer is concordant with the first order step of blue-green semiconductor wafer copolar layer, green wafer circuit layer is concordant with the second level step of blue-green semiconductor wafer copolar layer, red wafer circuit layer is concordant with the step (third level step of copolar layer) of blue-green semiconductor copolar layer formation with red semiconductor wafer copolar layer, so that the redgreenblue wafer can not produce to be welded to easily on copolar layer and corresponding circuit layer inclination.Between every one-level step of copolar layer and each corresponding circuit layer, leave gap, above-mentioned insulating barrier in addition, can guarantee to insulate between the circuit layer of copolar layer and redgreenblue wafer.
Semiconductor eutectic redness, green and blue wafer have direct joint (DA, directly attached) characteristic, so DA eutectic wafer can complete and copolar layer and the electrical combination of circuit layer accordingly by the eutectic solder technology.For example, can semiconductor eutectic wafer be welded on copolar layer and circuit layer by seamless ultrasonic die bond welding.Particularly, the red wafer of semiconductor eutectic is welded on red semiconductor wafer copolar layer and red wafer circuit layer by eutectic, the green wafer of semiconductor eutectic is welded on blue-green semiconductor wafer copolar layer and green wafer circuit layer by eutectic, and the blue wafer of semiconductor is welded on blue-green semiconductor wafer copolar layer and blue wafer circuit layer by eutectic.Red semiconductor eutectic wafer is by with being electrically connected to of red semiconductor copolar layer, realizing copolar, and glaucous semiconductor eutectic wafer is by realizing copolar with being electrically connected to of blue-green semiconductor wafer copolar layer.Like this, in the situation that the red semiconductor wafer needs different copolar conducting voltage with the blue-green semiconductor wafer, can provide respectively voltage to red and glaucous semiconductor wafer, thereby can reach the purpose that reduces power consumption.For example, in the situation that semiconductor eutectic wafer adopts eutectic LED, described copolar can be common cathode or common anode.
The synthetic many group wafers of the red wafer of a plurality of semiconductor eutectics, the green wafer of a plurality of semiconductor eutectic and the blue wafer set of a plurality of semiconductor eutectic, between the center of many group wafers, be equally spaced, described spacing can be no more than 1.0 millimeters, and each group wafer comprises the red wafer of a semiconductor, a semiconductor green wafer and the blue wafer of semiconductor.
Semiconductor eutectic wafer can be the Light-Emitting Diode LED made by the eutectic technology, can be also other semiconductor eutectic light-emitting component.For example, a utmost point of red LED provides unified copolar conducting voltage by red semiconductor wafer copolar layer, and another utmost point is connected to a large amount of semi-conductive drive circuit contained such as transistor; The utmost point of blue-green LED provides unified copolar conducting voltage by blue-green semiconductor wafer copolar layer, and another utmost point is connected to a large amount of semi-conductive drive circuit contained such as transistor; By providing voltage and switch to control, the LED wafer that can control redgreenblue is luminous, thereby is combined into the base pixel form of semiconductor three primary colors.Drive circuit 33,34,35 completes and shows the communication of data between drive circuit and display circuit by wired or wireless connection, drive circuit mainly is comprised of very lagre scale integrated circuit (VLSIC) and integrated drive electronics, to complete control, processing and the driving that shows data.Drive circuit can be powered for display part.
Be to be understood that, although three layers of circuit layer see one by one and cover from the broad sense angle, on relatively high circuit layer, remain with on the circuit layer by relatively low and the low step of copolar layer be used to the via hole of the pad position (PAD) of welding semiconductor eutectic wafer.For example, green wafer circuit layer leaves hole be used to the place, all pads position of welding the blue wafer of semiconductor eutectic on the minimum step of blue wafer circuit layer and blue-green semiconductor wafer copolar layer, namely green wafer circuit layer can not block the pad position of the first circuit layer and the minimum step of copolar layer; In like manner, red wafer circuit layer also leaves hole be used to the place, all pads position of welding the blue wafer of semiconductor eutectic and the green wafer of semiconductor eutectic on the two-stage step of green and blue circuit layer and blue-green semiconductor eutectic wafer copolar layer, namely red wafer circuit layer can not block the pad position on the two-stage step of blueness and green wafer circuit layer and blue-green semiconductor eutectic wafer copolar layer.In addition, those skilled in the art also should be appreciated that insulating barrier can not cover circuit layer and copolar layer fully, but can will on it, come out for the sector of breakdown such as pad be electrically connected to.
It is also understood that the corresponding relation of redgreenblue semiconductor eutectic wafer in the present embodiment and red wafer circuit layer, green wafer circuit layer and blue wafer circuit layer and do not mean that restriction, but can change.For example, the red eutectic wafer of semiconductor can be connected to the circuit layer circuit layer of copolar layer (near) of the bottom, and the blue eutectic wafer of semiconductor can be connected to the circuit layer circuit layer of copolar layer (away from) of the superiors, like that; Certainly, in this case, corresponding variation can occur in the step mutual alignment of red semiconductor wafer copolar layer and blue-green semiconductor wafer copolar layer, to adapt to the welding demand of eutectic wafer.Preferably, one or more layers circuit of described redness, blueness and green wafer circuit layer forms, by increasing the thickness of whole circuit layer, and can be in the situation that semiconductor eutectic wafer density increases on circuit layer, connects up more at leisure.
Above-described embodiment; the purpose of this utility model, technical scheme and beneficial effect are further described; institute is understood that; the foregoing is only embodiment of the present utility model; and be not used in and limit protection range of the present utility model; all within spirit of the present utility model and principle, any modification of making, be equal to replacement, improvement etc., within all should being included in protection range of the present utility model.
Claims (10)
1. integrated semiconductor display panel, it is characterized in that comprising: substrate, the first circuit layer, second circuit layer, tertiary circuit layer, the first dielectric adhesive layer, the second dielectric adhesive layer, the red wafer of a plurality of semiconductor, a plurality of semiconductor green wafer and the blue wafer of a plurality of semiconductor, wherein:
Described the first circuit layer is fixed on described substrate, described the first dielectric adhesive layer is combined described the first circuit layer and described substrate second circuit layer insulating sticky, and described the second dielectric adhesive layer will be combined in described second circuit layer and described tertiary circuit layer insulating sticky;
Between the red wafer of described a plurality of semiconductor, described a plurality of semiconductor green wafers and the blue wafer of described a plurality of semiconductor and described the first circuit layer, described second circuit layer and described tertiary circuit layer, has electrical connection one to one.
2. integrated semiconductor display panel according to claim 1 characterized by further comprising:
The copolar layer, it is formed on described substrate;
The 3rd dielectric adhesive layer, it is combined described copolar layer and described the first circuit layer insulating sticky;
Wherein, the red wafer of described a plurality of semiconductor, described a plurality of semiconductor green wafers and the blue wafer of described a plurality of semiconductor are electrically connected to described copolar layer.
3. integrated semiconductor display panel according to claim 2 is characterized in that:
The red wafer of described a plurality of semiconductor, described a plurality of semiconductor green wafers and the blue wafer of described a plurality of semiconductor are by forming copolar with being electrically connected to of described copolar layer.
4. integrated semiconductor display panel according to claim 2 is characterized in that:
Described copolar layer comprises the first copolar layer and the second copolar layer, described the first copolar layer and described the second copolar layer mutually insulated, the red wafer of described a plurality of semiconductors is by forming copolar, described a plurality of semiconductor green wafers and the blue wafer of described a plurality of semiconductor by with being electrically connected to of the second copolar layer, forming copolar with being electrically connected to of the first copolar layer.
5. integrated semiconductor display panel according to claim 2 is characterized in that:
Described copolar layer by heavy copper repeatedly, repeatedly heavy silver, repeatedly one of mode of turmeric ashbury metal is formed on described substrate.
6. integrated semiconductor display panel according to claim 2 is characterized in that:
Described copolar layer forms three grades of steps in the position be electrically connected to the red wafers of described a plurality of semiconductors, described a plurality of semiconductor green wafers and the blue wafer of described a plurality of semiconductor, described three grades of steps from low to high respectively with described the first circuit layer, described second circuit layer is concordant with described tertiary circuit layer and do not contact.
7. integrated semiconductor display panel according to claim 1 is characterized in that:
The red wafer of described a plurality of semiconductor, described a plurality of semiconductor green wafers and the blue wafer of described a plurality of semiconductor are by forming respectively copolar with being electrically connected to of corresponding circuits layer.
8. integrated semiconductor display panel according to claim 1 is characterized in that:
Described the first circuit layer, described second circuit layer and described tertiary circuit layer are formed by one or more layers circuit respectively.
9. integrated semiconductor display panel according to claim 1 is characterized in that:
The synthetic many group wafers of the red wafer of described a plurality of semiconductor, described a plurality of semiconductor green wafers and the blue wafer set of described a plurality of semiconductor, between the center of described many group wafers, be equally spaced, each group wafer comprises the red wafer of a semiconductor, a semiconductor green wafer and the blue wafer of semiconductor.
10. according to claim 2,3,4,5, one of 6 described integrated semiconductor display panels, it is characterized in that:
The red wafer of described a plurality of semiconductor, described a plurality of semiconductor green wafers and the blue wafer of described a plurality of semiconductor are semiconductor eutectic wafers, and described semiconductor eutectic wafer forms electrical connection by the eutectic solder technology with corresponding circuit layer and described copolar layer.
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| CN2013200712435U CN203312287U (en) | 2013-02-07 | 2013-02-07 | Integrated semiconductor display panel |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103325767A (en) * | 2013-02-07 | 2013-09-25 | 程君 | Integrated semi-conductor display panel |
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2013
- 2013-02-07 CN CN2013200712435U patent/CN203312287U/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103325767A (en) * | 2013-02-07 | 2013-09-25 | 程君 | Integrated semi-conductor display panel |
| CN103325767B (en) * | 2013-02-07 | 2015-07-08 | 程君 | Integrated semi-conductor display panel |
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