CN203299583U - Track instrument plotting speed control card based on FPGA - Google Patents
Track instrument plotting speed control card based on FPGA Download PDFInfo
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- CN203299583U CN203299583U CN2013203216367U CN201320321636U CN203299583U CN 203299583 U CN203299583 U CN 203299583U CN 2013203216367 U CN2013203216367 U CN 2013203216367U CN 201320321636 U CN201320321636 U CN 201320321636U CN 203299583 U CN203299583 U CN 203299583U
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Abstract
The utility model belongs to the field of ship navigation devices, and specifically relates to a track instrument plotting speed control card based on a FPGA. The track instrument plotting speed control card can be used in a ship track instrument, automatically selects a constant speed algorithm or uniformly accelerated/retarded algorithm to control a stepping motor, and host system resources of the track instrument is not occupied in a plotting process, and after the plotting is completed, the track instrument automatically informs the host. The speed control card comprises a FPGA chip XC2S50, a configuration chip 18V01, an output driver chip SN74LS244, A pulse and control output interface HJY, a JTAG interface, an on-line programmatic interface DOWNLOAD, and a general I/O interface. Compared with an original CDT800 control interface card in hardware aspects, real-time property, reliability, and integration of the system are substantially improved, and meanwhile the price is cheaper. Compared with previous uniform speed control, plotting speed of a motor is twice, so rapidity of the system is improved.
Description
Technical field
The invention belongs to the ship navigation apparatus field, be specifically related to a kind of can be used in the ship track instrument, data are independently selected at the uniform velocity or even acceleration and deceleration algorithm carrys out in control step motor, plotting process not take the Track Plotter host system resources according to marking and drawing, mark and draw after completing the Track Plotter based on FPGA of automatically informing main frame marks and draws the speed control card.
Background technology
Track Plotter is a kind of indispensable navigator that modern naval vessels, oceanographic vessel and fisherman are commonly used, it is course and the voyage information that provides according to gyrocompass, log, or the locating information that provides of other navigator, show in real time and minute book ship and target longitude and latitude, and on the sea chart of different proportion, complete continuously the flight path of ship navigation and the automatic plotting of various seamarks.Particularly under severe sea conditions and wartime using value arranged especially, it is the important supporting ingredient of modern navigation system, its plotting speed is the technical indicator that the navigating officer pays much attention to, because plotting speed is directly connected to the work efficiency of Track Plotter.
The duty of Track Plotter has follows the tracks of and two kinds of non-tracking.At first, human-computer interaction module is in open state, by the self check key with move the drawing function that a key can check Track Plotter.Then, by combining, lead indication control board dress sea chart and send the order of dress sea chart to Track Plotter, enter tracking mode, and the shielding human-computer interaction module.The real-time plotting of Track Plotter is longitude, latitude value and the various drawing command that is sent by navigator fix equipment on the CAN bus by receiving, through resolving of mathematical model, obtain X, the Y-direction displacement, pass through the linear interpolation computing, pulse control interface card transmitted drive motor drives paints pen plotting flight path and various seamark again.
At present Track Plotter generally adopts the CDT800 module as pulse control interface card, and it mainly comprises 16 digit counters/timer and digital quantity I/O module, can with control system of PC/104 module composition.
The CDT800 module is equipped with two Am9513A timing controllers, can provide that programmable frequency is synthetic, the high-precision programmable cycling wave form, can weigh the triggered digital monopulse, day the time functions such as clock, warning, complicated pulse generation, the generation of high precision baud rate, shift pulse generation, event count and wave form analysis.
(2) CDT800 has the digital quantity I/O of 24 passage TTL/CMOS compatibilities, and they can directly be connected with external unit or signal, with the closure of aware switch, and the triggering of digital event or the action of solid-state relay.These I/O connect day (PPI) chip by 71055 programmable peripherals on module to provide.71055 can do by one of two kinds of modes soil: mode 0, mode 1, mode 2.24 passage digital quantity I/O are drawn by I/O connector.
What CDT800 adopted is to use the at the uniform velocity mode of pulse control step motor, and by down trigger, realize the transmission of pulse, its design dynamic initialization is strict and can take too much system resource in the process of implementation, fully requirement of real time.Its adopts in addition is control method at the uniform velocity, and plotting speed is slow, can not well meet extensive high strength and mark and draw task.
Summary of the invention
The objective of the invention is to propose a kind of plotting speed faster, still less, price is cheaper for occupying system resources, and reliability is stronger must mark and draw the speed control card based on the Track Plotter of FPGA.
The object of the present invention is achieved like this:
The present invention includes fpga chip XC2S50, configuring chip 18V01, output drives chip SN74LS244, pulse and control output interface HJY, jtag interface, online programming interface DOWNLOAD, general purpose I/O interface, Track Plotter host PC/104 modules send data command information by data bus, after by fpga chip XC2S50, being processed, are converted into pulse signal and send to output to drive chip SN74LS244, drive chip SN74LS244 by interface HJY, pass to the stepper motor driver of X, Y-direction.
Beneficial effect of the present invention is: the present invention uses FPGA as marking and drawing the speed control card, and hardware aspect is compared former CDT800 control interface card, the real-time of system, reliability and integrated had significantly improve, price is more cheap simultaneously.The motor speed of writing rapidly is compared at the uniform velocity control has before increased by one times, has improved the rapidity of system.
The accompanying drawing explanation
The circuit theory diagrams of Fig. 1 control card;
The relation of medium frequency and step-length is controlled in the even acceleration and deceleration of Fig. 2;
Fig. 3 control card software module structure block diagram;
X in Fig. 4 PC/104 module, Y-direction is differentiated process flow diagram;
Interface module program flow diagram in Fig. 5 control card;
X-direction pulse control module program flow diagram in Fig. 6 control card;
X-direction pulse generating module program flow diagram in Fig. 7 control card;
Analogous diagram in Fig. 8 control card program accelerator;
Fig. 9 control card program is the analogous diagram in process at the uniform velocity;
Analogous diagram in Figure 10 control card programmed deceleration process;
Figure 11 control card program is marked and drawed the analogous diagram while finishing.
Embodiment
Below in conjunction with accompanying drawing, the present invention is described further.
Track Plotter based on FPGA is marked and drawed the speed control card, by the core of the FPGA element XC2S50 that produces based on Xilinx company as the velocity pulse control card, the speed control card has comprised following components: fpga chip XC2S50, configuring chip 18V01, output drives chip SN74LS244, pulse and control output interface HJY, jtag interface, online programming interface DOWNLOAD, and the general purpose I that is connected with Track Plotter host PC/104 modules/O interface.
Program adopts the control algolithm of even acceleration and deceleration to carry out the control step motor, refer to that specifically stepper motor is when starting, with the operation of the speed lower than starting frequency fn, then even acceleration, after accelerating to given pace fs (the out-of-step free maximum operation frequency of motor), just with this speed constant-speed operation; When soon reaching home, even deceleration, move it under the speed that decelerates to lower than response frequency fn, until shut down and cover the step number of regulation.Its detailed process is divided into accelerator and moderating process.
According to square characteristic, load torque and the technical requirement of the speed of plotting frequently of Track Plotter stepper motor, the parameter value of speed Control algorithm, write out corresponding software program with the verilog language, software section mainly comprises top-level module, interface module, pulse control module, pulse generating module etc.It is characterized in that control card receives the PC104 mainboard and (mainly comprises: the frequency division value of X, Y-direction by the data command information that the I/O interface sends, pulse number, traffic direction, and start/stop operation, lift and start to write, report to the police etc.), after fpga chip XC2S50 processes, be converted into the velocity pulse control signal of corresponding frequencies, through output, drive chip SN74LS244, by output interface HJY, the stepper motor that passes to X, Y-direction is realized the purpose that Track Plotter is marked and drawed.
According to scheme content setting Track Plotter, mark and draw the input and output signal of speed control card.Input signal can comprise: synchronizing clock signals clk; Reset signal rst; Reading and writing control signal rd, wr; Master clock signal countclk; 10 road address signal addr; 16 circuit-switched data input signal data.Output signal has: 4 road drive pulse signal driver; Standby ready signal ready; Lift the control signal reg_pen that starts to write; Alerting signal regalarm; Walking end signal overxy.Working procedure enters in configuring chip 18V01 by JTAG mouth or the programming of DOWNLOAD mouth.
The parameter of even acceleration/deceleration control algorithm in setting program.The related hardware correlation parameter of Track Plotter system is: XC2S50 clock frequency fc=40000000.0Hz, X, Y-direction pulse equivalency are mx=my=0.0048mm, and the stepper motor maximum static torque is 1.23N.m.According to present designing requirement, we can select and paint the highest plotting speed of pen is 96mm/s, be that highest frequency is 20000.0Hz, the startup frequency is g=5000.0Hz, stop frequency g=5000.0Hz, formula f=g+at, consider the torque limit of painting pen, we set acceleration a=350000, thereby calculate the acceleration time, are t=0.0428s, complete required step number 536 steps of accelerator.Equally, in moderating process, in order to calculate and to programme conveniently, we also are set as a=175000 retarded velocity, and completing equally moderating process also needs 536 steps, add that certain amount of redundancy namely completes minimum needs 1100 steps of acceleration and deceleration process, and namely distance is minimum is 5.28mm.
Therefore when want plot a distance walks greater than 1100, adopt the control mode of even acceleration and deceleration, during less than 1100 step, adopt at the uniform velocity and control, f=9000.0Hz.Concrete computational discrimination carries out in Track Plotter host PC/104 mainboard module programs, then corresponding calculating parameter is sent to the FPGA control card, then carries out corresponding processing to produce the corresponding pace pulse of walking.
The control card software structure design.In the present invention, FPGA mainly selects the verilog language description, and the program after compiling enters in configuring chip 18V01 by the programming of JTAG mouth.
According to the division principle of software systems, software section mainly comprises:
Top-level module
Interface module
The X-direction pulse control module
The Y-direction pulse control module
The X-direction pulse generating module
The Y-direction pulse generating module
The software module structure block diagram as shown in Figure 3, X in the PC/104 module, Y-direction is differentiated process flow diagram as shown in Figure 4.
The interface module major function is: at WriteMode, receive the data command information that is transmitted by the PC/104 mainboard, through the judgement for its port address, in corresponding pin output, pass to pulse control module.In addition, in read mode, the plotting status information that the received pulse control module provides, send to the PC/104 mainboard by data bus.The function of pulse control module is: the data message that the docking port module sends judges, come gating pulse generation module to export at the uniform velocity pulse or even acceleration and deceleration pulse, by the output pulse of pulse generating module, record the afterpulse number simultaneously, and send end signal when umber of pulse equals zero.The major function of pulse generating module is: according to the information that pulse control module transmits, produce accordingly at the uniform velocity or even acceleration and deceleration pulse carrys out Driving Stepping Motor.All software modules are encapsulated in top-level module.
The design of concrete software module in program.
(1) top-level module: top-level module encapsulates each submodule, and its each port signal is shone upon and is connected.
The input signal of module comprises: clock signal clk; Data transfer signal clkin; Reset signal rst; Reading and writing control signal rd, wr; 10 road address signal addr; 16 circuit-switched data input signal data; 2 bit boundary status signal boundary.
The output signal of module comprises: 4 road drive pulse signal driver(X, Y-direction pulse output signals outx, outy and X, Y-direction pulse direction signal reg_dirx, reg_diry); Standby ready signal ready; Lift the control signal reg_pen that starts to write; Alerting signal reg_alarm; And plotting end signal overxy.
(2) interface module: in read mode, read in the data command information that is transmitted by master controller, through the judgement for its port address, in corresponding pin output, pass to pulse generating module.In addition, at WriteMode, the status information that the received pulse control module provides, send to master controller by data bus.
The input signal of module comprises: data transfer signal clkin; Reset signal rst; Reading and writing control signal rd, wr; 10 road address signal addr; 16 circuit-switched data input/output signal data; X, Y-direction are marked and drawed status signal STARTX and STARTY.
The output signal of module comprises: two-way traffic direction signal reg_dirx and reg_diry; 32 road X, Y-direction pulse number initializing signal regnx, regny; 16 road X, the signal regfx of Y-direction pulsed frequency value initialization, regfy; 16 road X, Y-direction acceleration and deceleration step number initializing signal regjx, regjy; Operation commencing signal start; Force stop signal force_over; Lift the control signal reg_pen that starts to write; Alerting signal reg_alarm; Mark and draw end signal overxy.
Its specific works process: at first, whether the value of module inquire address pin addr is " 0100000 * 00 ", if, judge again whether read control signal rd is 1, if rd=1 is for reading in the master controller signal, then judge the 2nd of addr, if 1, write offset address, the offset address that is about to port writes register reg_addr; If 0, by the offset address value of inquiry reg_addr storage, data are read in from data input signal line data (0～15), each corresponding output is controlled to pin and carry out initialization.If rd=0 and wr=1, be to the master controller write signal, namely write the plotting end signal.Its specific procedure process flow diagram as shown in Figure 5.The concrete operations that in register reg_addr, each offset address is corresponding are in Table 1, and table 1 is the initialization to each control signal pin.
(3) X-direction pulse control module
The input signal of module comprises: mark and draw commencing signal start_x; Stop signal force_x; 16 tunnel X-direction pulsed frequency discriminant value fx; 32 tunnel X-direction pulse number initializing signal NX; 16 tunnel X-direction acceleration and deceleration step number initial value JX; X-direction pulse output signals SX.
The output signal of module comprises: X-direction is marked and drawed end signal STARTX; Parameter DX in 16 tunnel X-direction acceleration and deceleration processes; 16 tunnel X-directions are frequency values yunsu_x at the uniform velocity.
Its specific works process: at first, module is read in X-direction step number initial value NX, X-direction pulsed frequency discriminant value fx and X-direction acceleration and deceleration step number initial value JX, again fx is differentiated, if greater than uniform motion frequency f=9000Hz, just select the control mode of even acceleration and deceleration, if less than namely with the frequency of fx, would move with uniform velocity, parameters is assigned to yunsu_x by the value of fx, then the enable signal startx of pulse generating module is put to 1.In addition, the pulse signal that sends according to pulse generating module, as input, records the afterpulse number, and when umber of pulse equals zero, sends and mark and draw end signal STARTX.As shown in Figure 6, the Y-direction pulse control module is identical with X-direction for its specific procedure process flow diagram.
(4) X-direction pulse generating module: the information of importing into according to pulse control module, produce accordingly at the uniform velocity or even acceleration and deceleration square-wave pulse, the frequency of its output waveform is the synchronizing frequency of walking of X-direction stepper motor, and its specific procedure process flow diagram is as shown in Figure 7.The Y-direction pulse generating module is identical with X-direction.
The input signal of module comprises: clock signal of system clk; Parameter d x in 16 tunnel X-direction acceleration and deceleration processes; Mark and draw commencing signal startx; 16 tunnel X-directions are frequency values yunsu_x at the uniform velocity.
The output signal of module comprises: X-direction output pulse outx.
Its specific works process: at first, whether module differentiates the value of the yunsu_x that inputs greater than zero, if be that output frequency value is the at the uniform velocity pulse of yunsu_x greater than zero, if equal zero, namely export even acceleration and deceleration pulse, in its acceleration and deceleration process, pulsed frequency value corresponding to every step deposited in FPGA in advance, while realizing, according to the step number parameter d x in the acceleration and deceleration process of input, call corresponding frequency values, when dx progressively increased since 1, its corresponding pulsed frequency progressively increased and namely is in boost phase; When the dx value was constant, its corresponding pulsed frequency is also constant namely was in the at the uniform velocity stage; When dx started progressively to reduce, its corresponding pulsed frequency progressively reduced namely to be in the decelerating phase; According to the corresponding complete even acceleration and deceleration pulsed frequency outx of pulsed frequency value regfx output of every step, namely realized the even acceleration/deceleration control algorithm of stepper motor again.The Y-direction pulse generating module is identical with X-direction.
Track Plotter is marked and drawed the functional simulation of speed control card.
Whether whether the effect of functional simulation is that source code is compiled, detect on grammer wrongly, and after to be compiled passing through, emulator produces output according to input signal again, can arbitration functions correct according to output.If incorrect, need to repeatedly revise code, until grammer and function all reach requirement.The data value signal that uses while using by reality is write corresponding test stimulus file, then with Modelsim SE6.5, carries out emulation, can eject the simulation waveform curve map, as shown in Figure 8, Figure 9, Figure 10 and Figure 11.
The emulation pumping signal parameter that arranges is: X-direction walking 1600 steps, and highest frequency 20000Hz, Y-direction walking 1000 steps, in order with X-direction, to complete simultaneously walking as far as possible, therefore the Y-direction highest frequency is 12500Hz.What Fig. 8 represented is the pulse output in X, Y-direction accelerator, according to regfx, regfy output frequency value, can find out the increase of output frequency, and every defeated 1 pulse residue pedometer numerical value stepx, stepy subtract 1.Fig. 9 represents is the process in stage at the uniform velocity after accelerating to complete, and namely regfx, regfy remain unchanged, and can find out that two are respectively 20000Hz and 12500Hz to pulsed frequency.What Figure 10 represented is the pulse output in X, Y-direction moderating process, according to regfx, regfy output frequency value, can find out reducing of output frequency, and every output 1 pulse residue pedometer numerical value stepx, stepy subtract 1.Pulse output in the plotting terminal procedure that Figure 11 means, can find out that residue pedometer numerical value stepx, stepy just no longer reduce after arriving 1, and after output completes, end mark (STARTX and STARTY) is all zero, be after host query, namely to know to mark and draw to finish, thereby completed whole plotting process.Therefore simulation result is consistent with expection, and prover has reached designing requirement.
The present invention is having obvious effect aspect the performance boost of Track Plotter, rapidity and reliability in the time of can improving the Track Plotter plotting, and reduction takies the Track Plotter host resource, and cheap, therefore can be widely used in the Track Plotter of present use.
Table 1
Claims (1)
1. the Track Plotter based on FPGA is marked and drawed the speed control card, comprise fpga chip XC2S50, configuring chip 18V01, output drives chip SN74LS244, pulse and control output interface HJY, jtag interface, online programming interface DOWNLOAD, general purpose I/O interface, it is characterized in that: Track Plotter host PC/104 modules send data command information by data bus, after by fpga chip XC2S50, being processed, being converted into pulse signal sends to output to drive chip SN74LS244, drive chip SN74LS244 by interface HJY, pass to X, the stepper motor driver of Y-direction.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103324212A (en) * | 2013-06-05 | 2013-09-25 | 哈尔滨工程大学 | Flight track instrument plotting speed control card based on FPGA |
| CN103916057A (en) * | 2014-03-31 | 2014-07-09 | 北京自动化控制设备研究所 | Spinning top hysteresis motor out-of-synchronism treating method and circuit thereof |
-
2013
- 2013-06-05 CN CN2013203216367U patent/CN203299583U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103324212A (en) * | 2013-06-05 | 2013-09-25 | 哈尔滨工程大学 | Flight track instrument plotting speed control card based on FPGA |
| CN103916057A (en) * | 2014-03-31 | 2014-07-09 | 北京自动化控制设备研究所 | Spinning top hysteresis motor out-of-synchronism treating method and circuit thereof |
| CN103916057B (en) * | 2014-03-31 | 2017-09-19 | 北京自动化控制设备研究所 | A kind of gyro hysteresis machine step-out solution and its circuit |
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