CN203164811U - Offset voltage compensating circuit of comparator - Google Patents

Offset voltage compensating circuit of comparator Download PDF

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Publication number
CN203164811U
CN203164811U CN 201320099901 CN201320099901U CN203164811U CN 203164811 U CN203164811 U CN 203164811U CN 201320099901 CN201320099901 CN 201320099901 CN 201320099901 U CN201320099901 U CN 201320099901U CN 203164811 U CN203164811 U CN 203164811U
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China
Prior art keywords
resistance
output
voltage
generation unit
comparator
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Withdrawn - After Issue
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CN 201320099901
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Chinese (zh)
Inventor
桑涛
邱德华
尚绪树
单来成
李启龙
宋金凤
颜雨
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Shandong Lichuang Winchip Integrated Circuit Co Ltd
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Shandong Lichuang Winchip Integrated Circuit Co Ltd
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Abstract

The utility model discloses an offset voltage compensating circuit of a comparator, which includes a reference voltage generation unit, a digital adjustment unit, a comparator, a first analog switch K1, a second analog switch K2 and a coupling capacitor C1. The offset voltage compensating circuit of the comparator is characterized in that the output voltage Vref of the reference voltage generation unit is connected with a positive end of the comparator via the second analog switch K2; the output voltage Vadj of the reference voltage generation unit is connected with a negative end of the comparator; the coupling capacitor C1 is connected with the positive end of the comparator via the first analog switch K1; the output of the comparator is connected with the digital adjustment unit; the output of the digital adjustment unit is connected with the reference voltage generation unit; and the digital adjustment unit is used for adjusting the voltage Vadj output by the reference voltage generation unit. The circuit adopts digital automatic compensation to lower the offset voltage of a common comparator to be within the range of the allowable error, so the design complexity of the comparator is lowered on one hand, and the influence on the offset voltage by external factors such as temperature can be eliminated on the other hand. Therefore, the offset voltage compensating circuit is extremely suitable for application occasions such as ultrasonic heat measurement and ultrasonic flow measurement.

Description

A kind of comparator imbalance voltage compensating circuit
Technical field
The utility model relates to the electronic surveying field, concretely, relates to a kind of comparator imbalance voltage compensating circuit and compensation method.
Background technology
In ultrasonic flowmeter, calorimeter or similar application, the peak-to-peak value that needs the use comparer that transducer is returned is that the sine wave shaped of hundreds of mV becomes square wave, thereby measures the time of arrival of echo.For saving cost, generally with the single supply comparer echo was carried out zero balancing, at this moment need the alternating voltage of input comparator is lifted on the datum, the comparative voltage of comparer also needs to be set on the datum.The offset voltage of comparer can impact resolution, the offset voltage of common comparer can reach at several mV to tens mV, and vary with temperature obviously, the offset voltage of chopper comparator can be accomplished several uV, but copped wave comparer technological requirement and design complexity are than higher.Therefore need a kind of circuit of design, can make the offset voltage control of common comparer in the scope that error allows, and not vary with temperature.
The utility model content
The technical problems to be solved in the utility model provides a kind of comparator imbalance voltage compensating circuit and compensation method, reaches the purpose that reduces comparator imbalance voltage, and this circuit structure is simple, and it is convenient to use.
The utility model adopts following technical scheme to realize the utility model purpose:
A kind of comparator imbalance voltage compensating circuit, comprise reference voltage generation unit, digital adjustment means, comparer, analog switch one K1, analog switch two K2, coupling capacitance C1, it is characterized in that: the output Vref of described reference voltage generation unit links to each other by the anode of described analog switch two K2 and described comparer; The output Vadj of described reference voltage generation unit and the negative terminal of described comparer link to each other; Described coupling capacitance C1 opens a pass K1 by described simulation and links to each other with the comparer anode; Described comparer output connects described digital adjustment means; The output of described digital adjustment means connects described reference voltage generation unit, is used for regulating the voltage Vadj of reference voltage generation unit output.
As the further restriction to the technical program, described reference voltage generation unit comprises voltage follower one U1, voltage follower two U2, voltage follower three U3, divider resistance R0-R63, divider resistance R64-R67, simulation MUX U4, divider resistance R64-R67 comprises R64, R65, four resistance of R66, R67, wherein the resistance value of resistance R 65 and R66 equates, one end ground connection of resistance R 64, the termination power VCC of R67, resistance R 64, R65, R66, R67 join end to end successively and form divider resistance string to power supply VCC; The anode of voltage follower two U2 is connected the tie point of resistance R 65 and R66; The output signal of voltage follower two U2 is Vref; The anode of voltage follower three U3 connects the tie point of resistance R 66 and R67, and the anode of voltage follower one U1 connects the tie point of resistance R 64 and R65; Divider resistance R0-R63 comprises 64 resistance that resistance is identical, one end of resistance R 0 connects the output of power supply follower one U1, one end of resistance R 63 connects the output of power supply follower three U3, and R0-R63 joins end to end successively and forms divider resistance string to voltage follower one, three U1, U3 output voltage; 64 voltage input ends of simulation MUX U4 connect 64 voltage nodes that resistance R 0-R63 dividing potential drop forms respectively, and the digital control end CTRL of described simulation MUX U4 is subjected to the control of described digital adjustment means, is output as Vadj.
Compared with prior art, advantage of the present utility model and good effect are: circuit adopts the numeral mode of compensation automatically, the offset voltage of common comparer is reduced in the scope of error permission, reduced the design complexity of comparer on the one hand, eliminate the influence of extraneous factors such as temperature to offset voltage on the other hand, be very suitable for application scenarios such as ultrasonic heat metering, measuring ultrasonic wave flow.
Description of drawings
Fig. 1 is the block diagram of the utility model preferred embodiment.
Fig. 2 is the reference voltage generation unit circuit theory diagrams of the utility model preferred embodiment.
Embodiment
Below in conjunction with accompanying drawing and preferred embodiment the utility model is done further to describe in detail.
Referring to Fig. 1, Fig. 2, the utility model comprises reference voltage generation unit, digital adjustment means, comparer, analog switch one K1, analog switch two K2, coupling capacitance C1, and the output Vref of described reference voltage generation unit links to each other by the anode of described analog switch K2 and described comparer; The output Vadj of described reference voltage generation unit and the negative terminal of described comparer link to each other; Described coupling capacitance C1 links to each other with the comparer anode by described analog switch K1; Described comparer output connects described digital adjustment means; The output of described digital adjustment means connects described reference voltage generation unit, is used for regulating the voltage Vadj of reference voltage generation unit output.
Referring to Fig. 2, described reference voltage generation unit comprises voltage follower one U1, voltage follower two U2, voltage follower three U3, divider resistance R0-R63, divider resistance R64-R67, simulation MUX U4, divider resistance R64-R67 comprises R64, R65, four resistance of R66, R67, wherein the resistance value of resistance R 65 and R66 equates, one end ground connection of resistance R 64, the termination power VCC of R67, resistance R 64, R65, R66, R67 join end to end successively and form divider resistance string to power supply VCC; The anode of voltage follower two U2 is connected the tie point of resistance R 65 and R66; The output signal of voltage follower two U2 is Vref; The anode of voltage follower three U3 connects the tie point of resistance R 66 and R67, and the anode of voltage follower one U1 connects the tie point of resistance R 64 and R65; Divider resistance R0-R63 comprises 64 resistance that resistance is identical, one end of resistance R 0 connects the output of power supply follower one U1, one end of resistance R 63 connects the output of power supply follower three U3, and R0-R63 joins end to end successively and forms divider resistance string to voltage follower one, three U1, U3 output voltage; 64 voltage input ends of simulation MUX U4 connect 64 voltage nodes that resistance R 0-R63 dividing potential drop forms respectively, and the digital control end CTRL of described simulation MUX U4 is subjected to the control of described digital adjustment means, is output as Vadj.
In the described reference voltage generation unit, the voltage that Vref promotes for the AC signal that will set, Vref=(R64+R65) VCC/ (R64+R65+R66+R67); The voltage of mark R66 and R67 tie point is Vup, Vup=Vref+1/2 Δ V; The voltage of mark R64 and R65 tie point is Vdn, Vdn=Vref-1/2 Δ V; The voltage difference that Vup and Vdn are 2 is Δ V; Voltage follower three U3 and voltage follower one U1 follow Vup and Vdn respectively, and 64 resistance of divider resistance string R0-R63 are divided into 64 sections with Δ V, and every section is Δ V/64.If Δ V=64mV, then each section is 1mv, means that the offset voltage of comparer will be limited within the 1mV.
In the described reference voltage generation unit, simulation MUX U4 is one 64 and selects 1 MUX, its output voltage V adj is by the CTRL signal controlling of a width 5bit, output voltage V adj=Vdn+(Δ V * CTRL)/64, simulation MUX U4 specific implementation circuit belongs to known technology, no longer describes in detail.
Described digital adjustment means is used for realizing the comparer offset voltage is compensated method, and its step is as follows:
(1) analog switch one K1 turn-offs, analog switch two K2 conductings;
(2) digital adjustment means output CTRL=63, this moment, comparer was output as low level;
(3) digital adjustment means deducts 1 with the value of CTRL at every turn, judges comparer output, until comparer is output as high level, CTRL stops to change;
(4) analog switch one K1 conducting, analog switch two K2 turn-off.
The physical circuit that meets described digital adjustment means compensation method has multiple way of realization, belongs to known technology, no longer describes in detail.
Certainly; above-mentioned explanation is not to restriction of the present utility model; the utility model also is not limited only to above-mentioned giving an example, and the variation that those skilled in the art make in essential scope of the present utility model, remodeling, interpolation or replacement also belong to protection domain of the present utility model.

Claims (2)

1. comparator imbalance voltage compensating circuit, comprise reference voltage generation unit, digital adjustment means, comparer, analog switch one K1, analog switch two K2, coupling capacitance C1, it is characterized in that: the output Vref of described reference voltage generation unit links to each other by the anode of described analog switch two K2 and described comparer; The output Vadj of described reference voltage generation unit and the negative terminal of described comparer link to each other; Described coupling capacitance C1 opens a pass K1 by described simulation and links to each other with the comparer anode; Described comparer output connects described digital adjustment means; The output of described digital adjustment means connects described reference voltage generation unit, is used for regulating the voltage Vadj of reference voltage generation unit output.
2. according to the described comparator imbalance voltage compensating circuit of claim 1, it is characterized in that: described reference voltage generation unit comprises voltage follower one U1, voltage follower two U2, voltage follower three U3, divider resistance R0-R63, divider resistance R64-R67, simulation MUX U4, divider resistance R64-R67 comprises R64, R65, R66, four resistance of R67, wherein the resistance value of resistance R 65 and R66 equates, one end ground connection of resistance R 64, the termination power VCC of R67, resistance R 64, R65, R66, R67 joins end to end successively and forms divider resistance string to power supply VCC; The anode of voltage follower two U2 is connected the tie point of resistance R 65 and R66; The output signal of voltage follower two U2 is Vref; The anode of voltage follower three U3 connects the tie point of resistance R 66 and R67, and the anode of voltage follower one U1 connects the tie point of resistance R 64 and R65; Divider resistance R0-R63 comprises 64 resistance that resistance is identical, one end of resistance R 0 connects the output of power supply follower one U1, one end of resistance R 63 connects the output of power supply follower three U3, and R0-R63 joins end to end successively and forms divider resistance string to voltage follower one, three U1, U3 output voltage; 64 voltage input ends of simulation MUX U4 connect 64 voltage nodes that resistance R 0-R63 dividing potential drop forms respectively, and the digital control end CTRL of described simulation MUX U4 is subjected to the control of described digital adjustment means, is output as Vadj.
CN 201320099901 2013-03-06 2013-03-06 Offset voltage compensating circuit of comparator Withdrawn - After Issue CN203164811U (en)

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Application Number Priority Date Filing Date Title
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Application Number Priority Date Filing Date Title
CN 201320099901 CN203164811U (en) 2013-03-06 2013-03-06 Offset voltage compensating circuit of comparator

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103176497A (en) * 2013-03-06 2013-06-26 山东力创赢芯集成电路有限公司 Comparator offset voltage compensation circuit and compensation method
CN109612598A (en) * 2018-12-14 2019-04-12 华南理工大学 A kind of temperature sensing circuit and method
CN116577597A (en) * 2023-07-14 2023-08-11 深圳市爱普特微电子有限公司 Method and system for testing offset voltage of high-precision comparator

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103176497A (en) * 2013-03-06 2013-06-26 山东力创赢芯集成电路有限公司 Comparator offset voltage compensation circuit and compensation method
CN109612598A (en) * 2018-12-14 2019-04-12 华南理工大学 A kind of temperature sensing circuit and method
CN109612598B (en) * 2018-12-14 2019-08-30 华南理工大学 A kind of temperature sensing circuit and method
CN116577597A (en) * 2023-07-14 2023-08-11 深圳市爱普特微电子有限公司 Method and system for testing offset voltage of high-precision comparator
CN116577597B (en) * 2023-07-14 2023-11-21 深圳市爱普特微电子有限公司 Method and system for testing offset voltage of high-precision comparator

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Granted publication date: 20130828

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