CN203027375U - Portable video signal collecting device of 3G-SDI/DVI (3Gbps serial digital interface/digital video interface) - Google Patents

Portable video signal collecting device of 3G-SDI/DVI (3Gbps serial digital interface/digital video interface) Download PDF

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Publication number
CN203027375U
CN203027375U CN 201220703490 CN201220703490U CN203027375U CN 203027375 U CN203027375 U CN 203027375U CN 201220703490 CN201220703490 CN 201220703490 CN 201220703490 U CN201220703490 U CN 201220703490U CN 203027375 U CN203027375 U CN 203027375U
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module
video
video signal
frame
dvi
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CN 201220703490
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周春雷
张坛
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DALIAN KEDI VIDEO TECHNOLOGY Co Ltd
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DALIAN KEDI VIDEO TECHNOLOGY Co Ltd
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Abstract

The utility model discloses a portable video signal collecting device of 3G-SDI/DVI (3Gbps serial digital interface/digital video interface). The device comprises a video analysis module, a high-speed cache module, a frame control encoding module, a processor module with a file system, and a static state memory module, wherein the video analysis module, the frame control encoding module and the processor module with the file system are connected with the high-speed cache module; and the static memory module is governed by the processor with the file system. The portable video signal collecting device has the following beneficial effects that display equipment application of an SDI signal is not wider than that the DVI display equipment, and the SDI signal is converted into a DVI signal by people, so as to be convenient to analyze by a worker at any time and any wheel. In order to achieve each frame capture treatment, operating personnel can make the video slow and the frame still by setting, so as to analyze a video image from a still picture.

Description

A kind of 3G-SDI/DVI portable video signal pickup assembly
Technical field
The utility model relates to the video acquisition analysis field, more particularly, relates to a kind of serial digital signal of 3G-SDI(3Gbps transmission rate) and the DVI(digital visual interface) harvester of portable high-definition digital video signal.
Background technology
At present, in China's field of broadcast televisions, 3G-SDI signal application trend is originally brighter and clearer, the equipment of the compatible 3G-SDI signal of the release that the equipment supplier can race against time oneself.When using, tend to occur some unexpected wrong effects after omnifarious equipment cascading, these phenomenons are often written in water, can't flutter and catch, cause can't problem analysis reason, thereby can not deal with problems normally.The attendant of equipment is not the provider of equipment, is not more the equipment research staff, when pinpointing the problems, and good problem identificatioin place.And the data volume of 3G-SDI/DVI signal is huge, in the huge frame of video of data volume, is difficult to the find problem frame and also problem frame single frames is extracted.
Therefore need a kind of video signal acquisition device, this device can without computer, without the special occasions monitor video signal of external power supply, after vision signal goes wrong effect, can will be analyzed to the backstage after the storage of problem video flowing, perhaps transfer the technical staff to, in order to deal with problems.
Summary of the invention
The utility model is for the proposition of above problem, and develops a kind of 3G-SDI/DVI portable video signal pickup assembly.
A kind of 3G-SDI/DVI portable video signal pickup assembly is characterized in that, comprises
SDI vision signal to receiving terminal is carried out equilibrium treatment, and the serial video signal after equilibrium is converted to parallel video signal, and obtains the video parsing module of the positional information of video flowing place frame of video;
After calculating memory write address from the positional information of the video flowing place frame of video of video parsing module and self stored parameter, with the circulate cache module of storage of parallel video signal;
To output to the DVI coding chip after the parallel video signal direct coding from cache module, the frame control-register code module that each frame of parallel video signal is monitored;
When monitoring the problem frame, control by man-machine interface, extract cache module with the processor module of the tape file system of the parallel video signal in current internal memory;
The static storage module that parallel video signal in the processor module of tape file system is stored;
Wherein, the processor module of video parsing module, frame control-register code module, tape file system all is connected with cache module, and the static storage module is by the processor module domination of tape file system.
Preferably, described video parsing module is to analyze the logical block of video according to the FPGA that the feature of SMPTE standard realizes.
Preferably, described cache module comprises internal memory and Memory Controller Hub, saves as the DDR3 memory bar in described.
Preferably, described cache module comprises that also preposition inner FIFO, rear class inside goes out FIFO and rear class inside enters FIFO.
Preferably, the processor module of tape file system is Nois II controller.
Preferably, the static storage module is the SD card.
Enforcement the utlity model has following beneficial effect: (1) utilizes the internal memory circulation storage 3G-SDI/DVI vision signal in cache module, and by displaying video, the 3G-SDI/DVI vision signal in internal memory is monitored, when pinpointing the problems frame, store the 3G-SDI/DVI vision signal in current internal memory into the static storage module, so that technical staff's later stage is analyzed by the 3G-SDI/DVI vision signal in the static storage module is taken out; (2) by with parallel video signal with after the positional information of video flowing place frame of video is carried out bit width conversion together be sent to cache module, avoid the waste of memory headroom; (3) adopt the mode of times frame, frame-skipping or quiet frame that parallel video signal is sent in the DVI coding chip by control frame control-register code module and export so that the technical staff by put slowly, F.F. or quiet frame come better problem analysis frame; (4) display device of sdi signal is used does not have the DVI display device extensive, we change into the DVI signal with sdi signal, facilitate the staff to analyze whenever and wherever possible, flutter the processing of catching in order to realize each frame, operating personnel can make video put slowly and quiet frame by setting, thereby analyze video image in static picture.
Description of drawings
Fig. 1 is the hardware configuration schematic diagram of realizing an embodiment of 3G-SDI/DVI portable video signal pickup assembly of the present utility model;
Fig. 2 is the method flow diagram of bit width conversion of an embodiment of 3G-SDI/DVI portable video signal pickup assembly of the present utility model;
Fig. 3 is the hardware system figure that realizes an embodiment of 3G-SDI/DVI portable video signal pickup assembly of the present utility model.
Embodiment
The utility model provides a kind of 3G-SDI/DVI portable video signal pickup assembly, this device can carry out the collection analysis buffer memory to 3Gbps high-definition digital video/audio signal, and support the HD(high definition) digital video signal and SD(single-definition) digital video signal, when the problem video image occured, collecting device stored the data in buffer memory in the static storage module into.Can pass through DVI playback output function problem analysis video afterwards, also the problem video data in the static storage module can be copied in computer and analyze.
Fig. 1 is the hardware configuration schematic diagram of realizing an embodiment of 3G-SDI/DVI portable video signal pickup assembly of the present utility model, as shown in the figure.The hardware configuration of realizing the utility model 3G-SDI/DVI portable video signal pickup assembly comprises the SDI vision signal of receiving terminal is carried out equilibrium treatment, serial video signal after equilibrium is converted to parallel video signal, and obtains the video parsing module of the positional information of video flowing place frame of video; After calculating memory write address from the positional information of the video flowing place frame of video of video parsing module and self stored parameter, with the circulate cache module of storage of parallel video signal; To output to the DVI coding chip after the parallel video signal direct coding from cache module, the frame control-register code module that each frame of parallel video signal is monitored; When monitoring the problem frame, control by man-machine interface, extract cache module with the processor module of the tape file system of the parallel video signal in current internal memory; The static storage module that parallel video signal in the processor module of tape file system is stored; Wherein, the processor module of video parsing module, frame control-register code module, tape file system all is connected with cache module, and the static storage module is by the processor module domination of tape file system.
The function of modules is as follows respectively:
The video parsing module is used for the SDI vision signal of receiving terminal is carried out equilibrium treatment; Serial video signal after equilibrium gone here and there and be converted to parallel video signal, and analyzing the positional information that video obtains video flowing place frame of video.
Cache module comprises internal memory and Memory Controller Hub, be used for the real-time operation of high-speed data is processed, what use in native system is Cyclone IV Series FPGA, use perhaps more that the FPGA of high performance series controls 4G/8G capacity DDR3 internal memory, this module core is the controller of DDR3 internal memory.He processes the frame of video that the video parsing module sends, and calculates present data places memory address, and the storage that circulates also can be read back the data in internal memory and send to the processor module of tape file system simultaneously.Acquisition module with the SDI vision signal go here and there turn and after, analysis module is with the frame of video sequence of aliging, Memory Controller Hub in cache module is also said according to the internal memory alignment techniques of self research and development that frame of video is regular and is stored in memory bar, and the storage that circulates, the length of cache-time depends on the form of size and the SDI vision signal of internal memory, and Memory Controller Hub is according to the stored boundary of agreement video stream format custom video.Guarantee correctly to take out the complete one-frame video data of random time section.
The processor module of tape file system is the control processor of whole equipment, he carries out work by the instruction that man-machine interface obtains, the Video Data Storage that cache module is sent arrives the static storage module, also the file data in the static storage module can be read, and be passed in cache module and go; The static storage module is with file system, and described file system can be the file system of arbitrary format, such as FAT file system or FAT32 file system or new technology file system etc.
Frame control-register code module, Data Source has two passages, and first passage is that the data direct coding that the video parsing module sends is outputed in the DVI interface, just realizes the premonitoring function; Second passage is directly that cache module is connected, and by calculating the frame address of reading of internal memory, allows cache module transmit frame data in internal memory according to cycle of frame control-register code module and instruction, speed broadcast and quiet frame that so just can achieve frame.
The static storage module is the place of finally preserving video data, read in order to improve on compatible and PC, support the file system of arbitrary format, comprise the FAT file system, can video data be write in hard disk by card reader, simultaneously by tape file system processor module is read and is written in cache module.
As an embodiment of the present utility model, described video parsing module is to analyze the logical block of video according to the FPGA of the feature realization of SMPTE standard; Described cache module comprises internal memory and Memory Controller Hub, saves as the DDR3 memory bar in described; Described cache module comprises that also preposition inner FIFO, rear class inside goes out FIFO and rear class inside enters FIFO; The processor module of tape file system is Nois II controller.The static storage module is the SD card.
the central principle of device of the present utility model is: after the DVI output video, when former video monitor is pinpointed the problems video, pass through button operation, Memory Controller Hub in cache module will stop and will write video information in internal memory, the problem Video Data Storage that this section is complete at this moment is in internal memory, Memory Controller Hub takes out the video-frequency band data in internal memory on the I/O Parallel of the processor module that is submitted to the tape file system according to the order of frame according to time sequencing, the processor module of tape file system stores video flowing in the static storage module into, so that permanent storage.when the problem video flowing is analyzed, only need the DVI output is received on the display of supporting the DVI interface, operating equipment, select playback file, the processor module of tape file system is read the corresponding document in the static storage module on the I/O Parallel that is sent to cache module, Memory Controller Hub will switch to from acquisition channel data on I/O Parallel will be stored into internal memory, after storage finishes, the frame number rate that the Memory Controller Hub piece will be set according to the user, frame data to memory bar carry out reading and sending to frame control-register code module, last frame control-register code module sends to data in the DVI coding chip, realize DVI output.Can see video image slowly by regulating playback rate in display, make the easier problem identificatioin frame of video of operator, and by operation, image is carried out quiet frame or frame-skipping.
The method that adopts 3G-SDI/DVI portable video signal pickup assembly of the present utility model to carry out video acquisition comprises the analytical procedure of storing step and the problem frame of problem frame.
The storing step of problem frame is as follows:
1) the video parsing module carries out equilibrium treatment to the SDI vision signal of receiving terminal, serial video signal after equilibrium is converted to parallel video signal, and obtain the positional information of video flowing place frame of video, then be sent to cache module together with the positional information of parallel video signal and video flowing place frame of video;
2) after cache module is calculated memory write address according to the positional information of video flowing place frame of video and self stored parameter, with the parallel video signal storage that circulates, and parallel video signal is sent to frame control-register code module;
3) frame control-register code module will output to the DVI coding chip after the parallel video signal direct coding from cache module, and each frame of parallel video signal is monitored;
4) when monitoring the problem frame, control cache module by man-machine interface and the parallel video signal in current internal memory is sent to the processor module of tape file system;
5) processor module of tape file system is sent to the static storage module with parallel video signal and stores.
The analytical procedure of problem frame is as follows:
6) processor module of controlling the tape file system by man-machine interface is read the parallel video signal of storing in the static storage module according to rule, and stores in the internal memory of cache module;
7) cache module sends parallel video signal with the form of frame to frame control-register code module according to the parameters of frame control-register code module;
8) frame control-register code module sends to parallel video signal in the DVI coding chip and exports.
As optimal technical scheme of the present utility model, described cache module comprises that also preposition inner FIFO, rear class inside goes out FIFO and rear class inside enters FIFO.Going out FIFO and rear class inside by preposition inner FIFO, rear class inside enters FIFO and can realize the positional information of parallel video signal and video flowing place frame of video is carried out bit width conversion.The bit width conversion rule is as follows: the internal storage data bit wide of establishing in cache module is a, and the data bit width of parallel video signal is b, gets c group parallel video signal and stores in d memory address, and wherein, c, d are two remainders of the common multiple of a, b, and c>d.
Fig. 2 is the method flow diagram of bit width conversion of an embodiment of 3G-SDI/DVI portable video signal pickup assembly of the present utility model, as shown in the figure.the SDI vision signal that collects is the 20bit parallel data, directly store in internal memory and will waste most of memory headroom, after converting 16 groups of 20bit data bit widths to the 320bit buffer memory by clock signal 16x CLK, just 5 integral multiples of memory bandwidth have been become, so the clock signal of utilization (16/5) x CLK is divided into 320bit in the preposition inner FIFO buffer (64bit) that 5 deciles store DDR3 controller (the DDR3 controller is the Memory Controller Hub in cache module) into, wait for the storage of DDR3 internal memory (the DDR3 internal memory is the internal memory in cache module).The DDR3 controller directly outputs to rear class inside with the data in internal memory and goes out in FIFO buffer (64bit), and rear class bit wide revolving die piece resolves into 8 bytes with the band data of 64bit and sends to controller to wait for static storage; In like manner, controller forms according to every 8 bytes rear class inside that 64bit data send to the DDR3 controller with the data reading of static storage to enter FIFO buffer (64bit) medium to be read.
As optimal technical scheme of the present utility model, in step 8), frame control-register code module adopts the mode of times frame, frame-skipping or quiet frame that parallel video signal is sent in the DVI coding chip and exports, thereby the speed of realizing vision signal is play and the broadcast of quiet frame.
The principle that the speed of vision signal is play and quiet frame is play is as follows:
Controller imports to bus with the file data in static memory and gets on, Memory Controller Hub with the data on bus according to the sequential storage of frame in the DDR3 memory bar, wait for that the internal memory that the frame of video control module is sent reads parameter, then the frame of video in the DDR3 memory bar is read.The frame of video control module requires output video frame in the DVI coding chip according to setting.
Fig. 3 is the hardware system figure that realizes an embodiment of 3G-SDI/DVI portable video signal pickup assembly of the present utility model, as shown in the figure.
The pll clock system carries out clock control to whole hardware system, the video parsing module receives the SDI vision signal by video interface, the video data that frame control-register code module outputs in the DVI coding chip is set form, 1920x1080@60Hz for example, for accomplishing the effect of putting slowly and putting soon and supporting real-time quiet frame function, frame control-register code module adopts the mode of times frame and frame-skipping, namely change the reading times of each frame in DDR3 internal memory (being shown SO-DIMM204 in figure) is reached slowly and put, in like manner change frame-skipping in the DDR3 internal memory is read to reach soon and put.Frame control-register code module obtains the configuration parameter on the Avalon bus, namely play the speed of frame, calculating need to be to broadcast repeat number or the frame-skipping number of each frame, and the frame head address of calculating each frame, and begin video data is counted, when the DDR3 controller reaches full frame with the video data counting, continue to read on the memory address of notifying the DDR3 controller to be transferred to the next frame that need to play.After quiet frame instruction sends to the frame of video control module, the frame of video control module will repeat said process, and keep next frame place DDR3 data address constant, reach the purpose of quiet frame.
In this example, the outside high speed DDR3 internal memory of hardware use (large capacity internal memory) of realizing of the present utility model, can store the full HD digital of digital video data up to the 3Gbps transmission rate, the capacity of DDR3 internal memory has directly determined to gather the length of SDI video, we adopt the highest storage SD of 4G capacity SO-DIMM204P DDR3 memory bar SD up to 121 seconds, HD-SDI was up to 22 seconds, and the 3G signal also can reach 11 seconds, and can improve by the cascade system of DDR3 these numerical value.
In the present embodiment, the data storage in video data acquiring stage of the present utility model is not with the direct static storage of video data, Memory Controller Hub stores the parallel video datacycle of input in the DDR3 internal memory into, and the video image that broadcast in real time collects in the DVI output interface, when the staff detects the problem image, the video data that processor module by the tape file system will be cached in internal memory carries out static storage, in the present embodiment, namely store in the SD card by the SD draw-in groove, reached the purpose of acquisition problems video image.In the present embodiment, the processor module of tape file system is Nois II processor, with file system be the FAT file system, connect synchronous DRAM by the SDRAM draw-in groove.
In the present embodiment, of the present utility modelly realize having transplanted in hardware the FAT file system, all operations system of PC all supports the FAT file system, can copy storage file to computer hard disc by very simple mode and get on.Avoided like this utilizing independent sampling instrument or software, simplified the troublesome operation step.Video image analysis software in computer can the next data of easier analysis collection.
Adopt frame to control play-back technology, by controlling the read-write rule of the frame in internal memory, achieve frame is controlled effect, of the present utility modelly realize that putting slowly quiet frame function in hardware is to provide the most direct analytical method to the analyst, find problem place and quiet frame by putting slowly, carefully analyze the image of each frame, point out more intuitively the problem place.
The utility model is portable set, power consumption and volume depend on System design, system adopts the high Cyclone IV Series FPGA of low-power consumption integrated level, and with all module integrations in this chip, more controller is put in FPGA, embody like this cost and the low-power consumption advantage of high integration, also reduced the pressure of system's lithium battery, reduced simultaneously the volume and weight of handheld device.
The beneficial effects of the utility model are: utilize memory bar to carry out circular buffer to the video up to the 3Gbps transmission rate that gathers, this is because the very inaccessible storage speed of other non-volatile memory device, and because the video data volume is huge, so collecting device all can not the mass memory high-speed video stream, and the video data of memory size size has surpassed us and has been used for the video length analyzed.This part buffer memory video segment can be turned according to operator's setting and store in the static storage module, realize that Nonvolatile data preserves.The display device of sdi signal is used does not have the DVI display device extensive, we change into the DVI signal with sdi signal, facilitate the staff to analyze whenever and wherever possible, flutter the processing of catching in order to realize each frame, operating personnel can make video put slowly and quiet frame by setting, thereby analyze video image in static picture.The staff can also select to utilize special-purpose video analysis software that the video data in the static storage module is carried out particular analysis.
The above; it is only the better embodiment of the utility model; but protection range of the present utility model is not limited to this; anyly be familiar with those skilled in the art in the technical scope that the utility model discloses; be equal to replacement or changed according to the technical solution of the utility model and inventive concept thereof, within all should being encompassed in protection range of the present utility model.

Claims (6)

1. a 3G-SDI/DVI portable video signal pickup assembly, is characterized in that, comprises
SDI vision signal to receiving terminal is carried out equilibrium treatment, and the serial video signal after equilibrium is converted to parallel video signal, and obtains the video parsing module of the positional information of video flowing place frame of video;
After calculating memory write address from the positional information of the video flowing place frame of video of video parsing module and self stored parameter, with the circulate cache module of storage of parallel video signal;
To output to the DVI coding chip after the parallel video signal direct coding from cache module, the frame control-register code module that each frame of parallel video signal is monitored;
When monitoring the problem frame, control by man-machine interface, extract cache module with the processor module of the tape file system of the parallel video signal in current internal memory;
The static storage module that parallel video signal in the processor module of tape file system is stored;
Wherein, the processor module of video parsing module, frame control-register code module, tape file system all is connected with cache module, and the static storage module is by the processor module domination of tape file system.
2. 3G-SDI/DVI portable video signal pickup assembly according to claim 1, is characterized in that, described video parsing module is to analyze the logical block of video according to the FPGA of the feature realization of SMPTE standard.
3. 3G-SDI/DVI portable video signal pickup assembly according to claim 1, is characterized in that, described cache module comprises internal memory and Memory Controller Hub, saves as the DDR3 memory bar in described.
4. 3G-SDI/DVI portable video signal pickup assembly according to claim 3, is characterized in that, described cache module comprises that also preposition inner FIFO, rear class inside goes out FIFO and rear class inside enters FIFO.
5. 3G-SDI/DVI portable video signal pickup assembly according to claim 1, is characterized in that, the processor module of tape file system is Nois II controller.
6. 3G-SDI/DVI portable video signal pickup assembly according to claim 1, is characterized in that, the static storage module is the SD card.
CN 201220703490 2012-12-18 2012-12-18 Portable video signal collecting device of 3G-SDI/DVI (3Gbps serial digital interface/digital video interface) Expired - Fee Related CN203027375U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104636974A (en) * 2015-02-13 2015-05-20 吴凡 Real-time processing system and real-time processing method for information unit set

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104636974A (en) * 2015-02-13 2015-05-20 吴凡 Real-time processing system and real-time processing method for information unit set
CN104636974B (en) * 2015-02-13 2018-01-09 吴凡 A kind of real time processing system and its method of information unit set

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