CN104717444A - Method of automatically converting video of multiple formats to VESA (Video Electronics Standards Association)-protocol 1920*1440-resolution 75Hz-frame rate video - Google Patents
Method of automatically converting video of multiple formats to VESA (Video Electronics Standards Association)-protocol 1920*1440-resolution 75Hz-frame rate video Download PDFInfo
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Abstract
The invention relates to a method of automatically converting video of multiple formats to VESA (Video Electronics Standards Association)-protocol 1920*1440-resolution 75Hz-frame rate video. The method comprises the following steps: 1, an automatic conversion system is built; 2, inputted video signals are sent to protocol detection modules respectively; 3, high-level enable signals CEn drive a protocol N acquisition unit corresponding to the protocol N detection unit to acquire effective pixels of the inputted video signals; 4, high-level enable signals CEn serve as control semaphore of a multi-way selection switch controller; 5, a scaling processing module scales the effective pixels to have a resolution of 1920*1440, and the scaled pixels are written to a storage unit; and 6, a sending control unit realizes conversion of the inputted video to the VESA-protocol 1920*1440-resolution 75Hz-frame rate video. According to the method of the invention, the integrated problem of converting video of any protocol type to video of a PAL system can be solved, video of any protocol type and resolution can be automatically converted to video in line with a VESA format, and time consumption for video format conversion is small.
Description
Technical field
The invention belongs to Video processing, graph image field, be specifically related to the automatic switching method of a kind of many video formats to VESA agreement 1920X1440 resolution 75Hz frame-rate video.
Background technology
VESA (Video Electronics Standards Association) monitor sequential standard is a kind of digitized video interface protocol, the ability of the support 1920X1440 resolution 75Hz frame per second image transmission that it is powerful, makes it often as the general output interface of optoelectronic integration system HD video.But for existing vision sensor, video protocols and the resolution of its output are different, therefore sometimes often need the video of the various agreements exported by vision sensor carry out format conversion and be scaled the resolution of 1920X1440; Although occurred that various video format is to the chip meeting the various resolution video conversion of VESA agreement at present, this kind of chip has often only been supported encoding and decoding that are a kind of or a class input video.
Along with the development of electronic technology, large scale integrated circuit, adopt field programmable gate array (FPGA) to realize complicated control and processing capacity has very large advantage in integration, stability and reliability etc., the various video form studied based on FPGA has broad application prospects to the automatic switching control method of the 1920X1440 resolution 75Hz frame-rate video meeting VESA agreement.
Summary of the invention
The present invention is the integration problem that the video in order to solve any protocol type is changed to the 1920X1440 resolution 75Hz frame-rate video meeting VESA agreement, proposes the automatic switching method of a kind of many video formats to VESA agreement 1920X1440 resolution 75Hz video.
Technical solution of the present invention:
Many video formats are to the automatic switching method of VESA agreement 1920X1440 resolution 75Hz frame-rate video, and its special character is, comprises the following steps:
1] automated conversion system is created:
Comprise protocol detection module: for carrying out agreement coupling to incoming video signal, and produce high level enable signal CEn or low-level enable signal according to matching result, comprise agreement 1 detecting unit, agreement 2 detecting unit ... and agreement N detecting unit;
Video acquisition module: gather the valid pixel of the incoming video signal matched through protocol detection module, comprises agreement 1 collecting unit, agreement 2 collecting unit ... and agreement N collecting unit; The collecting unit of various agreement and detecting unit one_to_one corresponding, described high level enable signal CEn inputs to the agreement N collecting unit of correspondence and multidiameter option switch controller;
Multidiameter option switch controller: under the control of high level enable signal CEn, buffers into collection memory cell by the effective pixel data that the video acquisition module that agreement is mated collects;
Gather memory cell: for the effective pixel data of buffer memory incoming video signal;
Convergent-divergent processing module: read effective pixel data for real time sequence from collection memory cell and adopt bilinear interpolation algorithm to be scaled the resolution sizes of 1920*1440, sending it to output memory cell simultaneously;
Export memory cell: for storing the effective pixel data after the process of convergent-divergent processing module;
And transmission control module: for producing the control pixel stream in video blanking district according to VESA agreement 1920X1440 resolution 75Hz frame-rate video sequential standard, and read the pixel data after convergent-divergent from exporting order memory cell, be filled into the effective pixel region of video data stream, thus realize the conversion of input video to VESA agreement 1920X1440 resolution 75Hz video;
2] vision signal of input is sent in protocol detection module respectively detects in each protocol detection unit, if the vision signal of input is mated with the agreement of this agreement N detecting unit, then this agreement N detecting unit produces the enable signal CEn of high level, and all the other protocol detection unit produce low-level enable signal simultaneously;
3] high level enable signal CEn drives the valid pixel of the agreement N collecting unit Gather and input vision signal corresponding with agreement N detecting unit; Low-level enable signal makes to be in reset mode with the agreement collecting unit corresponding to it simultaneously;
4] high level enable signal CE is as the control signal amount of multidiameter option switch controller, makes a valid pixel of the vision signal of the agreement N collecting unit collection of protocols having coupling by multidiameter option switch controller cache to gathering memory cell;
5] convergent-divergent processing module is from the effective pixel data gathering memory cell order reading whole frame, and adopts bilinear interpolation algorithm to be scaled the resolution sizes of 1920*1440, is write simultaneously and exports memory cell;
6] control module produces video blanking district control pixel stream according to VESA agreement 1920X1440 resolution 75Hz frame-rate video sequential standard is sent, and read the pixel data after convergent-divergent from exporting order memory cell, be filled into the effective pixel region of video data stream, thus realize the conversion of input video to VESA agreement 1920X1440 resolution 75Hz video.
Protocol detection module and video acquisition module work according to the mode of parallel pipelining process, synchronously mate with each protocol detection unit, and produce matching result when frame of video end of input simultaneously.
Above-mentioned collection memory cell comprises buffering area A and buffering area B: concrete storing step is:
When current video frame data are stored into buffering area A, the previous frame video data reading storage from the B of buffering area sends to convergent-divergent processing module;
When next frame video data is stored into buffering B, the data reading current video frame from the A of buffering area send to convergent-divergent processing module.
The real-time analysis of above-mentioned protocol detection module also calculates the following protocol status parameter of input video stream: the line synchronizing signal Hsync pulse number comprised between opposite field synchronizing signal Vsync pulse; The line synchronizing signal Hsync pulse number comprised in field sync signal Vsync pulse width range; The pixel clock clk cycle number comprised between adjacent lines synchronizing signal Hsync pulse; The pixel clock clk cycle number comprised in line synchronizing signal Hsync pulse width range; The pixel clock clk cycle number comprised in data valid signal De pulse duration during valid pixel is capable; From field sync signal Vsync impulse hits play first valid pixel capable between the line synchronizing signal Hsync pulse number that comprises; Play the pixel clock clk cycle counting comprised between data valid signal De from line synchronizing signal pulse Hsync saltus step during valid pixel is capable.
Above-mentioned protocol detection module comprise the VESA protocol video detecting unit of various resolution, various resolution RawRGB format video detecting unit, meet the video detecting unit of SMPTE274 agreement, meet the detecting unit of ITU601, ITU656 and ITU709 protocol video; Described video acquisition module comprise the VESA protocol video collecting unit of various resolution, various resolution RawRGB format video collecting unit, meet the video acquisition unit of SMPTE274 agreement, meet the collecting unit of ITU601, ITU656 and ITU709 protocol video; And detectable protocol type independently can customize and cutting according to embody rule demand.
Above-mentioned steps 2] concrete steps be:
2.1] real-time synchronization calculates each state parameter of incoming video signal:
2.2] state parameter of each state parameter calculated with each agreement of corresponding protocol detection module is contrasted: if state parameter is consistent, then inputting video data belongs to this kind of agreement; Otherwise, then this kind of agreement is not belonged to.
The invention has the beneficial effects as follows:
The video of any protocol type and resolution can be automatically converted to and meet VESA agreement 1920X1440 resolution 75Hz frame-rate video, and video format conversion is consuming time little; Dynamic detects the change of video protocols, after input source video protocols changes, can complete the detection to its protocol type within the time interval of a two field picture input; Detectable protocol type independently can customize and cutting according to embody rule demand.
Accompanying drawing explanation
Fig. 1 is the automatic switching method schematic diagram of many video formats to VESA agreement 1920X1440 resolution 75Hz frame-rate video.
Embodiment
The present invention adopts FPGA to realize the automatic switching method of many video formats to VESA agreement 1920X1440 resolution 75Hz frame-rate video, by setting up many general video protocol data storehouse, the data flow of incoming video signal is analyzed, with protocol type belonging to various conventional video protocol data stream multilevel iudge, detected image resolution and frame per second simultaneously; Design drawing picture frame double buffering A and B, adopt the mode of ping-pong operation by the valid pixel of video stream data frame stored in buffering area A, simultaneously according to the resolution of image to the complete data frame of buffer memory in the B of buffering area adopt bilinear interpolation algorithm be scaled 1920*1440 resolution sizes and stored in output memory cell; The control pixel stream in video blanking district is produced according to VESA agreement 1920X1440 resolution 75Hz frame-rate video sequential standard, and read the pixel data after convergent-divergent from exporting order memory cell, be filled into the effective pixel region of video data stream, thus realize the conversion of input video to VESA agreement 1920X1440 resolution 75Hz video;
Realize details specific as follows:
1] design is for the detection module of various conventional video protocols (comprising the VESA agreement of various resolution, the RawRGB form of various resolution, ITU601, ITU656, ITU709 and SMPTE274 agreement), detection module, by the time interval of an analysis full frame images expert field sync signal and the Changing Pattern of blanking zone video data, judges whether input video belongs to this kind of agreement;
Detection module arranges the state parameter of following video protocols, be respectively: line synchronizing signal (Hsync) pulse number comprised between opposite field synchronizing signal (Vsync) pulse, the Hsync pulse number comprised in Vsync pulse width range, pixel clock (CLK) cycle count comprised between adjacent Hsync pulse, the clk cycle counting comprised in Hsync pulse width range, the clk cycle pulse number comprised in data valid signal (De) pulse duration during valid pixel is capable, from the saltus step of Vsync signal pulse play first valid pixel capable between (field blanking district) Hsync pulse number of comprising, during valid pixel is capable from the saltus step of Hsync signal pulse play De signal effectively between (horizontal blanking district) clk cycle counting of comprising,
2] data of input video and control signal wire (CLK, Hsync, Vsync and De) are sent into each video protocols detection module respectively, detection module analyzes the data flow of input picture frame, detect and calculate above-mentioned state parameter, if the parameter detected is consistent with the state parameter of agreement to be detected, then think that input video belongs to this kind of agreement, otherwise, then this kind of agreement is not belonged to; If certain agreement coupling input video, then the detection module of this kind of agreement produces the enable signal CEn of high level, drives the acquisition module of its correspondence; Other protocol detection modules export as low level signal simultaneously, and make video acquisition module corresponding to its rear end place be in reset mode.
3] a multidiameter option switch controller is designed, the CEn exported with each video protocols detection module is for control signal amount, the video data stream that each video protocols acquisition module gathers is input, and gating CEn is that the collection video data stream that high level is corresponding carries out follow-up buffer memory and convergent-divergent process operation;
4] double buffering A and B is designed, the valid pixel of adjacent two two field pictures that buffer memory arrives continuously, ping-pong operation is carried out to buffering area A and B, when current frame image being filled into buffering area A, adopt bilinear interpolation algorithm to be scaled 1920*1440 to the previous frame image of buffer memory in B and differentiate size, and be filled in transmission output memory cell; At subsequent time period, next frame image buffer storage is entered buffering area B and bilinear interpolation process is carried out to the picture frame in the A of buffering area and exports memory cell stored in transmission;
5] the control pixel stream in video blanking district is produced according to VESA agreement 1920X1440 resolution 75Hz frame-rate video sequential standard, and read the pixel data after convergent-divergent from exporting order memory cell, be filled into the effective pixel region of video data stream, thus realize the conversion of input video to VESA agreement 1920X1440 resolution 75Hz video.
Automatic switching control method of the present invention is successful implementation in certain type test module, can the vision signal of the agreement such as Real-time and Dynamic Detection RawRGB, BT.656, BT.709, SMPTE273 and SMPTE274, automatically complete video scaling process and unify to be converted to the 1920X1440 resolution 75Hz video meeting VESA agreement, the processing speed of Video Quality Metric is fast, exports steady and audible.
Claims (6)
1. video format more than, to the automatic switching method of VESA agreement 1920X1440 resolution 75Hz frame-rate video, is characterized in that, comprises the following steps:
1] automated conversion system is created:
Comprise protocol detection module: for carrying out agreement coupling to incoming video signal, and produce high level enable signal CEn or low-level enable signal according to matching result, comprise agreement 1 detecting unit, agreement 2 detecting unit ... and agreement N detecting unit;
Video acquisition module: gather the valid pixel of the incoming video signal matched through protocol detection module, comprises agreement 1 collecting unit, agreement 2 collecting unit ... and agreement N collecting unit; The collecting unit of various agreement and detecting unit one_to_one corresponding, described high level enable signal CEn inputs to the agreement N collecting unit of correspondence and multidiameter option switch controller;
Multidiameter option switch controller: under the control of high level enable signal CEn, buffers into collection memory cell by the effective pixel data that the video acquisition module that agreement is mated collects;
Gather memory cell: for the effective pixel data of buffer memory incoming video signal;
Convergent-divergent processing module: read effective pixel data for real time sequence from collection memory cell and adopt bilinear interpolation algorithm to be scaled the resolution sizes of 1920*1440, sending it to output memory cell simultaneously;
Export memory cell: for storing the effective pixel data after the process of convergent-divergent processing module;
And transmission control module: for producing the control pixel stream in video blanking district according to VESA agreement 1920X1440 resolution 75Hz frame-rate video sequential standard, and read the pixel data after convergent-divergent from exporting order memory cell, be filled into the effective pixel region of video data stream, thus realize the conversion of input video to VESA agreement 1920X1440 resolution 75Hz video;
2] vision signal of input is sent in protocol detection module respectively detects in each protocol detection unit, if the vision signal of input is mated with the agreement of this agreement N detecting unit, then this agreement N detecting unit produces the enable signal CEn of high level, and all the other protocol detection unit produce low-level enable signal simultaneously;
3] high level enable signal CEn drives the valid pixel of the agreement N collecting unit Gather and input vision signal corresponding with agreement N detecting unit; Low-level enable signal makes to be in reset mode with the agreement collecting unit corresponding to it simultaneously;
4] high level enable signal CEn is as the control signal amount of multidiameter option switch controller, makes a valid pixel of the vision signal of the agreement N collecting unit collection of protocols having coupling by multidiameter option switch controller cache to gathering memory cell;
5] convergent-divergent processing module is from the effective pixel data gathering memory cell order reading whole frame, and adopts bilinear interpolation algorithm to be scaled the resolution sizes of 1920*1440, is write simultaneously and exports memory cell;
6] control module produces video blanking district control pixel stream according to VESA agreement 1920X1440 resolution 75Hz frame-rate video sequential standard is sent, and read the pixel data after convergent-divergent from exporting order memory cell, be filled into the effective pixel region of video data stream, thus realize the conversion of input video to VESA agreement 1920X1440 resolution 75Hz video.
2. many video formats according to claim 1 are to the automatic switching method of VESA agreement 1920X1440 resolution 75Hz frame-rate video, it is characterized in that, protocol detection module and video acquisition module work according to the mode of parallel pipelining process, synchronously mate with each protocol detection unit, and produce matching result when frame of video end of input simultaneously.
3. many video formats according to claim 1 and 2 are to the automatic switching method of VESA agreement 1920X1440 resolution 75Hz frame-rate video, it is characterized in that, described collection memory cell comprises buffering area A and buffering area B: concrete storing step is:
When current video frame data are stored into buffering area A, the previous frame video data reading storage from the B of buffering area sends to convergent-divergent processing module;
When next frame video data is stored into buffering B, the data reading current video frame from the A of buffering area send to convergent-divergent processing module.
4. many video formats according to claim 3 are to the automatic switching method of VESA agreement 1920X1440 resolution 75Hz frame-rate video, it is characterized in that,
The real-time analysis of described protocol detection module also calculates the following protocol status parameter of input video stream: the line synchronizing signal Hsync pulse number comprised between opposite field synchronizing signal Vsync pulse; The line synchronizing signal Hsync pulse number comprised in field sync signal Vsync pulse width range; The pixel clock clk cycle number comprised between adjacent lines synchronizing signal Hsync pulse; The pixel clock clk cycle number comprised in line synchronizing signal Hsync pulse width range; The pixel clock clk cycle number comprised in data valid signal De pulse duration during valid pixel is capable; From field sync signal Vsync impulse hits play first valid pixel capable between the line synchronizing signal Hsync pulse number that comprises; Play the pixel clock clk cycle counting comprised between data valid signal De from line synchronizing signal pulse Hsync saltus step during valid pixel is capable.
5. many video formats according to claim 4 are to the automatic switching method of VESA agreement 1920X1440 resolution 75Hz frame-rate video, it is characterized in that:
Described protocol detection module comprise the VESA protocol video detecting unit of various resolution, various resolution RawRGB format video detecting unit, meet the video detecting unit of SMPTE274 agreement, meet the detecting unit of ITU601, ITU656 and ITU709 protocol video; Described video acquisition module comprise the VESA protocol video collecting unit of various resolution, various resolution RawRGB format video collecting unit, meet the video acquisition unit of SMPTE274 agreement, meet the collecting unit of ITU601, ITU656 and ITU709 protocol video; And detectable protocol type independently can customize and cutting according to embody rule demand.
6. many video formats according to claim 5 are to the automatic switching method of VESA agreement 1920X1440 resolution 75Hz frame-rate video, it is characterized in that,
Described step 2] concrete steps be:
2.1] real-time synchronization calculates each state parameter of incoming video signal:
2.2] state parameter of each state parameter calculated with each agreement of corresponding protocol detection module is contrasted: if state parameter is consistent, then inputting video data belongs to this kind of agreement; Otherwise, then this kind of agreement is not belonged to.
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