CN203020723U - Pocket structure of carrier tape of integrated circuit component - Google Patents
Pocket structure of carrier tape of integrated circuit component Download PDFInfo
- Publication number
- CN203020723U CN203020723U CN 201220691811 CN201220691811U CN203020723U CN 203020723 U CN203020723 U CN 203020723U CN 201220691811 CN201220691811 CN 201220691811 CN 201220691811 U CN201220691811 U CN 201220691811U CN 203020723 U CN203020723 U CN 203020723U
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- CN
- China
- Prior art keywords
- integrated circuit
- circuit component
- step surface
- carrier tape
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Abstract
The utility model provides a pocket structure of a carrier tape of an integrated circuit component. The pocket structure of the carrier tape of the integrated circuit component comprises a pocket bottom plane and a side wall, inspection holes are formed in the center of the pocket bottom plane, the pocket bottom plane is a step surface formed by an upper step surface and a lower step surface, and the upper step surface is higher than the lower step surface. By arranging the lower step surface, the pocket structure of the carrier tape of the integrated circuit component can enable a certain clearance to be formed between the pins of a chip and the pocket bottom plane to provide a moving space for the pins, and the pins cannot deform under press. A fixing function is played to a integrated circuit component by arranging a locating boss, and the integrated circuit component is prevented from swaying everywhere inside the pocket and generating deformation damage when bearing impact of external force or being squeezed. The locating boss plays the function of fool proof at the same time, namely, the integrated circuit component can be prevented from being reversely installed.
Description
Technical field
The utility model belongs to integrated circuit integrated circuit component packing technique field, relates to a kind of bag structure of integrated circuit component carrying belt.
Background technology
The electronic component carrying belt is widely used in electronic devices and components, quartz conductor patch type electronic component, such as packing, carrying and the conveying of IC, diode, aerotron, resistance, electric capacity etc.Fig. 1 is the carrying belt schematic diagram that is widely used at present integrated circuit component (IC chip) packaging and testing industry, and it mainly is comprised of several pockets 1 and edge 3, and there is the hole 13 of detection at bag 11 centers, baseplane of pocket 1, and integrated circuit component 2 is positioned in pocket 1.in use mainly there are two large defectives in the bag structure of this carrying belt: 1), as shown in Fig. 2 and 3, integrated circuit component 2 has plastic-sealed body 21, pin 22 and radiating gill 23 consist of, due to pocket 1 the bag baseplane 11 be horizontal surface, after integrated circuit component 2 is put into, the pin 22 of element directly contacts with a bag baseplane 11, and pin 22 has certain angle θ with a bag baseplane 11, the plastic-sealed body 21 that makes element with bag baseplane 11 not at same plane, when outside vibration-generating or impact, heavier plastic-sealed body 21 first contacts with a bag baseplane 11, and cause pin 22 Bending Damages, 2), in transportation, integrated circuit component 2 can rock because fixing everywhere on the bag baseplane 11 of pocket 1, makes pin 22 and pocket side walls 12 bump, and then pin 22 is occured bending and deformation.
The utility model content
The purpose of this utility model is the problem for the prior art existence, and a kind of integrated circuit component carrying belt bag structure that can effectively protect chip pin not deform and damage is provided.
For this reason, the utility model adopts following technical scheme:
A kind of bag structure of integrated circuit component carrying belt, comprise bag baseplane and sidewall, described bag of center, baseplane is provided with detects the hole, it is characterized in that, described bag baseplane is a step surface that is made of upper terrace and lower terrace surfac, and described upper terrace is higher than lower terrace surfac.
Further, described upper terrace edge is provided with positioning boss.
The beneficial effects of the utility model are: 1) by lower terrace surfac is set, can make between chip pin and pocket bag baseplane and certain space be arranged so that the activity space of pin to be provided, unlikely pin deformation in compression 2) by positioning boss is set, can play fixation to integrated circuit component, prevent that integrated circuit component from rocking everywhere in pocket, produce deformation damage when being subject to external impacts or extruding; 3) positioning boss simultaneously can play foolproof function, when preventing namely that integrated circuit component from packing into by anti-loaded.
Description of drawings
Fig. 1 is the structural representation of existing integrated circuit component carrying belt;
Fig. 2 is pack into structural representation after integrated circuit component of existing carrying belt pocket;
Fig. 3 is that Fig. 2 is along the cutaway view of A-A line;
Fig. 4 is the structural representation of the utility model carrying belt pocket.
The specific embodiment
As shown in Figure 4, a kind of bag structure of integrated circuit component carrying belt comprises bag baseplane 11 and sidewall 12, wherein, bag 11 centers, baseplane are provided with detects hole 13, and bag baseplane 11 is a step surface that is made of upper terrace 111 and lower terrace surfac 112, and upper terrace 111 is higher than lower terrace surfac 112; Upper terrace 111 edges are provided with positioning boss 14.
As shown in Figure 4, after integrated circuit component 2 was packed into, the pin 22 of element was suspended from lower terrace surfac 112 tops, and pin 22 has certain free gap, and pin 22 can deformation in compression when being subject to external impacts or extruding for integrated circuit component 2; By positioning boss 14 is set, can produce position-limiting action to the plastic-sealed body 21 of element, and then integrated circuit component 2 is realized strong fix, prevent that integrated circuit component 2 from rocking everywhere in pocket, damage deforms during pressurized; Simultaneously, positioning boss 14 can also play foolproof function, can the handled easily personnel by the correct direction integrated circuit component 2 of packing into, avoid anti-dress.
Claims (2)
1. the bag structure of an integrated circuit component carrying belt, comprise bag baseplane and sidewall, described bag of center, baseplane is provided with detects the hole, it is characterized in that, described bag baseplane is a step surface that is made of upper terrace and lower terrace surfac, and described upper terrace is higher than lower terrace surfac.
2. the bag structure of a kind of integrated circuit component carrying belt according to claim 1, is characterized in that, described upper terrace edge is provided with positioning boss.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220691811 CN203020723U (en) | 2012-12-14 | 2012-12-14 | Pocket structure of carrier tape of integrated circuit component |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220691811 CN203020723U (en) | 2012-12-14 | 2012-12-14 | Pocket structure of carrier tape of integrated circuit component |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203020723U true CN203020723U (en) | 2013-06-26 |
Family
ID=48644723
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201220691811 Expired - Fee Related CN203020723U (en) | 2012-12-14 | 2012-12-14 | Pocket structure of carrier tape of integrated circuit component |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203020723U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104355045A (en) * | 2014-10-15 | 2015-02-18 | 苏州速腾电子科技有限公司 | Convenient and reliable chip conveying device and assembly line using device |
| CN106081214A (en) * | 2016-08-05 | 2016-11-09 | 深圳市信维通信股份有限公司 | A kind of packaging carrier band and packing method |
-
2012
- 2012-12-14 CN CN 201220691811 patent/CN203020723U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104355045A (en) * | 2014-10-15 | 2015-02-18 | 苏州速腾电子科技有限公司 | Convenient and reliable chip conveying device and assembly line using device |
| CN106081214A (en) * | 2016-08-05 | 2016-11-09 | 深圳市信维通信股份有限公司 | A kind of packaging carrier band and packing method |
| CN106081214B (en) * | 2016-08-05 | 2019-06-21 | 深圳市信维通信股份有限公司 | A kind of packaging carrier band |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130626 Termination date: 20161214 |