CN203014851U - Multi-interface self-adapting radar video digitization processing device - Google Patents
Multi-interface self-adapting radar video digitization processing device Download PDFInfo
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- CN203014851U CN203014851U CN 201220714348 CN201220714348U CN203014851U CN 203014851 U CN203014851 U CN 203014851U CN 201220714348 CN201220714348 CN 201220714348 CN 201220714348 U CN201220714348 U CN 201220714348U CN 203014851 U CN203014851 U CN 203014851U
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Abstract
The utility model discloses a multi-interface self-adapting radar video digitization processing device and relates to the radar video image transmission and display technology field. The device comprises a radar video digitization processing equipment chassis, a power supply and a double-channel radar video digitization processing plate RVDPB-C6-10. The device can execute the following steps that (1) The device receives signals from a plurality of interfaces of the radar and carries out adaptive selection; (2) The device can carry out digital processing and compressed encoding on radar video information after normalization processing; (3) The device can simultaneously process at most two channels of radar videos and publish to whole net users through an Ethernet as a UDP protocol multicast mode; (4) The device can receive state information of a radar antenna and report to a terminal through an network so as to display; terminal equipment can adjust a radar antenna state through a digital quantity interface of the radar video digitization processing equipment; (5) the equipment possesses an online and off-line test function.
Description
Technical field
The utility model relates to the radar video image transmitting and Xian shows Ji Shu Collar territory, belong to a kind of Radar Video Digitization processing unit with many kinds of radar video interface and the adaptively selected corresponding interface of energy, be applied to that the radar video data are carried out Digital Transmission and process.
Background technology
Along with the development of computer technology, scale and the processing speed of all types of flush bonding processors and field programmable gate function are greatly improved.Based on high performance hardware platform, the digitalization compressed of various compression algorithms, particularly real time radar video/decompression algorithm has had the condition that realizes.
The radar video interface is divided into the analog quantity mode: have the echo vision signal, the semaphore such as single-ended or difference master start pulse signal, the single-ended or positive northern signal of difference, single-ended or difference bearing increment signal; Or the assembly coding numeral that data are mixed with azimuth information is measured the RS422 interface: have echo vision signal, difference master's start pulse signal, difference RD data-signal, the semaphores such as difference TD data-signal, difference RD and TD data have comprised bearing data and radar control and state information.
Carrier-borne based on ring sweep, two coordinates of fan sweeping and the radar video interface of three-dimensional radar generally is divided into following two kinds of transmission meanss:
1, analog quantity mode: have the echo vision signal, the semaphores such as single-ended or difference master start pulse signal, the single-ended or positive northern signal of difference, single-ended or difference bearing increment signal, do not contain radar control and state information in signal, be mainly used in comparatively complicated military radar and navigation radar interface, as XX2 radar, XX4 radar video interface etc.;
2, data and azimuth information hybrid combining coded digital amount RS422 interface: have echo vision signal, difference master's start pulse signal, difference RD data-signal, the semaphores such as difference TD data-signal, difference RD and TD data have comprised bearing data and radar control and state information, be mainly used in the commerical radar interface of New Type Military radar and compact conformation, as the Sperry Marine VisionMaster of the company radar video channel interface introduced etc.
The analogue transmission technology exists some inborn deficiencies, as analogue system adjustment get up more complicated, small and weak signal transmission to circuit and circuit have relatively high expectations, in the anti-external world of analog signal and cabinet a little less than interference performance etc.
Summary of the invention
The purpose of this utility model is to provide the Radar Video Digitization processing unit with many kinds of radar video interface and the adaptively selected corresponding interface of energy, this equipment receives the radar video information of the many kinds of radar video interfaces such as analog quantity and assembly coding numeral amount, after radar signal is carried out digitlization and compression processing, transmit by the Ethernet mode of present extensive use.The digital quantity interface can the receiving radar antenna state information and report terminal by network and show; Terminal equipment can be adjusted the radar antenna state by digital quantity interface of the present invention.
The Radar Video Digitization processing unit of one kind of multiple interface adaptives of the utility model comprises: Radar Video Digitization treatment facility cabinet 1, power supply 2, two-way Radar Video Digitization disposable plates RVDPB-C6-10(3); Wherein Radar Video Digitization treatment facility cabinet 1 possesses the echo vision signal, the analog signal amount interfaces such as single-ended or difference master start pulse signal, the single-ended or positive northern signal of difference, single-ended or difference bearing increment signal and echo vision signal, difference master's start pulse signal, difference RD data-signal, difference TD data signal assembled coded digital amount RS422 interface, above-mentioned interface signal access two-way Radar Video Digitization disposable plates RVDPB-C6-10(3), issue to the whole network user by Ethernet interface with udp protocol after digitized processing.
Described two-way Radar Video Digitization disposable plates RVDPB-C6-10(3), comprising: Radar interface and data processing module 10, data buffer storage and memory module 11, time-sequence control module 12, digital signal processor DSP 14, data outputting module 15.
Described Radar interface and data processing module 10 comprise: normalized module 22, normalized module 23, coding preliminary treatment and gain-adjusted control module 24 and radar state transceiver module 25.
Described time-sequence control module 12 comprises: High Speed Serial communication module 26, radar signal feature judge module 27, adaptive judgement select logic 28, coding pretreatment module 31, DSP to interrupt controlling and communication module 29, CFAR threshold processing module 45.
Described digital signal processor DSP 14 comprises: initialization module 17, data transmission module 18, main control module 19, compressed encoding module 20, network control module 21.
Described Radar interface and data processing module, data buffering and memory module, time-sequence control module, digital signal processor DSP, data outputting module, ethernet physical layer interface, power module etc., sketch respectively each functions of modules as follows:
1) Radar interface and data processing module provide respectively two-way two kinds of interface modes, and it is carried out self adaptation automatically select, be respectively input and the normalized of the radar signals such as the bearing increment that comprises single-ended and difference, Zheng Bei, main trigger impulse, video echo; With the input and the preliminary treatment that comprise the radar signals such as difference RD signal, difference TD signal, difference master's start pulse signal, video echo, and the radar video of input is carried out gain-adjusted control, and the signal after processing is sent into time-sequence control module;
2) time-sequence control module adopts FPGA to carry out adaptively selected rear recompile sequence and preliminary treatment to the radar signal digital quantity and the analog quantity that receive, mainly complete the coding cut-in operation to RD signal and TD signal in FPGA, designed the corresponding serial ports of off-gauge high speed 76800 baud rates and received and treatment circuit, separated bearing increment and positive northern signal from the serial communication message; Analyzing and processing and radar video to antenna bearingt information and timing signal carry out preliminary treatment; Use CFAR threshold circuit Lookup protocol noise gate; After the control informations such as the digital radar video in a distance by radar triggering cycle of storage and orientation, communicate with DSP in the FPGA on-chip memory;
3) digital signal processor DSP is mainly completed the calculating of compression algorithm as the system core, and the hardware protocol chip stack of data output module is controlled control with Internet Transmission, to the management of inputoutput buffer and control etc.;
4) data buffering and memory module mainly are responsible for data are carried out buffer-stored and procedure stores record;
5) function of data outputting module comprises the radar video after compression is sent to network by udp protocol, the radar video data flow of coming self adaptation regulate to send according to network environment; Simultaneously, the Network access control module accepts also to show that control centre or remote terminal to the control information of Radar Video Server, adjust with function the various parameters of the machine and control.
The Radar Video Digitization processing unit of one kind of multiple interface adaptives of the utility model,
Have following function:
(1) receive by interface circuit and have the echo vision signal, the radar video signal of single-ended/difference master's start pulse signal, the positive northern signal of single-ended/difference, single-ended/semaphores such as difference bearing increment signal, or have echo vision signal, difference master's start pulse signal, a difference RD data-signal, the radar video assembly coding semaphores such as difference TD data-signal, difference RD and TD data have comprised the radar video information of bearing data and radar control and state information;
(2) the radar video information of multiple interfaces is carried out signal sampling and preliminary treatment;
(3) will process the radar video data and send in FPGA, FPGA judges and adaptively selected correct interface message the radar video information of receiving by radar signal feature decision logic circuit, sends into after normalized and carry out digitized processing in DSP;
(4) in DSP, the radar video information operating radar video data Real-time compression algorithm of receiving is compressed processing, and the procotol chip stack is configured;
(5) radar video after the procotol chip stack will compress sends to network by udp protocol, also accept demonstration control centre or remote terminal to the control information of Radar Video Server according to the radar video data flow that network environment comes self adaptation to regulate transmission, the various parameters of the machine are adjusted with function controlled;
(6) equipment has online and off-line test function, and during work, equipment can be monitored and Realtime Alerts relevant parameter, the back-up system query State.Can utilize pocket computer that relevant parameter is tested during off-line.
According to the Entropy Coding principle, contain the natural redundancies degree in information source, these redundancys had both come from the correlation of information source itself, the inhomogeneities that comes from again information probability distribution, as long as find the measure of removing correlation or changing the probability distribution inhomogeneities, also just found the method for information Compression.
In order to obtain large as far as possible compression ratio, according to the relevant feature of radar video signal, integrated use Lossy Compression Algorithm and undistorted coding.The feasibility of the data compression of radar video comes from the correlation of radar signal, in the radar video echo, no matter be the sea, aerial and land video, except the pulse vision signal, all exist the identical situation of a large amount of successive values and a large amount of equal or close to the situation of null value, for these characteristics, after radar video was carried out process of pulse-compression, the present invention adopted Run-Length Coding to realize larger compression ratio.In addition, in the radar video echo, often exist more by a small margin clutter and noise, the effect that impact is observed and processed, simultaneously also in order further to improve the compression efficiency of Run-Length Coding, the present invention is provided with the digitlization noise gate of CFAR formula, will represent with null value less than the vision signal of this thresholding.The whether appropriate effect quality to compression of the selection of thresholding plays an important role.In order to strengthen the adaptive capacity of system, system both can set threshold value by control terminal, also can according to priori value, preset a minimum threshold and wealthy family limit value.Thresholding is adjusted in system's variation according to network environment between compression ratio and picture quality automatically between this.
Under the prerequisite that guarantees certain video quality and requirement of real-time, the present invention takes full advantage of the correlation of radar pulse echo-signal.The method that adopts the multiple compression methods such as pulse compression, spatial redundancy, visual redundancy and Run-Length Coding to combine is compressed the radar video data, obtains large as far as possible compression ratio.
The advantage of the Radar Video Digitization processing unit of one kind of multiple interface adaptives of the utility model is: possess adaptively selected to the many kinds of radar video interface, and can carry out issuing video data stream by Ethernet to the whole network user after digitalization compressed is processed to radar video.the radar video that can satisfy the multichannel multiple interfaces carries out the coding/decoding processing, Internet Transmission, the demand that shows and record, satisfy carrier-borne use to environmental suitability, the requirement of Electro Magnetic Compatibility and high reliability, realization is to the adaptivity access of the many kinds of radar video interfaces such as analog quantity and digital quantity with to multipath radar video high-quality, high efficiency Digital Transmission and distribution, equipment adopts separate walls hanging structure and flush bonding module, can be applied to various military-civil fields, has wide accommodation, technology realizes simple, extensibility is strong, with remarkable advantages such as operating system independents, compact conformation, reliable and stable.
At front end, radar video signal is carried out digitlization and compression processing simultaneously, Ethernet by present extensive use transmits in the mode of digital signal again, overcome the deficiency of above-mentioned analogue transmission technology, solve better radar video signal access, transmit and record problem, have the characteristics such as hardware configuration is simple, reliability is high, cost is low, volume is little, be widely used.
Description of drawings
Fig. 1 is Radar Video Digitization treatment facility construction profile figure;
Fig. 2 is that the Radar Video Digitization treatment facility is used block diagram;
Fig. 3 is Radar Video Digitization treatment facility module frame chart;
Fig. 4 is two-way Radar Video Digitization processing module (RVDPB-C6-10) block diagram;
Fig. 5 is Radar Video Digitization treatment facility composition frame chart;
Fig. 6 is Radar interface and data processing module information flow block diagram
Fig. 7 is time-sequence control module information flow block diagram
Fig. 8 is the dsp software composition frame chart;
Fig. 9 is radar video Real-time compression algorithm schematic diagram;
Figure 10 is based on the multi-segment CFAR radar video preconditioning technique schematic diagram of hardware parallel processing.
Embodiment
Further illustrate technical scheme of the present invention below in conjunction with accompanying drawing.
As Fig. 1, the Radar Video Digitization processing unit adopts the 2U casing structure, and the Radar Video Digitization processing unit is comprised of following modules, and is as shown in table 1.Radar Video Digitization treatment facility module frame chart as shown in Figure 3.
Table 1 Radar Video Digitization processing unit forms
| Radar Video Digitization |
1 cover |
| Pack in cabinet with lower module | ? |
| Two-way Radar Video Digitization disposable plates (RVDPB-C6-10) | 1 |
| |
1 |
The application of Radar Video Digitization processing unit in system as shown in Figure 2, Radar Video Digitization processing unit concrete function is as follows
(1) the Radar Video Digitization processing unit receives the signal of the multiple interfaces such as main pulse from radar, Zheng Bei, echo, bearing increment, difference RD signal, difference TD signal, adaptively selected laggard row digitlization and compressed encoding, the frame that the radar echo signal in each or a plurality of radar main pulse cycle and synchronizing signal are the digital radar video;
(2) the Radar Video Digitization processing unit will be connected with the network switch by network cable through the digital radar video after compressed encoding, and supports the multi-user to access simultaneously by multicast mode;
(3) satisfy modularization and standardized designing requirement, every Radar Video Digitization processing unit can be processed maximum 2 road radar videos simultaneously, can be the multi-channel video of same radar, can be also the different video of different radars;
(4) state information that the digital quantity interface of Radar Video Digitization treatment facility can the receiving radar antenna also reports terminal by network and shows; Terminal equipment can be adjusted the radar antenna state by the digital quantity interface of Radar Video Digitization treatment facility;
(5) equipment has online and off-line test function, and during work, equipment can be monitored and Realtime Alerts relevant parameter, the back-up system query State.Can utilize pocket computer that relevant parameter is tested during off-line.
Body is implemented as follows by reference to the accompanying drawings:
As shown in Figure 4, nucleus module of the present invention is two-way Radar Video Digitization disposable plates RVDPB-C6-10(3), this module is comprised of Radar interface and data processing module (10), data buffer storage and memory module (11), time-sequence control module (12), digital signal processor DSP (14), data outputting module (15)
(1) as shown in Figure 6, Radar interface and data processing module provide respectively two-way two kinds of interface modes, and it is carried out self adaptation automatically select, be respectively input and the normalized of the radar signals such as the bearing increment that comprises single-ended and difference, Zheng Bei, main trigger impulse, video echo; With the input and the preliminary treatment that comprise the radar signals such as difference RD signal, difference TD signal, difference master's start pulse signal, video echo, two kinds of interface modes can multiplexing identical pin, use identical pinout as echo video, main trigger impulse between two kinds of interfaces etc., difference TD signal, difference RD signal and difference increment signal, the positive northern signal multiplexing of difference, both saved the space, also can simplify circuit, reduce costs.Radar interface and data processing module also receive target information and the external control signal from Radar Signal Processing, antenna bearingt information and timing signal simultaneously.After the radar video signal that receives is carried out impedance matching, line driving and clamper amplitude limit, adopt the adjustment that gains of AD605 chip, adopt the AD9057 chip to carry out the AD sampling, the vision signal after sampling is delivered to FPGA together with normalized antenna bearingt information carry out preliminary treatment.
(2) as shown in Figure 7, time-sequence control module is positioned at FPGA, adopt the Cyclone III family chip of ALTERA company, Cyclone III family chip is the Field Programmable Gate Array of the up-to-date release of U.S. ALTERA company, it is based on the technique manufacturing of 1.2V core voltage, employing 70nm, and there are the affluent resources such as phase-locked loop, RAM piece its inside.The chip that the present invention adopts also has 1134Kbits ram in slice (or ROM) except 39600 LE are arranged, can realize the RAM of real dual-port, simple dual-port and single port, can also support shift register and ROM mode.Can satisfy the demand of Radar interface, data acquisition and FIFO fully, and leave the space, satisfy hardware modifications and hardware capability and expand, support NIOS II soft-core processor.The present invention has completed the coding cut-in operation to RD signal and TD signal in FPGA, having designed the corresponding serial ports of off-gauge high speed 76800 baud rates receives and treatment circuit, separate bearing increment and positive northern signal from the serial communication message, to the analyzing and processing of antenna bearingt information and timing signal and the preliminary treatment of radar video; Use radar signal feature decision logic circuit the various interface radar video information of receiving is analyzed judgement, and the correct radar video interface message of adaptively selected reception; Use the CFAR threshold circuit and add up random noise at radar in stand-down and cross the method for threshold number and come the Lookup protocol noise gate, based on the multi-segment CFAR radar video preconditioning technique of hardware parallel processing as shown in figure 10; After the control informations such as the digital radar video in a distance by radar triggering cycle of storage and orientation, send interruption to DSP in the FPGA on-chip memory.FPGA responds interruption, by dma mode, distance by radar is triggered the control informations such as the original video data in cycle and orientation and reads in the DSP on-chip memory.
(3) as shown in Figure 8, digital signal processor DSP, the radar video signal bandwidth is in 8MHZ, according to the Nyquist law, guaranteeing that under the distortionless prerequisite of signal, sample frequency should be more than 16 MHZ, press 8bit and quantize, the data flow passband is at 128Mbit/ more than second.Therefore, the selection of the high-speed hardware implementation platform of compression algorithm just becomes sixty-four dollar question.The present invention has realized the compression after the radar video signal digitlization is processed TI company in the 1997 high-end dsp chips of TMS320C6000 series of releasing at the TI high-speed dsp chip TMS320C6203B of company, core cpu and the improved Harvard bus structures (256 program buss of a cover, two cover 32 bit data bus and 32 DMA dedicated buss of a cover) of very long instruction word (VLIW) structure have been adopted, therefore obtained superpower parallel ability, being highly suitable for realtime graphic processing etc. needs at a high speed and the application scenario of macrooperation amount.C6203B is the new product in 6000 series, is one of dsp chip that cost performance is the highest in the market, and operating frequency reaches 300MHZ, and data throughput peak value can reach 2400MIPS.The main feature of this chip has: have the advanced VLIW structure kernel of VelociTI and 8 separate functional units 1.; 2. operating frequency 300MHz, disposal ability can reach 2400MIPS; 3. Embedded has the abundant interface control logic such as the memory space of 7Mbit and DMA, is conducive to realize the SOC system; 4. have the 32BIT position expansion bus interface of enhancement mode, can realize and the seamless link of main flow pci bridge chip, main frame can be accessed any one internal storage location of dsp system by the XB bus, and external reference and the DSP built-in function separate.The major function of the present invention realization of can programming.Just can change compression method or upgrading compression algorithm by the logic of modification FPGA and the embedded software of DSP, greatly improve design efficiency.Dsp software both had been convenient to debugging and had been safeguarded with the linear assembler language hybrid programming of ANSI C in conjunction with C6000, did not lose again efficient.The Core Feature of software is comprised of two parts: a. is radar video composite compression method (RVCCT-1) as shown in Figure 9: radar image is based on the impulse type vision signal of polar coordinate scanner, has high fdrequency component many, poor continuity, between two frame pictures, interval time is long, the characteristics such as the area distribution correlation is low, the present invention mainly considers the compression method based on polar coordinates (one dimension).Under the prerequisite that guarantees certain video quality and requirement of real-time, take full advantage of the correlation characteristics of radar video signal, the radar video composite compression method (RVCCT-1) that adopts the multiple compression methods such as pulse compression, DPCM coding, the spatial redundancy compression method in conjunction with visual redundancy, Run-Length Coding and Huffmam coding to combine compresses radar video information, obtains large as far as possible compression ratio.B. the realization of network transport functions: the function of Network access control module comprise with the compression after radar video send to network by udp protocol; Come self adaptation to regulate the radar video data flow that sends according to network environment.Simultaneously, the Network access control module accepts also to show that control centre or remote terminal to the control information of Radar Video Server, adjust with function the various parameters of the machine and control.
What (4) network communication was adopted is the hardware protocol chip stack that Korea S Wiznet company produces, and it has comprised the Internet agreement such as TCP, IP, UDP, ICMP, ARP, DHCP and DLC, MAC Ethernet protocol.Due to integrated powerful network access protocol, the designer fully can be as configuring designed system simply configuration of IP address in local area network (LAN), by flexible establishment with select TCP or UDP socket Socket to complete online exchanges data.Above work is all to complete by the control register that chip internal is set.Greatly simplified the technical difficulty of embedded device network insertion.Transmission medium of the present invention adopts Ethernet, but is the 10/100M network interface due to what show the control terminal employing, so even backbone network adopts 1000/100/10M self adaptation Ethernet, the network bandwidth of branch net is also limited.When needing to transmit a plurality of Radar Video Compressing signal on network, if when transmission means adopts clean culture or broadcast mode, though backbone network can bear a large amount of transfer of data, the branch net is due to the restriction that is subject to the network bandwidth, thereby causes network congestion, obliterated data.By the test to network traffics, the 10/100M Ethernet can only receive 7～8 road video signal sources at most, and aobvious control terminal interface module only need receive 2 radar video signal sources, the branch net is as long as receive 2 video signal sources like this, cross multisignal source and transmit on the net in branch and need not other, at this moment adopt multicast mode can realize showing desired video signal source at branch net receive-only terminal, and need not to receive other signal source.
Radar video signal wants to surf the Net transmission after encoding through compound compressed, also needs coded data encapsulation procotol.Because Transmission Control Protocol is point-to-point agreement, and do not support multicast transmission, so be not suitable for the transmission of video flowing.And udp protocol is supported multicast communication to be well suited for multicast mode, and is simultaneously real-time, is fit to the transmission of video flowing.Therefore, the present invention adopts udp protocol as the network transmission protocol.
Claims (5)
1. the Radar Video Digitization processing unit of one kind of multiple interface adaptives, is characterized in that: comprising: Radar Video Digitization treatment facility cabinet (1), power supply (2), two-way Radar Video Digitization disposable plates RVDPB-C6-10(3) form; Wherein Radar Video Digitization treatment facility cabinet (1) possesses the echo vision signal, the analog signal amount interfaces such as single-ended or difference master start pulse signal, the single-ended or positive northern signal of difference, single-ended or difference bearing increment signal and echo vision signal, difference master's start pulse signal, difference RD data-signal, the assembly codings such as difference TD data-signal numeral amount RS422 interface, above-mentioned interface signal access two-way Radar Video Digitization disposable plates RVDPB-C6-10(3), issue to the whole network user by Ethernet interface with udp protocol after digitized processing.
2. the Radar Video Digitization processing unit of one kind of multiple interface adaptives according to claim 2, it is characterized in that: described two-way Radar Video Digitization disposable plates RVDPB-C6-10(3), comprising: Radar interface and data processing module (10), data buffer storage and memory module (11), time-sequence control module (12), digital signal processor DSP (14), data outputting module (15).
3. according to the Radar Video Digitization processing unit of described one kind of multiple interface adaptives of claim, it is characterized in that: described Radar interface and data processing module (10) comprising: normalized module (22), normalized module (23), coding preliminary treatment and gain-adjusted control module (24) and radar state transceiver module (25).
4. the Radar Video Digitization processing unit of one kind of multiple interface adaptives according to claim 2, it is characterized in that: described time-sequence control module (12) comprising: High Speed Serial communication module (26), radar signal feature judge module (27), adaptive judgement select logic (28), coding pretreatment module (31), DSP to interrupt controlling and communication module (29), CFAR threshold processing module (45).
5. the Radar Video Digitization processing unit of one kind of multiple interface adaptives according to claim 2, it is characterized in that: described digital signal processor DSP (14) comprising: initialization module (17), data transmission module (18), main control module (19), compressed encoding module (20), network control module (21).
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103744056A (en) * | 2013-12-17 | 2014-04-23 | 无锡市雷华科技有限公司 | Radar processing system and radar processing method based on foreign object detection |
| CN104298634A (en) * | 2014-09-24 | 2015-01-21 | 四川九洲电器集团有限责任公司 | Data transmission system based on FPGA and DSP |
| CN111551910A (en) * | 2020-05-18 | 2020-08-18 | 南京众博达电子科技有限公司 | UDP communication-based transmission method for compressed data of radar clutter background map |
-
2012
- 2012-12-22 CN CN 201220714348 patent/CN203014851U/en not_active Expired - Lifetime
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103744056A (en) * | 2013-12-17 | 2014-04-23 | 无锡市雷华科技有限公司 | Radar processing system and radar processing method based on foreign object detection |
| CN104298634A (en) * | 2014-09-24 | 2015-01-21 | 四川九洲电器集团有限责任公司 | Data transmission system based on FPGA and DSP |
| CN104298634B (en) * | 2014-09-24 | 2017-06-30 | 四川九洲电器集团有限责任公司 | Data transmission system based on FPGA and DSP |
| CN111551910A (en) * | 2020-05-18 | 2020-08-18 | 南京众博达电子科技有限公司 | UDP communication-based transmission method for compressed data of radar clutter background map |
| CN111551910B (en) * | 2020-05-18 | 2022-05-13 | 南京众博达电子科技有限公司 | UDP communication-based radar clutter background map compressed data transmission method |
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