CN203013219U - Segment type liquid crystal display drive circuit having point flickering function - Google Patents
Segment type liquid crystal display drive circuit having point flickering function Download PDFInfo
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- CN203013219U CN203013219U CN 201220704601 CN201220704601U CN203013219U CN 203013219 U CN203013219 U CN 203013219U CN 201220704601 CN201220704601 CN 201220704601 CN 201220704601 U CN201220704601 U CN 201220704601U CN 203013219 U CN203013219 U CN 203013219U
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Abstract
The utility model provides a segment type liquid crystal display drive circuit having a point flickering function. The drive circuit comprises a display data memory, a sequential control logic unit, a time-sharing multiplexing selector, a bias voltage generator and a wave form output circuit, the segment type liquid crystal display drive circuit also comprises a flickering data control logic unit, and compared with a conventional segment type liquid crystal display drive circuit, the segment type liquid crystal display drive circuit realizes a function of flickering of any point on a segment type liquid crystal display module by adding the flickering data control logic unit to a display data scanning output channel. After the flickering function is started, even if a processor enters into a standby state, the point flickering function can be realized without the need to wake up the refreshing and displaying of data on time. The logic is easy to implement, and the configuration is convenient, and is easy to realize. The average standby current can be obviously decreased on a system level, and the service time of a battery is prolonged.
Description
Technical field
The utility model relates to liquid crystal display drive circuit, relates in particular to a kind of segment liquid crystal display driver circuit with a flashing function.
Background technology
The segment liquid crystal display driver circuit is low in energy consumption and be easy to integrated characteristics because of it, is widely used in various portable sets, particularly in the occasion that the clock display application is much arranged.And in these were used, the arrangement of displaying contents and renewal were normally completed by microcontroller (MCU).
Fig. 1 is common segment liquid crystal display driver structural representation, and as shown in Figure 1, common segment liquid crystal display driver structure comprises following components:
Display data memory 001: be used for depositing the demonstration data.Demonstration data wherein need central processing unit (CPU) to upgrade by data bus.
Time-sharing multiplex selector switch 002: under clock signal was controlled, described time-sharing multiplex selector switch 002 is controlled the timesharing output of described demonstration data, and was multiplexed to realize.
Waveform output circuit 003: described waveform output circuit 003 is responsible for showing that data and sweep signal convert corresponding liquid crystal drive level to, to drive the light on and off of point on the segment liquid crystal display module (or section), namely waveform output circuit 003 has been realized the conversion of digital signal to simulating signal.
Bias voltage generator 004: described bias voltage generator 004 is for generation of each required rank level of liquid crystal drive.
Time sequence control logic unit 005: described time sequence control logic unit 005 is for generation of the required sequential of whole liquid crystal display drive circuit, the required time-sharing multiplex of time-sharing multiplex selector switch 002 is selected signal as described, and shows the waveform output circuit 003 voltage selection output control signal required with bias voltage generator 004 under beat in difference.
Portable set generally all requires stand-by power consumption more low better.Carve when needed in the portable set of displaying time, typical standby current mainly comprises: 1, keep the required liquid crystal display drive current of liquid crystal display; 2, the working current of microcontroller.If during standby, displaying contents does not need to change, the standby current of equipment usually all can be smaller, because at this moment microcontroller can be operated in stopped status, the shutdown electric current of modern microcontroller generally all is not more than 1 μ A.But in the equipment that clock shows when needed, usually also need to realize the effect of clock point second flicker.In order to realize a second some flicker, to adopt the microcontroller (MCU) shown in Fig. 1 scheme to need half second to wake up and once upgrade liquid crystal display, this renewal is to realize by the display data memory 001 of rewriting in Fig. 1.Woke once, wake up at every turn that under work 5ms, MCU duty, average current 2mA calculates as example in every half second up take microcontroller, the average standby current of portable set will increase by 20 μ A.
Because standby current increases too many, a lot of portable sets just simply do not carry out some flickering display second, like this, microcontroller just only need to wake up and once upgrade minute information in one minute, calculate by wake under work 5ms, microcontroller duty average current 2mA up at every turn equally, the standby current of portable set just only than fully not the situation of update displayed have more 0.2 μ A less than.But demonstration information was just upgraded once in one minute, and long-time not variation can make the user suspect that psychologically whether equipment is also in normal operation.Therefore, common a lot of softwares need to be on the interface when executive chairman's time background process the progress displaying bar, to improve user's experience.
The utility model content
The purpose of this utility model be to provide a kind of can be after having opened flashing function, even processor enters holding state, also need not to wake up to refresh on time and show that data just can realize the segment liquid crystal display driver circuit of some flashing functions.
The utility model provides a kind of segment liquid crystal display driver circuit with a flashing function, described segment liquid crystal display driver circuit is connected with the external control processor signal by data bus, comprise: display data memory, time sequence control logic unit, time-sharing multiplex selector switch, bias voltage generator and waveform output circuit, it is characterized in that, described segment liquid crystal display driver circuit also comprises flicker data control logic unit, wherein
Described display data memory receives and stores the demonstration data of described data bus transmission;
Described time sequence control logic unit receives the clock signal of described data bus transmission, and clock signal to described flicker data control logic unit, time-sharing multiplex selector switch and waveform output circuit;
Described flicker data control logic unit is arranged between described display data memory and described time-sharing multiplex selector switch, described flicker data control logic unit produces the flash signal data, and receive the described demonstration data of described display data memory transmission, according to flicker address date and the described clock signal of described data bus output, the data point that needs in described demonstration data glimmer is replaced with described flash signal data, show data to form the band flicker information, and export to described time-sharing multiplex selector switch;
Described time-sharing multiplex selector switch is according to described clock signal, and timesharing selects the described band flicker information of output to show that data are to described waveform output circuit;
Described bias voltage generator produces the required level signals at different levels of described segment liquid crystal display driver circuit to described waveform output circuit;
Described waveform output circuit receives described demonstration data and level signal, and changes and export the liquid crystal drive level to the segment liquid crystal display module.
Further, described flicker data control logic unit comprises flicker address mask register, decoding and steering logic unit, MUX and flicker frequency generator, wherein
The flicker address date of the described data bus transmission of output is stored and selected to described flicker address mask register;
Described decoding and the described flicker address date of steering logic unit reception, and produce the required selection signal of MUX;
Described flicker frequency generator produces the flash signal data of the required frequency of flicker;
Described MUX receives the described demonstration data of described display data memory transmission, according to described selection signal and flash signal data, the data point that needs in described demonstration data glimmer is replaced with described flash signal data, show data to form the band flicker information, and export to described time-sharing multiplex selector switch.
Further, described flicker address mask register has one or more.
Further, the group number of the described selection signal that described decoding and steering logic unit produce is identical with the group number of described demonstration data, and the width of every group selection signal is corresponding with described demonstration data bit width.
Further, described MUX has at least one.
Further, the frequency of described flash signal is 4Hz, 2Hz, 1Hz or 0.5Hz.
Further, described display data memory is RAM or register.
In sum, compare with traditional segment liquid crystal display driver circuit, the segment liquid crystal display driver circuit of band point flashing function described in the utility model has been realized the flashing function of arbitrfary point on the segment liquid crystal display module by increasing a flicker data control logic unit on the data scanning output channel showing.After having opened flashing function, even processor enters holding state, also need not to wake up to refresh on time and show that data just can realize some flashing functions.This logic realization is simple, and configuration is convenient, is easy to realize.System level can obviously reduce average standby current, has extended service time of battery.
Description of drawings
Fig. 1 is segmentation liquid crystal display drives structure schematic diagram in prior art;
Fig. 2 is segmentation liquid crystal drive structural representation in the utility model one embodiment;
Fig. 3 is the structural representation of flicker data control logic unit in the utility model one embodiment;
Fig. 4 a is the flicker address configuration method schematic diagram of flicker address mask register in the utility model one embodiment.
Fig. 4 b shows the mapping relations schematic diagram of data and clock signal in the utility model one embodiment.
Fig. 5 is the course of work sequential chart of segmentation liquid crystal drive structure in the utility model one embodiment.
Embodiment
For making content of the present utility model more clear understandable, below in conjunction with Figure of description, content of the present utility model is described further.Certainly the utility model is not limited to this specific embodiment, and the known general replacement of those skilled in the art also is encompassed in protection domain of the present utility model.
Secondly, the utility model utilizes schematic diagram to carry out detailed statement, and when the utility model example was described in detail in detail, for convenience of explanation, schematic diagram did not amplify according to general ratio is local, should be with this as to restriction of the present utility model.
Fig. 2 is the segment liquid crystal drives structure schematic diagram according to band point flashing function in the utility model one embodiment.As shown in Figure 2, described segment liquid crystal display driver circuit receives from data bus and shows data, and send the driving signal to the segment liquid crystal display module, described segment liquid crystal display driver circuit mainly comprises display data memory 101, flicker data control logic unit 106, time-sharing multiplex selector switch 102, waveform output circuit 103, bias voltage generator 104 and time sequence control logic unit 105.
Described display data memory 101 is used for storage and shows data, and the external control processor will show that by data bus data are written in display data memory 101.Wherein, described display data memory 101 can adopt RAM to realize memory function when capacity is large, and described display data memory 101 hour can adopt register to realize memory function at capacity.
Described time sequence control logic unit 105 is for generation of the required clock signal of other each functional blocks, and described clock signal is controlled the work of described flicker data control logic unit 106, time-sharing multiplex selector switch 102 and waveform output circuit 103.
Described flicker data control logic unit 106 is arranged between described display data memory 101 and described time-sharing multiplex selector switch 102, and described demonstration data are delivered to described time-sharing multiplex selector switch after unit 106 processing of flicker data control logic.
Described time-sharing multiplex selector switch 102 is according to described clock signal, and timesharing selects the described demonstration data of output to described waveform output circuit 103.
Level signals at different levels required when the described bias voltage generator 104 described segment liquid crystal display modules of generation carry out Presentation Function are to described waveform output circuit 103, and described bias voltage generator 104 produces each display port that level are delivered to the segment liquid crystal display module.
Described waveform output circuit 103 receives described demonstration data and level signal, and under the control of clock signal, be converted to the liquid crystal drive level to described waveform output circuit, described waveform output circuit coordinates for described display port drive level to realize lighting and extinguishing function of liquid crystal dots in the segment liquid crystal display module with clock signal.
The driving method of the segment liquid crystal display driver circuit of band point flashing function described in the utility model comprises:
In the flicker free stage, described time-sharing multiplex selector switch 102 is directly delivered to described demonstration data in described flicker data control logic unit 106; Described time-sharing multiplex selector switch 102 timesharing select the described demonstration data of output to described waveform output circuit 103; Described bias voltage generator 104 produces the required level signals at different levels of described segment liquid crystal display driver circuit to described waveform output circuit 103; Described waveform output circuit 103 receives described demonstration data and level signal, transforms and export the liquid crystal drive level to the segment liquid crystal display module; Thereby control the normal demonstration of described segment liquid crystal display module.
In the need flickers stage, the point of scintillation address is determined in described flicker data control logic unit 106, and after will the demonstration data replacement corresponding with the point of scintillation address being flash signal, delivers to described time-sharing multiplex selector switch 102; Described time-sharing multiplex selector switch 102 timesharing select the described demonstration data of output to described waveform output circuit 103; Described bias voltage generator 104 produces the required level signals at different levels of described segment liquid crystal display driver circuit to described waveform output circuit 103; Described waveform output circuit 103 receives described demonstration data and level signal, transforms and exports the liquid crystal drive level to the segment liquid crystal display module, thereby control the flicker of described segment liquid crystal display module.
Take described segment liquid crystal display module as 8*32, namely have 8 common ports (corresponding 8 bit wides show data) and 32 display segments as example, the specific works process of the segment liquid crystal driving of band point flashing function described in the utility model is described:
in the flicker free function phases, described 8 show when the data process is glimmered data control logic unit 106, described 8 the demonstration data in 106 pairs of flicker data control logic unit are not done to change and are directly delivered in described time-sharing multiplex selector switch 102, described time-sharing multiplex selector switch 102 is exported 8 of described demonstration data successively to described waveform output circuit, for example one shows address storage one 8 bit data 00000001, when the clock signal corresponding with most significant digit is effective, show data output 0, described waveform output circuit 103 receives the drive level that time-sharing multiplex selector switch 102 provides, described waveform output circuit 103 scanning output intermediate level, the liquid crystal dots that the segment liquid crystal display module is corresponding is extinguished, when the clock signal corresponding with lowest order is effective, show data output 1, waveform output circuit 103 receives the minimum drive level that time-sharing multiplex selector switch 102 provides, described waveform output circuit 103 scanning output minimum drive levels (corresponding with the maximum level of common port), the liquid crystal dots that the segment liquid crystal display module is corresponding is lighted.If corresponding common port output minimum level, the described waveform output circuit 103 the highest drive levels of scanning output also can be lighted corresponding liquid crystal dots.According to this, each shows the level output of data and each display end by 103 selections of waveform output circuit, thereby realizes the demonstration of segment liquid crystal display module.
The flashing function stage is being arranged, described flicker data control logic unit 106 has realized that the flicker of the utility model most critical controls function, and described flicker data control logic unit 106 can be used in certain the some data in the data of needs flicker are replaced to the flash signal that hardware produces automatically.
Fig. 3 is the structural representation of flicker data control logic unit in the utility model one embodiment; As shown in Figure 3, described flicker data control logic unit 106 mainly comprises flicker address mask register 201, decoding and steering logic unit 202, MUX 203 and 204 and flicker frequency generator 205.Wherein
Described flicker address mask register 201 is according to described data bus selection point of scintillation address; Described point of scintillation address is the selected address information that needs the liquid crystal dots of flicker in the segment liquid crystal display module.
Described decoding and steering logic unit 202 receive described point of scintillation address informations, and produce the required selection signal of MUX; Address translation functions is realized according to arranging of flicker address mask register 201 in described decoding and steering logic unit 202, produces the required selection signal of MUX 203.The group number of the selection signal that described decoding and steering logic unit 202 produce is identical with the group number of described demonstration data, and the width of every group selection signal is corresponding with described demonstration data bit width.
Described flicker frequency generator produces the flash signal of the required frequency of flicker; The required frequency of glimmering can be for example 4Hz, 1Hz, 2Hz or 0.5Hz etc.For example, the flicker frequency of 1Hz represents in corresponding point 1 second to extinguish in 0.5 second, lights in 0.5 second, and certainly, the required frequency of glimmering is not restricted to above-mentioned numerical value.
Described MUX 203 is selected the described flash signal of output according to described selection signal, and described flash signal is selected output through MUX 203, can avoid refreshing the demonstration data by the operation of peripheral software, thereby improve flash speed.
Described flicker address mask register 201 is for selection point of scintillation address.Fig. 4 a is the flicker address configuration method schematic diagram of flicker address mask register in the utility model one embodiment, as shown in Fig. 4 a, continuation is take the segment liquid crystal display driver circuit of 8*32 as example, Fig. 4 b shows the mapping relations schematic diagram of data and clock signal in the utility model one embodiment, as shown in Fig. 4 b, flicker address mask register 201 has eight BIT7～BIT0, Senior Three position BIT7～BIT5 memory row data CMN[2:0 wherein], be used for selecting column position corresponding to point of scintillation, low 5 BIT4～BIT0 storage line data SGN[4:0], be used for selecting line position corresponding to point of scintillation.If show data greater than 32 sections or common port greater than 8, need to expand the figure place of SGN or CMN.In other embodiment, if realize the flashing function of point of scintillation 1 position in Fig. 4 b, the address mask register 201 that glimmers should be inserted 8 bit 110_00010, the 6th the needs flicker of expression SEG2 (with showing that data LD2 is corresponding).To realize the flashing function of point of scintillation 2 in Fig. 4 b or point of scintillation 3 these points when inserting equally 011_01111 or 001_11111.
Address translation functions is realized according to arranging of flicker address mask register 201 in described decoding and steering logic unit 202, produces the required selection signal of MUX 203.Or take the segment liquid crystal of 8*32 as example, decoding will produce 32 group selection signals with steering logic unit 202, and every group selection deration of signal is 8, and is corresponding with the demonstration data bit width.Therefore total 32*8=256 root is selected signal, and when flashing function was forbidden, these selected the signal full 0, not flicker; When flashing function was opened, these 256 signals only had one to be 1, were used for selecting flash signal output, had replaced display data memory certain a data out.As realizing that in Fig. 4 b, point of scintillation 1 position goes out flicker, the address mask register that glimmers is inserted 110_00010.This 32 group selection signal is output as: 0000_0000 (corresponding SEG0), and 0000_0000 (corresponding SEG1), 0100_0000 (corresponding SEG2), other organizes full 0.
Wherein, the 3rd group selection signal 0100_0000 only has one to be 1, the 6th of this corresponding display data memory LD2.At this moment, the 6th bit data of LD2 is replaced by flash signal, namely shows data according to certain frequency change, thereby realizes that corresponding point light at set intervals and extinguish.
Further, Fig. 5 is the course of work sequential chart of segmentation liquid crystal drive structure in the utility model one embodiment.particularly, Fig. 5 is being set at the address mask register 201 that glimmers: 001_11111, it is the sequential chart under the condition of the 2nd some flicker in SEG31 in presentation graphs 4b, in conjunction with Fig. 2, Fig. 3 and Fig. 5, described time sequence control logic unit 105 produces a basic clock source signals LCDCLK, according to this basis clock source signals LCDCLK clocking CLK1 and clock signal clk 2, clock signal clk 1 is identical with basic clock source signals LCDCLK frequency, COM0～COM7 is for showing the cadence signal of data in scanning display data memory 101, its cadence signal is corresponding with the clock signal clk 2 of described time sequence control logic unit 105 outputs.Display data memory 101 storage shows data LD31, and after processing through flicker data control logic unit 106, the data of output are LD31T, and the flicker frequency generator 205 in flicker data control logic unit 106 produces flicker frequency signal TKFREQ.Time-sharing multiplex selector switch 102 is exported data SDO31 successively according to data LD31T under the control of COM0～COM7.
In the present embodiment, suppose to show that the concrete data of data LD31 are 29H (H represents sexadecimal), it is binary data 00101001B (B represents scale-of-two), its output order is extremely high-order successively from low level, as flicker frequency signal TKFREQ when low, data LD31T through output after unit 106 processing of flicker data control logic is 29H, the data SDO31 of time-sharing multiplex selector switch 102 outputs is 29H, be binary data 00101001B, its output order is extremely high-order successively from low level; As flicker frequency signal TKFREQ when being high, data LD31T through output after unit 106 processing of flicker data control logic becomes 2BH, the second count of data SDO31, namely during the beat corresponding with COM1, the output data become 1 by 0, thereby change has occured in time-sharing multiplex selector switch output data SDO31, and scitillation process is occured control waveform output circuit 103.
In sum, compare with traditional segment liquid crystal display driver circuit, the segment liquid crystal display driver circuit of band point flashing function described in the utility model and driving method thereof have been realized the flashing function of arbitrfary point on the segment liquid crystal display module by increasing a flicker data control logic unit on the data scanning output channel showing.After having opened flashing function, even processor enters holding state, also need not to wake up to refresh on time and show that data just can realize some flashing functions.This logic realization is simple, and configuration is convenient, is easy to realize.System level can obviously reduce average standby current, has extended service time of battery.
Although the utility model discloses as above with preferred embodiment; so it is not to limit the utility model; have in technical field under any and usually know the knowledgeable; within not breaking away from spirit and scope of the present utility model; when doing a little change and retouching, therefore protection domain of the present utility model is as the criterion when looking claims person of defining.
Claims (7)
1. segment liquid crystal display driver circuit with a flashing function, described segment liquid crystal display driver circuit is connected with the external control processor signal by data bus, comprise: display data memory, time sequence control logic unit, time-sharing multiplex selector switch, bias voltage generator and waveform output circuit, it is characterized in that, described segment liquid crystal display driver circuit also comprises flicker data control logic unit, wherein
Described display data memory receives and stores the demonstration data of described data bus transmission;
Described time sequence control logic unit receives the clock signal of described data bus transmission, and clock signal to described flicker data control logic unit, time-sharing multiplex selector switch and waveform output circuit;
Described flicker data control logic unit is arranged between described display data memory and described time-sharing multiplex selector switch, described flicker data control logic unit produces the flash signal data, and receive the described demonstration data of described display data memory transmission, according to flicker address date and the described clock signal of described data bus output, the data point that needs in described demonstration data glimmer is replaced with described flash signal data, show data to form the band flicker information, and export to described time-sharing multiplex selector switch;
Described time-sharing multiplex selector switch is according to described clock signal, and timesharing selects the described band flicker information of output to show that data are to described waveform output circuit;
Described bias voltage generator produces the required level signals at different levels of described segment liquid crystal display driver circuit to described waveform output circuit;
Described waveform output circuit receives described demonstration data and level signal, and changes and export the liquid crystal drive level to the segment liquid crystal display module.
2. the segment liquid crystal display driver circuit of band point flashing function as claimed in claim 1, it is characterized in that, described flicker data control logic unit comprises flicker address mask register, decoding and steering logic unit, MUX and flicker frequency generator, wherein
The flicker address date of the described data bus transmission of output is stored and selected to described flicker address mask register;
Described decoding and the described flicker address date of steering logic unit reception, and produce the required selection signal of MUX;
Described flicker frequency generator produces the flash signal data of the required frequency of flicker;
Described MUX receives the described demonstration data of described display data memory transmission, according to described selection signal and flash signal data, the data point that needs in described demonstration data glimmer is replaced with described flash signal data, show data to form the band flicker information, and export to described time-sharing multiplex selector switch.
3. the segment liquid crystal display driver circuit of band point flashing function as claimed in claim 2, is characterized in that, described flicker address mask register has one or more.
4. the segment liquid crystal display driver circuit of band point flashing function as claimed in claim 2, it is characterized in that, the group number of the described selection signal that described decoding and steering logic unit produce is identical with the group number of described demonstration data, and the width of every group selection signal is corresponding with described demonstration data bit width.
5. the segment liquid crystal display driver circuit of band point flashing function as claimed in claim 2, is characterized in that, described MUX has at least one.
6. the segment liquid crystal display driver circuit of band point flashing function as claimed in claim 1, is characterized in that, the frequency of described flash signal is 4Hz, 2Hz, 1Hz or 0.5Hz.
7. the segment liquid crystal display driver circuit of band point flashing function as claimed in claim 1, is characterized in that, described display data memory is RAM or register.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220704601 CN203013219U (en) | 2012-12-18 | 2012-12-18 | Segment type liquid crystal display drive circuit having point flickering function |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220704601 CN203013219U (en) | 2012-12-18 | 2012-12-18 | Segment type liquid crystal display drive circuit having point flickering function |
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| CN203013219U true CN203013219U (en) | 2013-06-19 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN 201220704601 Withdrawn - After Issue CN203013219U (en) | 2012-12-18 | 2012-12-18 | Segment type liquid crystal display drive circuit having point flickering function |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103123778A (en) * | 2012-12-18 | 2013-05-29 | 杭州士兰微电子股份有限公司 | Segment type liquid crystal display driving circuit with point twinkling function |
| CN110718201A (en) * | 2019-10-24 | 2020-01-21 | 厦门飞盈海科技有限公司 | Liquid crystal driving chip capable of reducing pin number |
-
2012
- 2012-12-18 CN CN 201220704601 patent/CN203013219U/en not_active Withdrawn - After Issue
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103123778A (en) * | 2012-12-18 | 2013-05-29 | 杭州士兰微电子股份有限公司 | Segment type liquid crystal display driving circuit with point twinkling function |
| CN103123778B (en) * | 2012-12-18 | 2015-06-17 | 杭州士兰微电子股份有限公司 | Segment type liquid crystal display driving circuit with point twinkling function |
| CN110718201A (en) * | 2019-10-24 | 2020-01-21 | 厦门飞盈海科技有限公司 | Liquid crystal driving chip capable of reducing pin number |
| CN110718201B (en) * | 2019-10-24 | 2021-09-28 | 厦门骏陆科技有限公司 | Liquid crystal driving chip capable of reducing pin number |
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