CN202997612U - Charging circuit - Google Patents

Charging circuit Download PDF

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Publication number
CN202997612U
CN202997612U CN 201220621441 CN201220621441U CN202997612U CN 202997612 U CN202997612 U CN 202997612U CN 201220621441 CN201220621441 CN 201220621441 CN 201220621441 U CN201220621441 U CN 201220621441U CN 202997612 U CN202997612 U CN 202997612U
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CN
China
Prior art keywords
charging
effect transistor
field effect
resistance
battery
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Expired - Fee Related
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CN 201220621441
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Chinese (zh)
Inventor
李展
田文博
尹航
王钊
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Wuxi Vimicro Corp
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Wuxi Vimicro Corp
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Priority to CN 201220621441 priority Critical patent/CN202997612U/en
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Publication of CN202997612U publication Critical patent/CN202997612U/en
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  • Charge And Discharge Circuits For Batteries Or The Like (AREA)

Abstract

An embodiment of the utility model relates to a charging circuit. The charging circuit comprises a charging module and a control module. The charging module is used for charging an outer battery. The control module is used for controlling charging of the charging module, wherein, when charging of the battery is completed, the control module continuously causes the charging module to load a charging voltage on the battery. If discharging current generated by the battery or operation voltage of the battery reduces, the charging module charges the battery instantly. According to the embodiment of the charging circuit, through keeping operation of a charging loop, the electric quantity of the battery is always kept in a full state, thereby realizing a function of zero retardation threshold value in battery recharging.

Description

A kind of charging circuit
Technical field
The utility model relates to the multimedia sensor network field, relates in particular to a kind of charging circuit.
Background technology
Fig. 1 is charger chip application schematic diagram in prior art.VCC connects the 5V direct voltage source, and BAT charges to battery.CC(Constant Current, constant current) the pattern charging current is arranged by resistance R 1.In the process that charges normal, LED1 is luminous.After charging finished, LED1 extinguished.
Fig. 2 is that prior art charger chip internal is about the schematic diagram of charge control loop.When being in normal charging condition, charger (is not in under-voltage locking, sleep or closed condition), control signal SLP_SHDN is always low level, charging finishing control signal CHRG_END is low level, field effect transistor MP3 is in all the time by state like this, can not affect the normal operation of the charge control loop that comprises operational amplifier CA, operational amplifier VA.In case charging finishes (this moment, the cell voltage representative value was 4.2V), signal CHRG_END is high level, the MP3 conducting, and then the grid of MP1 and MP2 is drawn be high level, described charge control loop is no longer worked.Due to system load power consumption and battery protection chip electric leakage, battery electric quantity begins to descend, until cell voltage reduces to recharging threshold value (representative value 4.05V), signal CHRG_END becomes low level, and charge loop is reworked, and beginning is charged to battery.
The shortcoming of existing scheme is that charge control loop is closed when the charger complete charge, and the system load power consumption causes battery electric quantity to descend.Need to postpone a period of time owing to recharging, the battery electric quantity of described reduction can not in time be replenished, and this application for some specific occasion is unacceptable, and described occasion requires battery electric quantity need to remain on the state that is full of always.
The utility model content
For the problems referred to above, the utility model embodiment proposes a kind of charging circuit, and described charging circuit comprises charging module and control module; Described charging module is used to the external cell charging; Described control module is used for controlling the charging of described charging module; Wherein, the described charging module of described control module continuation control is that described battery loads charging voltage when described battery charging finishes, when if described battery produces the operating voltage decline of discharging current or described battery, described charging module immediately is described battery charging.
The utility model embodiment makes battery electric quantity be in full state by battery is charged immediately always, has realized the battery recharge function of zero sluggishness.
Description of drawings
Fig. 1 is charger chip application schematic diagram in prior art;
Fig. 2 is that prior art charger chip internal is about the schematic diagram of charge control loop;
Fig. 3 is a kind of schematic diagram of the charging circuit of the utility model embodiment;
Fig. 4 A is the another kind of schematic diagram of the charging circuit of the utility model embodiment;
Fig. 4 B is another schematic diagram of the charging circuit of the utility model embodiment.
Embodiment
Below by drawings and Examples, the technical scheme of the utility model embodiment is described in further detail.
Fig. 3 is the schematic diagram of a kind of charging circuit of the utility model embodiment.In Fig. 3, charging circuit comprises charging module, control module and rechargeable battery Li-battery.Fig. 3 is than Fig. 2, deleted charging finishing control signal CHRG_END to the control of the charge loop that comprises operational amplifier CA and VA.
described charging module comprises: the first operational amplifier CA, the second operational amplifier VA, the 3rd operational amplifier MA, the first resistance R 1, the second resistance R 2, the 3rd resistance R 3, the first field effect transistor MP1, the second field effect transistor MP2, the 4th field effect transistor MP4, wherein the in-phase input end of the first operational amplifier is connected in the second terminal of the second resistance and the first terminal of the 3rd resistance, the second terminal of the second resistance is connected with the first terminal of the 3rd resistance, the output of the output of the first operational amplifier and the second operational amplifier all is connected to the grid of the first field effect transistor, the in-phase input end of the second operational amplifier is connected in the drain electrode of the 4th field effect transistor and the first terminal of the first resistance, the drain electrode of the 4th field effect transistor is connected with the first terminal of the first resistance, the source electrode of the 4th field effect transistor is connected with the drain electrode of the first field effect transistor and the inverting input of the 3rd operational amplifier, the grid of the 4th field effect transistor is connected with the output of the 3rd operational amplifier, the in-phase input end of the 3rd operational amplifier is connected in the first terminal of the second resistance and the drain electrode of the second field effect transistor, the first terminal of the second resistance is connected with the drain electrode of the second field effect transistor, the grid of the second field effect transistor is connected with the grid of the first field effect transistor, the source electrode of the second field effect transistor all is connected with supply power voltage VCC with the source electrode of the first field effect transistor, the second terminal of the first resistance and the second terminal of the 3rd resistance are connected, the first terminal of described the second resistance is connected with the positive pole of rechargeable battery, the second terminal of described the first resistance and the second terminal of the 3rd resistance all are connected with the negative pole of rechargeable battery.
Be connected in series a diode between the grid of the output of described the first operational amplifier VA and the first field effect transistor MP1, also be connected in series a diode between the grid of the output of the second operational amplifier CA and the first field effect transistor MP1.
The inverting input of the first amplifier VA is connected with the first reference voltage V REF2, and the inverting input of the second amplifier CA is connected with the second reference voltage V REF1, and described two reference voltages can provide by other division module or power module (not shown).
Described control module comprises: the 3rd field effect transistor MP3, inverter, wherein the source electrode of the 3rd field effect transistor MP3 is connected with described supply power voltage VCC, the grid of the 3rd field effect transistor MP3 is connected with the output of inverter, the drain electrode of the 3rd field effect transistor MP3 is connected with the grid of described the first field effect transistor MP1 and the grid of the second field effect transistor MP2, and the input of inverter is used for the input sleep or closes the SLP_SHDN signal.
Charging roughly can be divided into constant current CC stage and constant voltage CV stage.In the constant current charge stage, amplifier VA is inoperative to loop, only has amplifier CA, resistance R 1, MP1 and MP2 work, produces constant current.In the constant voltage charge stage, amplifier CA is inoperative to loop, only has amplifier VA, MP2, resistance R 2, resistance R 3 work, remains on the constant charging voltage of rechargeable battery positive pole.The effect of operational amplifier MA is to guarantee that MP1 is identical with MP2 drain voltage both, thereby guarantee to have the image current coupling between MP1 and MP2, namely the source current of MP1, drain current, grid current equal respectively source current, drain current, the grid current of MP2.
When charging does not finish, when the SLP_SHDN signal is low level, become through inverter the grid that high level is added on MP3, MP3 cut-off this moment, the drain voltage of MP3 is low-voltage, thereby the grid voltage of MP1, MP2 is also low-voltage, at this moment MP1, MP2 normally, can not affect the normal operation of the charge control loop that comprises amplifier CA and VA, can charge to battery.In case described sleep or close the SLP_SHDN signal when being high level means and wishes that charging circuit enters sleep or closed condition.This moment, the SLP_SHDN signal became low level signal through inverter, thereby make the MP3 conducting, thereby the drain voltage of MP3 will be high level, this draws direct grid voltage with MP1, MP2 and is high level, thereby cause MP1, MP2 cut-off, thereby cause comprising the no longer normal operation of the charge control loop of amplifier CA and VA, namely can not charge to battery.
After charging finished, in case battery produces discharging current, perhaps battery operating voltage occurred and descends, and described charge loop will continue battery is charged immediately, and the sluggishness that has realized recharging threshold value is zero.The typical cause that described battery produces discharging current is that battery is externally powered.The typical cause that operating voltage decline appears in described battery is battery drain.Can certainly be other reasons, not do restriction at this.Described battery is lithium battery preferably, can be also other rechargeable battery, and for example nickel-cadmium cell, do not do restriction at this.
Fig. 4 A is the another kind of schematic diagram of the charging circuit of the utility model embodiment.As Fig. 4, described charging circuit comprises charging module and control module; Described charging module is used to the external cell charging; Described control module is used for controlling the charging of described charging module; Wherein, the described charging module of described control module continuation control is that described battery loads charging voltage when described battery charging finishes, when if described battery produces the operating voltage decline of discharging current or described battery, described charging module immediately is described battery charging.
Preferably, described charging finishes to be specially: the charging current of described battery is 1/10th of constant-current phase (CC) charging current.
Preferably, described charging circuit also comprises detection module, carry out abnormality detection when being used to described battery charging, when the charging of described battery being detected when abnormal, generate battery charging abnormal signal and send to described control module, stopping according to the described charging module of described battery charging abnormal signal control for described control module is described battery charging.Charging circuit schematic diagram such as Fig. 4 B of this moment.
Preferably, described battery pressure drop occurs and is specially: described battery pressure drop occurs due to supplying power for outside or load power consumption.
The utility model embodiment makes battery electric quantity be in full state by battery is charged immediately always, has realized the battery recharge of zero sluggishness.
It should be noted last that, above embodiment is only unrestricted in order to the technical solution of the utility model to be described, although with reference to preferred embodiment, the utility model is had been described in detail, those of ordinary skill in the art is to be understood that, can modify or be equal to replacement the technical solution of the utility model, and not break away from the spirit and scope of technical solutions of the utility model.

Claims (7)

1. a charging circuit, is characterized in that, described charging circuit comprises charging module and control module;
Charging module is used to the external cell charging;
Control module is used for controlling the charging of described charging module; Wherein, when described battery charging finishes, it is that described battery loads charging voltage that described control module continues to control described charging module, if when described battery produces the operating voltage decline of discharging current or described battery, described charging module immediately is described battery charging.
2. charging circuit as claimed in claim 1, is characterized in that, described charging finishes to be specially: the charging current of described battery is 1/10th of constant-current phase charging current.
3. charging circuit as claimed in claim 1, it is characterized in that, described charging circuit also comprises detection module, carry out abnormality detection when being used to described battery charging, when the charging of described battery being detected when abnormal, generate battery charging abnormal signal and send to described control module, stopping according to the described charging module of described battery charging abnormal signal control for described control module is described battery charging.
4. charging circuit as described in one of claim 1-3, is characterized in that, described battery pressure drop occurs and is specially: described battery pressure drop occurs due to supplying power for outside or load power consumption.
5. charging circuit as claimed in claim 1, it is characterized in that, described charging module comprises: the first operational amplifier, the second operational amplifier, the 3rd operational amplifier, the first resistance, the second resistance, the 3rd resistance, the first field effect transistor, the second field effect transistor, the 4th field effect transistor, wherein the in-phase input end of the first operational amplifier is connected in the second terminal of the second resistance and the first terminal of the 3rd resistance, the second terminal of the second resistance is connected with the first terminal of the 3rd resistance, the output of the output of the first operational amplifier and the second operational amplifier all is connected to the grid of the first field effect transistor, the in-phase input end of the second operational amplifier is connected in the drain electrode of the 4th field effect transistor and the first terminal of the first resistance, the drain electrode of the 4th field effect transistor is connected with the first terminal of the first resistance, the source electrode of the 4th field effect transistor is connected with the drain electrode of the first field effect transistor and the inverting input of the 3rd operational amplifier, the grid of the 4th field effect transistor is connected with the output of the 3rd operational amplifier, the in-phase input end of the 3rd operational amplifier is connected in the first terminal of the second resistance and the drain electrode of the second field effect transistor, the first terminal of the second resistance is connected with the drain electrode of the second field effect transistor, the grid of the second field effect transistor is connected with the grid of the first field effect transistor, the source electrode of the second field effect transistor all is connected with supply power voltage with the source electrode of the first field effect transistor, the second terminal of the first resistance and the second terminal of the 3rd resistance are connected, the first terminal of described the second resistance is connected with the positive pole of rechargeable battery, the second terminal of described the first resistance and the second terminal of the 3rd resistance all are connected with the negative pole of rechargeable battery.
6. charging circuit as claimed in claim 5, it is characterized in that, be connected in series a diode between the grid of the output of described the first operational amplifier and the first field effect transistor, also be connected in series a diode between the grid of the output of the second operational amplifier and the first field effect transistor.
7. charging circuit as described in claim 5 or 6, it is characterized in that, described control module comprises: the 3rd field effect transistor, inverter, wherein the source electrode of the 3rd field effect transistor is connected with described supply power voltage, the grid of the 3rd field effect transistor is connected with the output of inverter, the drain electrode of the 3rd field effect transistor is connected with the grid of described the first field effect transistor and the grid of the second field effect transistor, and the input of inverter is used for input sleep or shutdown signal.
CN 201220621441 2012-11-22 2012-11-22 Charging circuit Expired - Fee Related CN202997612U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 201220621441 CN202997612U (en) 2012-11-22 2012-11-22 Charging circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 201220621441 CN202997612U (en) 2012-11-22 2012-11-22 Charging circuit

Publications (1)

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CN202997612U true CN202997612U (en) 2013-06-12

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CN 201220621441 Expired - Fee Related CN202997612U (en) 2012-11-22 2012-11-22 Charging circuit

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CN (1) CN202997612U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102931710A (en) * 2012-11-22 2013-02-13 无锡中星微电子有限公司 Charging circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102931710A (en) * 2012-11-22 2013-02-13 无锡中星微电子有限公司 Charging circuit
CN102931710B (en) * 2012-11-22 2014-09-03 无锡中星微电子有限公司 Charging circuit

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C14 Grant of patent or utility model
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CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20130612

Termination date: 20151122

EXPY Termination of patent right or utility model