CN202957235U - 贴面封装二极管料片的焊料防流装置 - Google Patents

贴面封装二极管料片的焊料防流装置 Download PDF

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CN202957235U
CN202957235U CN2012206910242U CN201220691024U CN202957235U CN 202957235 U CN202957235 U CN 202957235U CN 2012206910242 U CN2012206910242 U CN 2012206910242U CN 201220691024 U CN201220691024 U CN 201220691024U CN 202957235 U CN202957235 U CN 202957235U
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tablet
scolder
stream
solder
silicon
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安国星
李述洲
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Chongqing Pingwei Enterprise Co Ltd
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Chongqing Pingwei Enterprise Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/33Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)

Abstract

本实用新型公开了一种贴面封装二极管料片的焊料防流装置,所述贴面封装二极管料片包括上料片和下料片,所述上料片的下段侧表面与所述下料片的下段侧表面之间通过焊料焊接有硅芯片;所述下料片的中部用于与所述硅芯片焊接的位置设有用于阻挡焊料流出至边缘的环形防流沉槽。本实用新型通过设置环形防流沉槽,在焊接下料片和硅芯片时,若焊料偏多,则多余的焊料会流入环形防流沉槽内,而不会使硅芯片的焊点外区域变得潮湿,从而有效克服了因焊料流出至料片外引起的硅芯片性能下降的问题。

Description

贴面封装二极管料片的焊料防流装置
技术领域
本实用新型涉及一种贴面封装二极管料片,尤其涉及一种贴面封装二极管料片的焊料防流装置。
背景技术
目前,大功率贴面封装二极管的需求量和发展是当今热点并会非常迅速,随着产品线路板小型化而使产品小型化的发展趋势,特别是对大功率小型化贴面封装二极管发展更为迅速。为了保证贴片封装二极管大功率、小体积的需求,同时为了提高加工效率,本发明人发明了双料片结构的贴面封装二极管,即在硅芯片的两面分别焊接上料片和下料片,这种二极管在加工时不用连接片,所以操作简单、效率高,该技术在本申请人提出的其它专利中体现。这种结构中,若采用现有的全平面型料片,在焊接过程中可能出现因焊料过多流出导致硅芯片的性能下降的问题。
发明内容
本实用新型的目的就在于为了解决上述问题而提供一种使焊料不会流出焊点区域的贴面封装二极管料片的焊料防流装置。
本实用新型通过以下技术方案来实现上述目的:
本实用新型所述贴面封装二极管料片包括上料片和下料片,所述上料片的下段侧表面与所述下料片的下段侧表面之间通过焊料焊接有硅芯片;本实用新型所述焊料防流装置为:所述下料片的中部用于与所述硅芯片焊接的位置设有用于阻挡焊料流出至边缘的环形防流沉槽。由于焊料多出的量不会很大,所以只需在焊点区域周围设置具有一定容纳能力的环形防流沉槽即可实现对于焊料的储存,使其不会流出焊点区域。
具体地,所述环形防流沉槽的环形框为方形。
作为优选,所述环形防流沉槽为“V”形沉槽,其深度为0.02至0.07mm,其槽口宽度为0.2mm。
所述上料片与所述下料片均为铜片。
所述硅芯片为肖特基硅芯片。
本实用新型的有益效果在于:
本实用新型通过设置环形防流沉槽,在焊接下料片和硅芯片时,若焊料偏多,则多余的焊料会流入环形防流沉槽内,而不会使硅芯片的焊点外区域变得潮湿,从而有效克服了因焊料流出至料片外引起的硅芯片性能下降的问题。
附图说明
图1是本实用新型所述贴面封装二极管的主视结构示意图;
图2是本实用新型所述贴面封装二极管的右视结构示意图;
图3是本实用新型所述下料片的主视图;
图4是图3中的A-A剖视图。
具体实施方式
下面结合附图对本实用新型作进一步说明:
如图1和图2所示,图中虽标记了封装环氧树脂1,但为了示出其它部件,所以图中对封装环氧树脂1作了透明处理,所以图中标记的1仅示出了封装环氧树脂所在的一个区域。本实用新型所述贴面封装二极管的料片包括上铜片3和下铜片2,上铜片3的下段侧表面与下铜片2的下段侧表面之间通过焊料9焊接有肖特基硅芯片8,封装环氧树脂1封装于肖特基硅芯片8、上铜片3和下铜片2的外面,上铜片3的上端片10、下铜片2的下端片11和下铜片2的外表面均置于封装环氧树脂外;图1和图3中还示出了下铜片2上设置的用于增加抗拉和抗压强度的凹口4。
如图3和图4所示,下铜片2的中部用于与肖特基硅芯片8焊接的位置设有用于阻挡焊料9流出至边缘的环形防流沉槽5,环形防流沉槽5的环形框为方形,环形防流沉槽5为“V”形沉槽,其深度为0.02至0.07mm,其槽口宽度为0.2mm。由于焊料9多出的量不会很大,所以只需在焊点区域周围设置具有一定容纳能力的环形防流沉槽5即可实现对于焊料9的储存,使其不会流出焊点区域,从而不会使肖特基硅芯片8的焊点外区域变得潮湿,有效克服了因焊料9流出至下铜片2外引起的肖特基硅芯片8的性能下降的问题。

Claims (5)

1.一种贴面封装二极管料片的焊料防流装置,所述贴面封装二极管料片包括上料片和下料片,所述上料片的下段侧表面与所述下料片的下段侧表面之间通过焊料焊接有硅芯片;其特征在于:所述下料片的中部用于与所述硅芯片焊接的位置设有用于阻挡焊料流出至边缘的环形防流沉槽。
2.根据权利要求1所述的贴面封装二极管料片的焊料防流装置,其特征在于:所述环形防流沉槽的环形框为方形。
3.根据权利要求1或2所述的贴面封装二极管料片的焊料防流装置,其特征在于:所述环形防流沉槽为“V”形沉槽,其深度为0.02至0.07mm,其槽口宽度为0.2mm。
4.根据权利要求1或2所述的贴面封装二极管料片的焊料防流装置,其特征在于:所述上料片与所述下料片均为铜片。
5.根据权利要求1所述的贴面封装二极管料片的焊料防流装置,其特征在于:所述硅芯片为肖特基硅芯片。
CN2012206910242U 2012-12-14 2012-12-14 贴面封装二极管料片的焊料防流装置 Expired - Lifetime CN202957235U (zh)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105742266A (zh) * 2016-04-21 2016-07-06 淄博晨启电子有限公司 固定塑封本体

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105742266A (zh) * 2016-04-21 2016-07-06 淄博晨启电子有限公司 固定塑封本体
CN105742266B (zh) * 2016-04-21 2019-01-04 淄博晨启电子有限公司 固定塑封本体

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