CN202940620U - Battery charging circuit and control circuit thereof - Google Patents
Battery charging circuit and control circuit thereof Download PDFInfo
- Publication number
- CN202940620U CN202940620U CN 201220646600 CN201220646600U CN202940620U CN 202940620 U CN202940620 U CN 202940620U CN 201220646600 CN201220646600 CN 201220646600 CN 201220646600 U CN201220646600 U CN 201220646600U CN 202940620 U CN202940620 U CN 202940620U
- Authority
- CN
- China
- Prior art keywords
- output
- signal
- input
- coupled
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 230000000979 retarding effect Effects 0.000 claims description 24
- 238000001514 detection method Methods 0.000 claims description 21
- 230000001939 inductive effect Effects 0.000 claims description 15
- 239000003990 capacitor Substances 0.000 claims description 13
- 238000007599 discharging Methods 0.000 claims description 6
- 238000000034 method Methods 0.000 abstract description 6
- 238000010586 diagram Methods 0.000 description 12
- 239000004065 semiconductor Substances 0.000 description 4
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 2
- 230000000630 rising effect Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000007634 remodeling Methods 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
Images
Landscapes
- Charge And Discharge Circuits For Batteries Or The Like (AREA)
Abstract
The utility model provides a battery charging circuit and control circuit thereof, battery charging circuit is used for controlling the charging to the battery, including power circuit, control circuit includes: the circuit comprises a feedback amplifier, a selection circuit, a hysteresis control circuit, a comparison circuit and a logic circuit. The logic circuit outputs a control signal to control the power circuit, thereby controlling the charging process of the battery.
Description
Technical field
The utility model relates to switching circuit, and more particularly, the utility model relates to battery charger and the control circuit thereof in switching circuit.
Background technology
Battery charger is for controlling the charging to battery.Generally, the course of work of battery charger is divided two stages, is at first constant-current phase, is then constant-voltage phase.The battery charger that the sluggish mode of traditional employing is controlled is realized the constant current in battery charging process is controlled by the bound that limits inductive current.As shown in Figure 1, control circuit 100 detects inductive current, generates current detection signal Ics, and detects cell voltage Vbatt generation feedback voltage Vfb by feedback resistance R1 and R2.Based on current detection signal Ics and feedback voltage Vfb, control circuit generates the break-make that control signal G1 comes power ratio control switch M1 and M2, and then realizes the control to battery charging process.But the frequency range of the battery charger that the sluggish mode of traditional employing is controlled is larger, can not meet the application that frequency range is had to requirement.
The utility model content
Consider one or more technical problems of prior art, proposed a kind of battery charger and control circuit.
Embodiment according to present technique, a kind of control circuit of battery charger has been proposed, described battery charger is for controlling the charging to battery, comprise power circuit, described control circuit comprises: feedback amplifier, have the feedback signal of first input end, the second input and output, described first input end reception sign charging voltage, described the second input receives the feedback reference signal, described output output feedback amplifying signal, select circuit, there is first input end, the second input and output, described first input end received current reference signal, described the second input is coupled to the output of feedback amplifier, receives the feedback amplifying signal, described output output current control signal, hysteresis control circuit, there is first input end, the second input, the 3rd input, four-input terminal, the 5th input, the first output and the second output, described first input end is coupled to the output of selecting circuit, the received current control signal, described the second input receives input voltage, described the 3rd input receives charging voltage, described four-input terminal is coupled to the output reception control signal of control circuit, when being received in the power circuit conducting, described the 5th input produces the frequency signal of pulse, limited signal under described the first output output current, limited signal on described the second output output current, comparison circuit, there is first input end, the second input, the 3rd input, the first output and the second output, described first input end is coupled to the first output of hysteresis control circuit, limited signal under received current, described the second input is coupled to the second output of hysteresis control circuit, limited signal on received current, the output that described the 3rd input is coupled to current detection circuit receives the current detection signal that characterizes inductive current, described the first output output asserts signal, described the second output output reset signal, logical circuit, have set end, reset terminal and output, and described set end is coupled to the first output of comparison circuit, receive asserts signal, described reset terminal is coupled to the second output of comparison circuit, receives reset signal, described output output control signal.
In one embodiment, described selection circuit comprises: diode, there is cathode terminal and anode tap, and the output that described cathode terminal is coupled to feedback amplifier receives the feedback amplifying signal; And resistance, thering is first end and the second end, described first end is coupled to the anode tap of described diode, and described the second termination is received current reference signal; Wherein, when described selection circuit is less than or equal to the feedback amplifying signal at current reference signal, in the tie point output current reference signal of diode and resistance; When current reference signal is greater than the feedback amplifying signal, at the tie point output feedback amplifying signal of diode and resistance.
In one embodiment, described selection circuit comprises: select comparator, there is first input end, the second input and output, wherein said first input end received current reference signal, described the second input is coupled to the output of feedback amplifier, receive the feedback amplifying signal, signal is selected in described output output; Single-pole double-throw switch (SPDT), there is first input end, the second input, output and control end, wherein said first input end is coupled to the output of feedback amplifier, receive the feedback amplifying signal, described the second input received current reference signal, described control end is coupled to comparator, receives and selects signal, and described output output current reference signal or feedback amplifying signal are as current controling signal.
In one embodiment, described hysteresis control circuit comprises: sluggish signal generating circuit, there is first input end, the second input, the 3rd input, four-input terminal and output, described first input end receives input voltage, described the second input receives charging voltage, and described the 3rd input is coupled to the output of control circuit, reception control signal, described four-input terminal is received in the frequency signal that each switch periods produces pulse, described output output retarding window signal; And computing circuit, there is first input end, the second input, the first output and the second output, described first input end is coupled to sluggish signal generating circuit, receive the retarding window signal, described the second input is coupled to the output of selecting circuit, the received current control signal, limited signal under described the first output output current, limited signal on described the second output output current.
In one embodiment, described sluggish signal generating circuit comprises: constant Continuity signal produces circuit, there is first input end, the second input, the 3rd input and output, described first input end receives input voltage, described the second input is coupled to battery, receive charging voltage, described the 3rd input receiving frequency signals, described output is exported constant Continuity signal; Charge-discharge circuit, there is first input end, the second input and output, wherein said first input end is coupled to the output that constant Continuity signal produces circuit, receive constant Continuity signal, described the second input is coupled to the output of control circuit, reception control signal, described output provides charging and discharging currents; And sluggish electric capacity, thering is first end and the second end, wherein said first end is coupled to the output of charge-discharge circuit, receives charging and discharging currents, described the second end ground connection, described electric capacity provides the retarding window signal at first end.
In one embodiment, described constant Continuity signal produces circuit and comprises: the first controlled current source, there is input and output, and described input receives input voltage, and described output provides charging current; Reference capacitance, have the output that first end and the second end, described first end are coupled to the first controlled current source, receives charging current, described the second end ground connection, and described reference capacitance provides sawtooth signal at first end; Controlled voltage source, have first end, the second end and control end, and described the second end ground connection, described control end is coupled to battery, receives charging voltage, the described first end output reference signal relevant to charging voltage; And constant conducting comparator, there is first input end, the second input and output, wherein said first input end is coupled to the first end of reference capacitance, receive sawtooth signal, described the second input is coupled to the first end of controlled voltage source, receive reference signal, described output is exported constant Continuity signal.
In one embodiment, described charge-discharge circuit comprises: the second current source has input and output; The first switch, have first end, the second end and control end, and described first end is coupled to the output of the second current source, described the second end ground connection, and described control end is coupled to the output that constant Continuity signal produces circuit, receives constant Continuity signal; Second switch, have first end, the second end and control end, and described first end is coupled to the first end of sluggish electric capacity, and described the second end is coupled to the input of the second current source, and described control end is coupled to the output reception control signal of control circuit; The 3rd switch, have first end and the second end, and described first end is coupled to the output of the second current source, and described the second end is coupled to the first end of sluggish electric capacity; And the 4th switch, there is first end and the second end, described first end ground connection, described the second end is coupled to the input of the second current source; Wherein the second current source is when the conducting duration of the conducting duration of control signal and constant Continuity signal is unequal, to sluggish capacitor charging.
In one embodiment, described computing circuit comprises: the second controlled current source, there is first end, the second end and control end, wherein said first end receives input voltage, described control end is coupled to the output of sluggish signal generating circuit, receive the retarding window signal, the electric current that described the second end output current value is directly proportional to the retarding window signal; The first resistance, have first end and the second end, limited signal on described first end output current; The second resistance, have first end and the second end, and described first end is coupled to the second end of the first resistance, limited signal under described the second end output current; The 3rd resistance, have first end and the second end, the second end of described first end to the second resistance, described the second end ground connection; And clamp circuit has first end and the second end, described first end is coupled to the output of selecting circuit, the received current control signal, and described the second end is coupled to the tie point of the first resistance and the second resistance.
In one embodiment, described comparison circuit comprises: the lower limit comparator, there is first input end, the second input and output, wherein said first input end is coupled to the first output of hysteresis control circuit, limited signal under received current, described the second input is coupled to the output of current detection circuit, received current detection signal, described output output asserts signal; And upper limit comparator, there is first input end, the second input and output, wherein said first input end is coupled to the second output of hysteresis control circuit, limited signal on received current, described the second input is coupled to the output of current detection circuit, the received current detection signal, described output output reset signal.
In one embodiment, described logical circuit comprises rest-set flip-flop, there is set end, reset terminal and output, the first output that described set end is coupled to comparison circuit receives asserts signal, described reset terminal is coupled to the second output of comparison circuit, receive reset signal, described output output control signal.
According to the embodiment of present technique, a kind of battery charger has also been proposed, comprise above-mentioned any control circuit, also comprise: inductance, have first end and the second end, described first end is coupled to the output of power circuit, and described the second end provides charging current to battery; Output capacitance, have first end and the second end, and described first end is coupled to the second end of inductance, described the second end ground connection; Wherein said power circuit has input, earth terminal, output and control end, and described input receives input voltage, described earth terminal ground connection, and described control end is coupled to the output of control circuit, reception control signal; The first end of described inductance receives input voltage, ground connection when power circuit turn-offs when the power circuit conducting.
The battery charger of the above-mentioned each side of the utility model and control circuit thereof, circuit structure is simple, and without compensating circuit, and circuit work frequency fixes, and met the application that frequency range is had to requirement.
The accompanying drawing explanation
In order better to understand the utility model, will to the utility model, be described in detail according to the following drawings:
Fig. 1 shows the structural representation of battery charger of the prior art;
Fig. 2 shows the structural representation according to the battery charger of the utility model one embodiment;
The waveform schematic diagram of each signal when Fig. 3 shows the battery charger work in Fig. 2;
Fig. 4 shows the particular circuit configurations schematic diagram according to each module in the control circuit 200 of the utility model one embodiment;
Fig. 5 shows the electrical block diagram according to the sluggish signal generating circuit 401 of the utility model one embodiment;
Fig. 6 shows each signal waveform schematic diagram in the sluggish signal generating circuit 401 of Fig. 5;
Fig. 7 shows the electrical block diagram according to the computing circuit 402 of the utility model one embodiment;
Fig. 8 shows the electrical block diagram according to the selection circuit 202 of the utility model one embodiment.
Embodiment
Below will describe specific embodiment of the utility model in detail, it should be noted that the embodiments described herein, only for illustrating, is not limited to the utility model.In the following description, in order to provide thorough understanding of the present utility model, a large amount of specific detail have been set forth.Yet, for those of ordinary skills, it is evident that: needn't adopt these specific detail to carry out the utility model.In other examples, for fear of obscuring the utility model, do not specifically describe known circuit, material or method.
In whole specification, " embodiment ", " embodiment ", " example " or mentioning of " example " are meaned: special characteristic, structure or characteristic in conjunction with this embodiment or example description are comprised at least one embodiment of the utility model.Therefore, phrase " in one embodiment ", " in an embodiment ", " example " or " example " occurred in each place of whole specification differs to establish a capital and refers to same embodiment or example.In addition, can with any suitable combination and/or sub-portfolio by specific feature, structure or property combination in one or more embodiment or example.In addition, it should be understood by one skilled in the art that the accompanying drawing provided at this is all for illustrative purposes, and accompanying drawing is not necessarily drawn in proportion.Should be appreciated that when claiming element " to be connected to " or during " being couple to " another element, it can be directly connected or coupled to another element or can have intermediary element.On the contrary, when claiming element " to be directly connected to " or during " being directly coupled to " another element, not having intermediary element.Identical Reference numeral is indicated identical element.Term used herein " and/or " comprise any and all combinations of one or more relevant projects of listing.
Fig. 2 shows the structural representation according to the battery charger of the utility model one embodiment.Battery charger receives input voltage vin, and output charging current and charging voltage Vbatt are to battery.Described battery charger comprises: control circuit 200, output control signal G1; Power circuit 210, there is input, earth terminal, output and control end, described input receives input voltage vin, described earth terminal ground connection, described control end is coupled to the output reception control signal G1 of control circuit 200, based on described control signal G1, described power circuit 210 or conducting or shutoff; Inductance L, have first end and the second end, and described first end is coupled to the output of power circuit 210, and described the second end provides charging current to battery; And output capacitance Cout, thering is first end and the second end, described first end is coupled to the second end of inductance, described the second end ground connection; Wherein, when power circuit 210 conducting, the first end of inductance L receives input voltage vin; When power circuit 210 turn-offs, the first end ground connection of inductance L.
In Fig. 2, described power circuit 210 comprises and draws power tube M1 and drop-down power tube M2.On draw power tube M1 conducting, the operating state that drop-down power tube M2 turn-offs is defined as power circuit 210 conductings, also is defined as the battery charger conducting simultaneously; On draw power tube M1 to turn-off, the operating state of drop-down power tube M2 conducting is defined as power circuit 210 and turn-offs, and also is defined as battery charger simultaneously and turn-offs.In one embodiment, above draw power tube M1 and drop-down power tube M2 to comprise MOSFET (metal oxide semiconductor field effect tube), the controllable semiconductor device such as triode.Described power circuit 210 also comprises inverter 209, and reception control signal G1 exports the break-make that the signal G2 contrary with control signal G1 controls drop-down power tube M2.In one embodiment, above draw power tube M1 to comprise MOSFET, the controllable semiconductor device such as triode, drop-down power tube M2 comprises the semiconductor device such as diode.
As shown in Figure 2, described control circuit 200 comprises: feedback amplifier 201, there is first input end, the second input and output, described first input end receives the feedback signal Vfb that characterizes charging voltage Vbatt, described the second input receives feedback reference signal Vref1, based on described feedback signal Vfb and feedback reference signal Vref1, described feedback amplifier 201 is at output output feedback amplifying signal Vcom, select circuit 202, there is first input end, the second input and output, described first input end received current reference signal Vic, the output that described the second input is coupled to feedback amplifier 201 receives feedback amplifying signal Vcom, based on described current reference signal Vic and feedback amplifying signal Vcom, described selection circuit 202 generates current controling signal Vmid and outputs to output, hysteresis control circuit 203, there is first input end, the second input, the 3rd input, four-input terminal, the 5th input, the first output and the second output, described first input end is coupled to the output received current control signal Vmid that selects circuit, described the second input receives input voltage vin, described the 3rd input receives charging voltage Vbatt, described four-input terminal is coupled to the output reception control signal G1 of control circuit 200, when being received in power circuit 210 conducting, described the 5th input produces the frequency signal FRE of pulse, based on described current controling signal Vmid, input voltage vin, charging voltage Vbatt, control signal G1 and frequency signal FRE, described hysteresis control circuit 203 is limited signal Vhys_L under the first output output current, limited signal Vhys_H on the second output output current, comparison circuit 206, there is first input end, the second input, the 3rd input, the first output and the second output, described first input end is coupled to limited signal Vhys_L under the first output received current of hysteresis control circuit 203, described the second input is coupled to limited signal Vhys_H on the second output received current of hysteresis control circuit 203, described the 3rd input receives the current detection signal Ics that characterizes inductive current, based on described upper current limit signal Vhys_H, described lower current limit signal Vhys_L and current detection signal Ics, described comparison circuit 206 is at the first output output asserts signal Vs, at the second output output reset signal Vr, logical circuit 207, there is set end S, reset terminal R and output Q, the first output that described set end S is coupled to comparison circuit 206 receives asserts signal Vs, the second output that described reset terminal R is coupled to comparison circuit 206 receives reset signal Vr, based on described asserts signal Vs and reset signal Vr, described logical circuit 207 is at output output control signal G1.
The waveform schematic diagram of each signal when Fig. 3 shows the battery charger work in Fig. 2.Set forth the course of work of the battery charger in Fig. 2 below in conjunction with Fig. 2 and Fig. 3.As seen from Figure 3, the work of battery charger mainly is divided into constant current and two stages of constant voltage.At cell voltage, Vbatt does not reach set point, and when the value of feedback voltage Vfb is less than feedback reference signal Vref1, battery charger is operated in constant current mode.Under this pattern, because feedback voltage Vfb is less than feedback reference signal Vref1, feedback amplifier 201 is saturated, the value of feedback amplifying signal Vcom is greater than the value (current reference signal Vic is default fixed value) of current reference signal Vic, selects circuit 202 to select current reference signal Vic to export hysteresis control circuit 203 to as current controling signal Vmid.Hysteresis control circuit 203 generates upper current limit signal Vhys_H and lower current limit signal Vhys_L based on input voltage vin, charging voltage Vbatt, control signal G1, current controling signal Vmid and frequency signal FRE.Limited signal Vhys_H on comparison circuit 206 received currents, lower current limit signal Vhys_L, and the current detection signal Ics that characterizes inductive current.When current detection signal Ics drops to lower current limit signal Vhys_L, comparison circuit 206 output asserts signal Vs carry out set logic circuit 207, control signal G1 opens and draws power tube M1, turn-off drop-down power tube M2, thereby make inductance couple input voltage vin, inductive current rises, and current detection signal Ics increases.When current detection signal Ics rises to upper current limit signal Vhys_H, comparison circuit 206 output reset signal Vr carry out reseting logic circuit 207, control signal G1 draws power tube M1 on turn-offing, the drop-down power tube M2 of conducting, thereby make inductance L ground connection, inductive current descends, and current detection signal Ics reduces.The mean value that current controling signal Vmid is upper current limit signal Vhys_H and lower current limit signal Vhys_L, that is to say the inductance average current, i.e. charging current just corresponding to the value of current controling signal Vmid, thereby realizes that constant current controls.
After feedback voltage Vfb rises to feedback reference signal Vref1, battery charger enters constant voltage mode.Due to the increase of feedback voltage Vfb, feedback amplifying signal Vcom starts to descend.When feedback amplifying signal Vcom is less than or equal to current reference signal Vic, select circuit 202 to select feedback amplifying signal Vcom to export hysteresis control circuit 203 to as current controling signal Vmid.As previously mentioned, inductive current mean value, charging current is controlled corresponding to feedback amplifying signal Vcom.When feedback voltage Vfb continues to rise, feedback amplifying signal Vcom descends, and charging current is corresponding descends, thereby charging voltage Vbatt is descended.Therefore feedback voltage Vfb can not continue to rise, and will be equaled feedback reference signal Vref1 by control, and charging voltage Vbatt will be steady state value under stable case, thereby realizes constant voltage control.
In one embodiment, logical circuit 207 comprises rest-set flip-flop, there is set end S, reset terminal R and output Q, the first output that described set end S is coupled to comparison circuit 206 receives asserts signal Vs, the second output that described reset terminal R is coupled to comparison circuit receives reset signal Vr, based on described asserts signal Vs and reset signal Vr, described logical circuit 207 is at output output control signal G1.
In one embodiment, power circuit 210 also comprises drive circuit, and reception control signal G1 and G2 export respectively the control end that draws power tube M1 and drop-down power tube M2 to after the driving force of control signal G1 and G2 is increased.
Fig. 4 shows the particular circuit configurations schematic diagram according to each module in the control circuit 200 of the utility model one embodiment.
In one embodiment, select circuit 202 to comprise: diode D1, there is cathode terminal and anode tap, the output that described cathode terminal is coupled to feedback amplifier 201 receives feedback amplifying signal Vcom; And resistance R 3, thering is first end and the second end, described first end is coupled to the anode tap of described diode D1, and described the second termination is received current reference signal Vic; Wherein, when current reference signal Vic is less than or equal to feedback amplifying signal Vcom, diode D1 turn-offs, and current reference signal Vmid equals current reference signal Vic; When current reference signal Vic is greater than feedback amplifying signal Vcom, diode D1 conducting, current reference signal Vmid equals to feed back amplifying signal Vcom.
In one embodiment, hysteresis control circuit 203 comprises: sluggish signal generating circuit 401, there is first input end, the second input, the 3rd input, four-input terminal and output, described first input end receives input voltage vin, described the second input receives charging voltage Vbatt, described the 3rd input is coupled to the output reception control signal G1 of control circuit 200, described four-input terminal receiving frequency signals FRE, based on described input voltage vin, charging voltage Vbatt, control signal G1 and frequency signal FRE, described sluggish signal generating circuit 401 is at output output retarding window signal Vhys, and computing circuit 402, there is first input end, the second input, the first output and the second output, described first input end is coupled to sluggish signal generating circuit 401 and receives retarding window signal Vhys, described the second input is coupled to the output received current control signal Vmid that selects circuit 202, based on described retarding window signal Vhys and current controling signal Vmid, described computing circuit 402 is limited signal Vhys_L under the first output output current, limited signal Vhys_H on the second output output current.
In one embodiment, described frequency signal FRE comprises asserts signal Vs.Described asserts signal Vs produces pulse set rest-set flip-flop and draws power tube M1 to produce in control signal G1 conducting in each switch periods.Frequency signal FRE also can comprise any at the upper signal that produces pulse while drawing power tube M1 conducting.
Fig. 5 shows the electrical block diagram according to the sluggish signal generating circuit 401 of the utility model one embodiment.In Fig. 5, sluggish signal generating circuit 401 comprises: constant Continuity signal produces circuit 501, there is first input end, the second input, the 3rd input and output, described first input end receives input voltage vin, described the second input receives charging voltage Vbatt, described the 3rd input receives asserts signal Vs, based on described input voltage vin, charging voltage Vbatt and asserts signal Vs, described constant Continuity signal produces circuit 501 and exports constant Continuity signal Ton_ref at output; Charge-discharge circuit 502, there is first input end, the second input and output, the output that wherein said first input end is coupled to constant Continuity signal generation circuit 501 receives constant Continuity signal Ton_ref, described the second input is coupled to the output reception control signal G1 of control circuit 200, based on described constant Continuity signal Ton_ref and control signal G1, described charge-discharge circuit 502 provides charging and discharging currents at output; And sluggish capacitor C 1, thering is first end and the second end, the output that wherein said first end is coupled to charge-discharge circuit 502 receives charging and discharging currents, described the second end ground connection, described sluggish capacitor C 1 provides retarding window signal Vhys at first end.
In one embodiment, described constant Continuity signal produces circuit 501 and comprises: the first controlled current source I1, there is input, output and control end, and described input receives supply power voltage Vcc, described control end receives input voltage vin, and described output provides charging current Ic; Reference capacitance C2, have first end and the second end, and the output that described first end is coupled to the first controlled current source I1 receives charging current Ic, described the second end ground connection, and described reference capacitance C2 provides sawtooth signal Vc2 at first end; Frequency switching Ms, have first end, the second end and control end, and described first end and the second end are coupled to the two ends of reference capacitance C2, and described control end receives asserts signal Vs, when asserts signal Vs produces pulse, and described frequency switching Ms conducting; Controlled voltage source V1, there is first end, the second end and control end, described the second end ground connection, described control end is coupled to battery and receives charging voltage Vbatt, based on described charging voltage Vbatt, described controlled voltage source V1 is at the first end output constant conducting reference signal Vref2 relevant to charging voltage Vbatt; And constant conducting comparator 5011, there is first input end (inverting input), the second input (normal phase input end) and output, the first end that wherein said first input end is coupled to reference capacitance C2 receives sawtooth signal Vc2, the first end that described the second input is coupled to controlled voltage source V1 receives constant conducting reference signal Vref2, based on described sawtooth signal Vc2 and constant conducting reference signal Vref2, described constant conducting comparator 5011 is exported constant Continuity signal Ton_ref at output.In another embodiment, charge-discharge circuit 502 also comprises inverter 503, be coupled between the control end that constant Continuity signal produces the output of circuit 501 and the first switch Q1, receive constant Continuity signal Ton_ref, export anti-phase constant Continuity signal Ton_ref.
In one embodiment, the relation of the charging current Ic of the first controlled current source I1 output and input voltage vin is as follows:
Ic＝K1×Vin (1)
Wherein K1 is fixed constant.
In one embodiment, the relation of the constant conducting reference signal Vref2 of controlled voltage source V1 output and charging voltage Vbatt is as follows:
Vref2＝K2×Vbatt (2)
Wherein K2 is fixed constant.
In a switch periods, when asserts signal Vs produces pulse, described frequency switching Ms conducting, reference capacitance C2 is discharged, and sawtooth signal Vc2 reduces to zero, and constant Continuity signal Ton_ref is low level, after the end-of-pulsing of asserts signal Vs, frequency switching Ms turn-offs, the first controlled current source I1 starts to charge to reference capacitance C2, sawtooth signal Vc2 rises with certain slope, when sawtooth signal Vc2 rises to constant conducting reference signal Vref2, constant conducting comparator 5011 upsets, constant Continuity signal Ton_ref saltus step is high level, sawtooth signal Vc2 continues to rise, until next switch periods is while arriving, the pulse turn-on frequency switch Ms of asserts signal Vs, make reference capacitance C2 be discharged, constant conducting comparator 5011 upsets, constant Continuity signal Ton_ref saltus step is low level.Go round and begin again, make constant Continuity signal Ton_ref there is waveform shown in Fig. 6.In one embodiment, the high level duration of constant Continuity signal Ton_ref is defined as the conducting duration, and the low level duration is defined as turn-offing duration.Because the conducting duration of Ton_ref is constant, therefore also be defined as constant conducting duration.
The conducting duration TON of constant Continuity signal Ton_ref is as follows:
In one embodiment, charge-discharge circuit 502 comprises: the second current source I2 has input and output; The first switch Q1, there is first end, the second end and control end, described first end is coupled to the output of the second current source I2, described the second end ground connection, and the output that described control end is coupled to constant Continuity signal generation circuit 501 receives constant Continuity signal Ton_ref; Second switch Q2, have first end, the second end and control end, and described first end is coupled to the first end of sluggish capacitor C 1, and described the second end is coupled to the input of the second current source I2, and described control end is coupled to the output reception control signal G1 of control circuit; The 3rd switch D1, have first end and the second end, and described first end is coupled to the output of the second current source I2, and described the second end is coupled to the first end of sluggish capacitor C 1; And the 4th switch D2, there is first end and the second end, described first end ground connection, described the second end is coupled to the input of the second current source I2; Wherein when the conducting duration (drawing the conducting duration of power tube M1) of control signal G1 while being less than the conducting duration of constant Continuity signal Ton_ref, the second current source I2 is to sluggish capacitor C 1 charging; When the conducting duration of control signal G1 is greater than the conducting duration of constant Continuity signal Ton_ref, the second current source I2 is to sluggish capacitor C 1 electric discharge.
Fig. 6 shows each signal waveform schematic diagram in the sluggish signal generating circuit 401 of Fig. 5.Specifically set forth the operation principle of sluggish signal generating circuit 401 below in conjunction with Fig. 5 and Fig. 6.From front, described, constant Continuity signal Ton_ref has constant conducting duration.At interval t1, control signal G1 and constant Continuity signal Ton_ref are high level, and the first switch Q1 turn-offs, second switch Q2 conducting, flow through the 3rd switch D1 and second switch Q2 of the electric current of the second current source I2 forms loop, and the retarding window signal Vhys on sluggish capacitor C 1 remains unchanged; At interval t2, control signal G1 is high level, and constant Continuity signal Ton_ref is low level, the first switch Q1 and the equal conducting of second switch Q2, the electric current of the second current source I2 second switch Q2 that flows through, the first switch Q1, give sluggish capacitor C 1 electric discharge, retarding window signal Vhys reduces; At interval t3, control signal G1 and constant Continuity signal Ton_ref are low level, the first switch Q1 conducting, and second switch Q2 turn-offs, flow through the first switch Q1 and the 4th switch D2 of the electric current of the second current source I2 forms path, and the retarding window signal Vhys on sluggish capacitor C 1 remains unchanged.When the conducting duration of control signal G1 is greater than the conducting duration of constant Continuity signal Ton_ref, the second current source I2 will, to sluggish capacitor C 1 electric discharge, reduce retarding window signal Vhys.
In one embodiment, when the signal of the first switch Q1 control end is low level, the first switch Q1 conducting; When the signal of second switch Q2 control end is high level, second switch Q2 conducting.In one embodiment, when the signal of the first switch Q1 control end is high level, the first switch Q1 conducting; When the signal of second switch Q2 control end is high level, second switch Q2 conducting.
Same, when the conducting duration of control signal G1 is less than the conducting duration of constant Continuity signal Ton_ref, the first switch Q1 and second switch Q2 all turn-off, and the electric current of the second current source I2 is flowed through the 3rd switch D1 and the 4th switch D2 to sluggish capacitor C 1 charging, and retarding window signal Vhys increases.
From above content, when the conducting duration of control signal G1 is greater than the conducting duration of constant Continuity signal Ton_ref, retarding window signal Vhys reduces, in next switch periods, the bound of inductive current IL reduces, because the rate of rise of inductive current IL is constant, the rising duration of inductive current IL reduces, and that is to say that the conducting duration of control signal G1 reduces; When the conducting duration of control signal G1 is less than the conducting duration of constant Continuity signal Ton_ref, retarding window signal Vhys increases, in next switch periods, the bound of inductive current IL increases, because the rate of rise of inductive current IL is constant, the rising duration of inductive current IL increases, and that is to say that the conducting duration of control signal G1 increases.That is to say, the conducting duration of control signal G1 will be equaled by control the conducting duration TON of constant Continuity signal Ton_ref.
The switching frequency fsw that can obtain battery charger according to formula (3) is:
In formula (4), the duty cycle of switching that D is current charging circuit.From formula (4), the frequency f sw of battery charger is a fixed value, and its size is only relevant with the capacitance of constant K 1, K2 and reference capacitance C2.
Fig. 7 shows the electrical block diagram according to the computing circuit 402 of the utility model one embodiment.As shown in Figure 7, computing circuit 402 comprises: the second controlled current source Ihys, there is first end, the second end and control end, wherein said first end receives supply power voltage Vcc, the output that described control end is coupled to sluggish signal generating circuit 401 receives retarding window signal Vhys, electric current K3 * Vhys that described the second controlled current source Ihys is directly proportional to retarding window signal Vhys at the second end output current value under the control of retarding window signal Vhys; The first resistance R 4, have first end and the second end, limited signal Vhsy_H on described first end output current; The second resistance R 5, have first end and the second end, and described first end is coupled to the second end of the first resistance R 4, limited signal Vhys_L under described the second end output current; The 3rd resistance R 6, have first end and the second end, the second end of described first end to the second resistance R 5, described the second end ground connection; And clamp circuit 701 has first end and the second end, described first end is coupled to the output received current control signal Vmid that selects circuit 202, described the second end is coupled to the tie point of the first resistance R 4 and the second resistance R 5, by the voltage clamp of the tie point of the first resistance R 4 and the second resistance R 5 to current controling signal Vmid.
In one embodiment, described supply power voltage Vcc equals input voltage vin.
The value that can draw upper current limit signal Vhsy_H and lower current limit signal Vhsy_L from Fig. 7 is as follows respectively:
The resistance that is resistance R 4 and R5 equates, and the product of the Its Controllable Factors K3 of this resistance value and the second controlled current source Ihys is 0.5.
Those of ordinary skills should be understood that computing circuit 402 can be realized by any circuit that can produce upper current limit signal Vhsy_H as shown in formula (5) and (6) and lower current limit signal Vhsy_L.Embodiment of the present utility model there is no need the various implementations of exhaustive computing circuit 402.
Fig. 8 shows the electrical block diagram according to the selection circuit 202 of the utility model one embodiment.As shown in Figure 8, select circuit 202 to comprise: to select comparator 801, there is first input end, the second input and output, wherein said first input end received current reference signal Vic, the output that described the second input is coupled to feedback amplifier 201 receives feedback amplifying signal Vcom, based on described current reference signal Vic and feedback amplifying signal Vcom, described selection comparator 801 is selected signal 803 in output output; Single-pole double-throw switch (SPDT) 802, there is first input end, the second input, output and control end, the output that wherein said first input end is coupled to feedback amplifier 201 receives feedback amplifying signal Vcom, described the second input received current reference signal Vic, described control end is coupled to selects comparator 801 to receive selection signal 803, based on described selection signal 803, described output output current reference signal Vic or feedback amplifying signal Vcom are as current controling signal Vmid.
In one embodiment, when current reference signal Vic is greater than feedback amplifying signal Vcom, selecting signal 803 is low level, and the first input end of single-pole double-throw switch (SPDT) 802 is connected with output, and current controling signal Vmid is feedback amplifying signal Vcom; When current reference signal Vic is less than or equal to feedback amplifying signal Vcom, selecting signal 803 is high level, and the second input of single-pole double-throw switch (SPDT) 802 is connected with output, and current controling signal Vmid is current reference signal Vic.
The computing circuit 402 that embodiment of the present utility model adopts and selection circuit 202 are simple, circuit commonly used or unit, and those skilled in the art can grasp easily and replace these unit under the instruction of the utility model embodiment.Particularly along with the development of Digital Design software and digital design language, such as in VHDL (Very-High-Speed Integrated Circuit Hardware DescriptionLanguage, i.e. ultrahigh speed
The integrated circuit hardware description language) and Verilog HDL (
Hardware Description language, i.e. hardware description language), those skilled in the art just can generate corresponding circuit after computing circuit 402 and the function of selecting circuit 202 to complete are used to the predicate speech and described automatically.
Although with reference to several exemplary embodiments, described the utility model, should be appreciated that term used is explanation and exemplary and nonrestrictive term.Because the utility model can specifically be implemented in a variety of forms and not break away from spirit or the essence of utility model, so be to be understood that, above-described embodiment is not limited to any aforesaid details, and explain widely in the spirit and scope that should limit in the claim of enclosing, therefore fall into whole variations in claim or its equivalent scope and remodeling and all should be the claim of enclosing and contain.
Claims (11)
1. the control circuit of a battery charger, described battery charger, for controlling the charging to battery, comprises power circuit, it is characterized in that, described control circuit comprises:
Feedback amplifier, have first input end, the second input and output, described first input end and receive the feedback signal that characterizes charging voltage, and described the second input receives the feedback reference signal, described output output feedback amplifying signal;
Select circuit, there is first input end, the second input and output, described first input end received current reference signal, described the second input is coupled to the output of feedback amplifier, receives the feedback amplifying signal, described output output current control signal;
Hysteresis control circuit, there is first input end, the second input, the 3rd input, four-input terminal, the 5th input, the first output and the second output, described first input end is coupled to the output of selecting circuit, the received current control signal, described the second input receives input voltage, described the 3rd input receives charging voltage, described four-input terminal is coupled to the output reception control signal of control circuit, when being received in the power circuit conducting, described the 5th input produces the frequency signal of pulse, limited signal under described the first output output current, limited signal on described the second output output current,
Comparison circuit, there is first input end, the second input, the 3rd input, the first output and the second output, described first input end is coupled to the first output of hysteresis control circuit, limited signal under received current, described the second input is coupled to the second output of hysteresis control circuit, limited signal on received current, the output that described the 3rd input is coupled to current detection circuit receives the current detection signal that characterizes inductive current, described the first output output asserts signal, described the second output output reset signal;
Logical circuit, have set end, reset terminal and output, and described set end is coupled to the first output of comparison circuit, receive asserts signal, described reset terminal is coupled to the second output of comparison circuit, receives reset signal, described output output control signal.
2. control circuit as claimed in claim 1, is characterized in that, described selection circuit comprises:
Diode, have cathode terminal and anode tap, and the output that described cathode terminal is coupled to feedback amplifier receives the feedback amplifying signal; And
Resistance, have first end and the second end, and described first end is coupled to the anode tap of described diode, and described the second termination is received current reference signal;
Wherein, when described selection circuit is less than or equal to the feedback amplifying signal at current reference signal, in the tie point output current reference signal of diode and resistance;
When current reference signal is greater than the feedback amplifying signal, at the tie point output feedback amplifying signal of diode and resistance.
3. control circuit as claimed in claim 1, is characterized in that, described selection circuit comprises:
Select comparator, there is first input end, the second input and output, wherein said first input end received current reference signal, described the second input is coupled to the output of feedback amplifier, receive the feedback amplifying signal, signal is selected in described output output;
Single-pole double-throw switch (SPDT), there is first input end, the second input, output and control end, wherein said first input end is coupled to the output of feedback amplifier, receive the feedback amplifying signal, described the second input received current reference signal, described control end is coupled to comparator, receives and selects signal, and described output output current reference signal or feedback amplifying signal are as current controling signal.
4. control circuit as claimed in claim 1, is characterized in that, described hysteresis control circuit comprises:
Sluggish signal generating circuit, there is first input end, the second input, the 3rd input, four-input terminal and output, described first input end receives input voltage, described the second input receives charging voltage, described the 3rd input is coupled to the output of control circuit, reception control signal, described four-input terminal is received in the frequency signal that each switch periods produces pulse, described output output retarding window signal; And
Computing circuit, there is first input end, the second input, the first output and the second output, described first input end is coupled to sluggish signal generating circuit, receive the retarding window signal, described the second input is coupled to the output of selecting circuit, the received current control signal, limited signal under described the first output output current, limited signal on described the second output output current.
5. control circuit as claimed in claim 4, is characterized in that, described sluggish signal generating circuit comprises:
Constant Continuity signal produces circuit, there is first input end, the second input, the 3rd input and output, described first input end receives input voltage, described the second input is coupled to battery, receive charging voltage, described the 3rd input receiving frequency signals, described output is exported constant Continuity signal;
Charge-discharge circuit, there is first input end, the second input and output, wherein said first input end is coupled to the output that constant Continuity signal produces circuit, receive constant Continuity signal, described the second input is coupled to the output of control circuit, reception control signal, described output provides charging and discharging currents; And
Sluggish electric capacity, have first end and the second end, and wherein said first end is coupled to the output of charge-discharge circuit, receives charging and discharging currents, described the second end ground connection, and described electric capacity provides the retarding window signal at first end.
6. control circuit as claimed in claim 5, is characterized in that, described constant Continuity signal produces circuit and comprises:
The first controlled current source, have input and output, and described input receives input voltage, and described output provides charging current;
Reference capacitance, have the output that first end and the second end, described first end are coupled to the first controlled current source, receives charging current, described the second end ground connection, and described reference capacitance provides sawtooth signal at first end;
Controlled voltage source, have first end, the second end and control end, and described the second end ground connection, described control end is coupled to battery, receives charging voltage, the described first end output reference signal relevant to charging voltage; And
Constant conducting comparator, there is first input end, the second input and output, wherein said first input end is coupled to the first end of reference capacitance, receive sawtooth signal, described the second input is coupled to the first end of controlled voltage source, receive reference signal, described output is exported constant Continuity signal.
7. control circuit as claimed in claim 5, is characterized in that, described charge-discharge circuit comprises:
The second current source, have input and output;
The first switch, have first end, the second end and control end, and described first end is coupled to the output of the second current source, described the second end ground connection, and described control end is coupled to the output that constant Continuity signal produces circuit, receives constant Continuity signal;
Second switch, have first end, the second end and control end, and described first end is coupled to the first end of sluggish electric capacity, and described the second end is coupled to the input of the second current source, and described control end is coupled to the output reception control signal of control circuit;
The 3rd switch, have first end and the second end, and described first end is coupled to the output of the second current source, and described the second end is coupled to the first end of sluggish electric capacity; And
The 4th switch, have first end and the second end, described first end ground connection, and described the second end is coupled to the input of the second current source;
Wherein the second current source is when the conducting duration of the conducting duration of control signal and constant Continuity signal is unequal, to sluggish capacitor charging.
8. as the described control circuit of claim 4-7 any one, it is characterized in that, described computing circuit comprises:
The second controlled current source, have first end, the second end and control end, wherein said first end receives input voltage, and described control end is coupled to the output of sluggish signal generating circuit, receive the retarding window signal, the electric current that described the second end output current value is directly proportional to the retarding window signal;
The first resistance, have first end and the second end, limited signal on described first end output current;
The second resistance, have first end and the second end, and described first end is coupled to the second end of the first resistance, limited signal under described the second end output current;
The 3rd resistance, have first end and the second end, the second end of described first end to the second resistance, described the second end ground connection; And
Clamp circuit has first end and the second end, and described first end is coupled to the output of selecting circuit, the received current control signal, and described the second end is coupled to the tie point of the first resistance and the second resistance.
9. as the described control circuit of claim 1-7 any one, it is characterized in that, described comparison circuit comprises:
The lower limit comparator, there is first input end, the second input and output, wherein said first input end is coupled to the first output of hysteresis control circuit, limited signal under received current, described the second input is coupled to the output of current detection circuit, the received current detection signal, described output output asserts signal; And
Upper limit comparator, there is first input end, the second input and output, wherein said first input end is coupled to the second output of hysteresis control circuit, limited signal on received current, described the second input is coupled to the output of current detection circuit, the received current detection signal, described output output reset signal.
10. as the described control circuit of claim 1-7 any one, it is characterized in that, described logical circuit comprises rest-set flip-flop, there is set end, reset terminal and output, the first output that described set end is coupled to comparison circuit receives asserts signal, described reset terminal is coupled to the second output of comparison circuit, receives reset signal, described output output control signal.
11. a battery charger, is characterized in that, described battery charger comprises as the described control circuit of claim 1-7 any one, and comprises:
Inductance, have first end and the second end, and described first end is coupled to the output of power circuit, and described the second end provides charging current to battery;
Output capacitance, have first end and the second end, and described first end is coupled to the second end of inductance, described the second end ground connection;
Wherein said power circuit has input, earth terminal, output and control end, and described input receives input voltage, described earth terminal ground connection, and described control end is coupled to the output of control circuit, reception control signal;
The first end of described inductance receives input voltage, ground connection when power circuit turn-offs when the power circuit conducting.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220646600 CN202940620U (en) | 2012-11-30 | 2012-11-30 | Battery charging circuit and control circuit thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220646600 CN202940620U (en) | 2012-11-30 | 2012-11-30 | Battery charging circuit and control circuit thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202940620U true CN202940620U (en) | 2013-05-15 |
Family
ID=48324843
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201220646600 Expired - Lifetime CN202940620U (en) | 2012-11-30 | 2012-11-30 | Battery charging circuit and control circuit thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN202940620U (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102946129A (en) * | 2012-11-30 | 2013-02-27 | 成都芯源系统有限公司 | Battery charging circuit and control method thereof |
| CN107181404A (en) * | 2016-03-10 | 2017-09-19 | 华中科技大学 | A kind of current hysteresis-band control BUCK circuits |
| CN108110824A (en) * | 2017-12-12 | 2018-06-01 | 南京中感微电子有限公司 | A kind of battery low temperature charging control circuit |
| CN117713782A (en) * | 2024-02-04 | 2024-03-15 | 成都电科星拓科技有限公司 | Power-on reset circuit |
-
2012
- 2012-11-30 CN CN 201220646600 patent/CN202940620U/en not_active Expired - Lifetime
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102946129A (en) * | 2012-11-30 | 2013-02-27 | 成都芯源系统有限公司 | Battery charging circuit and control method thereof |
| CN107181404A (en) * | 2016-03-10 | 2017-09-19 | 华中科技大学 | A kind of current hysteresis-band control BUCK circuits |
| CN107181404B (en) * | 2016-03-10 | 2019-05-21 | 华中科技大学 | A kind of current hysteresis-band control BUCK circuit |
| CN108110824A (en) * | 2017-12-12 | 2018-06-01 | 南京中感微电子有限公司 | A kind of battery low temperature charging control circuit |
| CN117713782A (en) * | 2024-02-04 | 2024-03-15 | 成都电科星拓科技有限公司 | Power-on reset circuit |
| CN117713782B (en) * | 2024-02-04 | 2024-04-26 | 成都电科星拓科技有限公司 | Power-on reset circuit |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102946129B (en) | Battery charging circuit and control method thereof | |
| CN102946130B (en) | Battery charging circuit and control method thereof | |
| CN105991034A (en) | Power conversion device with power-saving and high conversion efficiency mechanism | |
| CN101951151B (en) | Dual-mode fully-integrated high-frequency reduction voltage power supply with high light load efficiency | |
| CN104201887B (en) | Zero adjustment circuit and the method excessively of buck convertor | |
| CN201571234U (en) | Source electrode drive LED drive circuit with output voltage and inductance variation keeping constant current | |
| CN202940620U (en) | Battery charging circuit and control circuit thereof | |
| CN105244848A (en) | Overvoltage protection method and circuit | |
| CN106992670B (en) | Adaptive turn-on time control circuit for PFM mode boost type DC-DC converter | |
| CN104113211A (en) | Low-power-dissipation hysteresis voltage detection circuit applied to energy acquisition system | |
| CN203135724U (en) | Switch converter and slope compensation circuit thereof | |
| CN103414323A (en) | Circuit for reducing turn-on time of current control type switch adjusting system | |
| CN203883673U (en) | Improved Z-source boost DC-DC converter | |
| CN203466720U (en) | Circuit reducing opening time in current control type switching regulating system | |
| CN106160458B (en) | Improve the BOOST circuit of transient response | |
| CN203014666U (en) | Quick start gate driving device and control module thereof | |
| CN102916470B (en) | A kind of energy content of battery carry circuit for energy trasfer between series-connected cell | |
| CN203858288U (en) | Zero-cross detection circuit and power factor correction circuit | |
| CN102185502B (en) | Constant current output control circuit for switching power supply controller and switching power supply | |
| CN202565153U (en) | Multiphase switching converter and controller thereof | |
| CN106160467A (en) | Strengthen the booster type dc-dc of transient response | |
| CN201557044U (en) | Frequency limited circuit capable of controlling power factor correcting circuit via critical current | |
| CN104749426A (en) | Zero crossing detection circuit and power factor correction circuit | |
| CN204316111U (en) | Linear charger | |
| CN204031519U (en) | A kind of LED adjusting control circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned |
Granted publication date: 20130515 Effective date of abandoning: 20150204 |
|
| AV01 | Patent right actively abandoned |
Granted publication date: 20130515 Effective date of abandoning: 20150204 |
|
| RGAV | Abandon patent right to avoid regrant |