CN202939530U

CN202939530U - Current supply starting circuit

Info

Publication number: CN202939530U
Application number: CN 201220620731
Authority: CN
Inventors: 谢卫国
Original assignee: JIANGSU GELITE ELECTRONICS CO Ltd
Current assignee: Jiangsu Gelite Electronics Co ltd
Priority date: 2012-11-22
Filing date: 2012-11-22
Publication date: 2013-05-15
Anticipated expiration: 2022-11-22

Abstract

The utility model discloses a current supply starting circuit, and relates to the field of integrated circuit design. The current supply starting circuit comprises a current supply main body part of a chip, wherein a starting voltage is supplied to the current supply main body part by a starting circuit; the starting circuit comprises a PMOS (p-channel metal oxide semiconductor) tube; and a source electrode of the PMOS tube is connected with a power supply VDD (virtual device driver), a drain electrode of the PMOS tube is connected with the current supply main body part, and a grid electrode of the PMOS tube receives starting signals through a time-delay circuit. The current supply starting circuit realizes the starting of a current supply by directly using enabling signals or reset signals of the chip, so that the power consumption is reduced, and the device cost of the chip is reduced at the same time.

Description

A kind of current source start-up circuit

Technical field

The utility model relates to the integrated circuit (IC) design field, is specifically related to a kind of current source.

Background technology

In the design of integrated circuit, if the starting problem of current source circuit is not handled well, meeting affect stablizing with of whole system and work, the typical current source circuit that is formed by metal-oxide-semiconductor M1, M2, M3, M4 and resistance R 1 as shown in Figure 1, need to be started by the start-up circuit that metal-oxide-semiconductor M5 and other devices form, described start-up circuit still needs to consume electric energy when current source is worked, increased the power consumption of low-power consumption product, has also increased device cost.

Summary of the invention

Problem to be solved in the utility model is to provide a kind of current source start-up circuit, and the current source start-up circuit that can solve prior art increases the problem of product power consumption and device cost.

The utility model is achieved through the following technical solutions:

A kind of current source start-up circuit, the current source main part that comprises chip, described current source main part provides trigger voltage by start-up circuit, described start-up circuit comprises the PMOS pipe, the source electrode of described PMOS pipe meets power vd D, drain electrode is connected with the current source main part, and grid receives enabling signal by delay circuit.

Further scheme of the present utility model is, enabling signal is that enable signal or the reset circuit of startup system sends reset signal.

Further scheme of the present utility model is that the PMOS pipe is enhancement mode PMOS pipe.

Further scheme of the present utility model is, the current source main part comprises a metal-oxide-semiconductor and a resistance,

Wherein, the first metal-oxide-semiconductor is enhancement mode PMOS pipe, and source electrode meets power vd D, and drain electrode is connected with grid;

The second metal-oxide-semiconductor is enhancement mode PMOS pipe, and source electrode is connected to power vd D, and is connected with the source electrode of the PMOS pipe of the first metal-oxide-semiconductor and start-up circuit respectively, and described the second metal-oxide-semiconductor grid is connected with the grid of the first metal-oxide-semiconductor;

The 3rd metal-oxide-semiconductor is enhancement mode NMOS pipe, source ground, and drain electrode is connected with grid, and is connected with the drain electrode of the PMOS pipe of the drain electrode of the second metal-oxide-semiconductor and start-up circuit respectively;

The 4th metal-oxide-semiconductor is enhancement mode NMOS pipe, and source electrode is connected with the source electrode of the 3rd metal-oxide-semiconductor through resistance and ground connection, and grid is connected with the grid that the 3rd MOS closes, and drain electrode is connected with the drain electrode of the first metal-oxide-semiconductor.

The utility model advantage compared with prior art is:

Directly utilize the enable signal of chip or the startup that reset signal realizes current source, reduce power consumption, also reduce the device cost of chip simultaneously.

Description of drawings

Fig. 1 is the current source of prior art and the circuit structure diagram of start-up circuit.

Fig. 2 is the circuit structure diagram of current source start-up circuit described in the utility model.

Embodiment

A kind of current source start-up circuit as shown in Figure 2, the current source main part 1 that comprises chip, described current source main part 1 provides trigger voltage by start-up circuit 2, described start-up circuit 2 comprises PMOS pipe 21, the source electrode of described PMOS pipe 21 meets power vd D, drain electrode is connected with current source main part 1, and grid receives enabling signal 23 by delay circuit 22.

As shown in Figure 2, enabling signal 23 is sent reset signal for enable signal or the reset circuit of startup system.

As shown in Figure 2, PMOS pipe 21 is enhancement mode PMOS pipe.

As shown in Figure 2, current source main part 1 comprises 4 metal-oxide-semiconductors and 1 resistance,

Wherein, the first metal-oxide-semiconductor 11 is enhancement mode PMOS pipe, and source electrode meets power vd D, and drain electrode is connected with grid;

The second metal-oxide-semiconductor 12 is enhancement mode PMOS pipe, and source electrode is connected to power vd D, and is connected with the source electrode of the PMOS pipe 21 of the first metal-oxide-semiconductor 11 and start-up circuit 2 respectively, and described the second metal-oxide-semiconductor 12 grids are connected with the grid of the first metal-oxide-semiconductor 11;

The 3rd metal-oxide-semiconductor 13 is enhancement mode NMOS pipe, source ground, and drain electrode is connected with grid, and manages 21 drain electrode with the PMOS of the drain electrode of the second metal-oxide-semiconductor 12 and start-up circuit 2 respectively and be connected;

The 4th metal-oxide-semiconductor 14 is enhancement mode NMOS pipe, and source electrode is connected with the source electrode of the 3rd metal-oxide-semiconductor 13 through resistance 15 and ground connection, and grid and the 3rd MOS close 13 grid and be connected, and draining is connected with the drain electrode of the first metal-oxide-semiconductor 11.

During the chip energising, voltage of reset signal output makes 21 conductings of PMOS pipe through delay circuit, the 3rd metal-oxide-semiconductor 13 and the 4th metal-oxide-semiconductor 14 conductings then, and the loop conducting of the first metal-oxide-semiconductor 11 and the 4th metal-oxide-semiconductor 14, generation current, current source start successfully; When reaching the schedule time of delay circuit, PMOS pipe 21 cuts off, and start-up circuit 2 quits work, and current source circuit is conducting always, not affected by start-up circuit 2, has reached the requirement that starts.

Claims

1. current source start-up circuit, the current source main part (1) that comprises chip, described current source main part (1) provides trigger voltage by start-up circuit (2), it is characterized in that: described start-up circuit (2) comprises PMOS pipe (21), the source electrode of described PMOS pipe (21) meets power vd D, drain electrode is connected with current source main part (1), and grid receives enabling signal (23) by delay circuit (22).

2. current source start-up circuit as claimed in claim 1 is characterized in that: described enabling signal (23) is sent reset signal for enable signal or the reset circuit of startup system.

3. current source start-up circuit as claimed in claim 1 is characterized in that: described PMOS pipe (21) is managed for enhancement mode PMOS.

4. current source start-up circuit as claimed in claim 1, it is characterized in that: described current source main part (1) comprises 4 metal-oxide-semiconductors and 1 resistance,

Wherein, the first metal-oxide-semiconductor (11) is enhancement mode PMOS pipe, and source electrode meets power vd D, and drain electrode is connected with grid;

The second metal-oxide-semiconductor (12) is enhancement mode PMOS pipe, source electrode is connected to power vd D, and be connected with the source electrode of the PMOS of the first metal-oxide-semiconductor (11) and start-up circuit (2) pipe (21) respectively, described the second metal-oxide-semiconductor (12) grid is connected with the grid of the first metal-oxide-semiconductor (11);

The 3rd metal-oxide-semiconductor (13) is enhancement mode NMOS pipe, source ground, and drain electrode is connected with grid, and is connected with the drain electrode that the PMOS of the drain electrode of the second metal-oxide-semiconductor (12) and start-up circuit (2) manages (21) respectively;

The 4th metal-oxide-semiconductor (14) is enhancement mode NMOS pipe, and source electrode is connected with the source electrode of the 3rd metal-oxide-semiconductor (13) through resistance (15) and ground connection, and grid is connected with the grid that the 3rd MOS closes (13), and drain electrode is connected with the drain electrode of the first metal-oxide-semiconductor (11).