CN201966641U - Low-power consumption control and activation circuit - Google Patents
Low-power consumption control and activation circuit Download PDFInfo
- Publication number
- CN201966641U CN201966641U CN2010206922594U CN201020692259U CN201966641U CN 201966641 U CN201966641 U CN 201966641U CN 2010206922594 U CN2010206922594 U CN 2010206922594U CN 201020692259 U CN201020692259 U CN 201020692259U CN 201966641 U CN201966641 U CN 201966641U
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- fixed resistance
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- power consumption
- resistance
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Abstract
The utility model discloses a low-power consumption control and activation circuit which consists of a switch circuit, an external key signal Vin2, an external trigger signal Vin1, a fixed resistance RLP2, a fixed resistance R1, a fixed resistance R2, a fixed resistance R3, a fixed capacitance C1, a fixed capacitance C2, a PMOS (P-channel metal oxide semiconductor) tube Q1, a PMOS tube Q2, an NMOS (N-channel metal oxide semiconductor) tube Q3, an RS (recommended standard) trigger Q4 with a Schmidt inverter, a signal receiving end Vin1 and a power supply Vcc. The low-power consumption control and activation circuit has the advantages that: the low-power consumption control and activation circuit can be applied in a power control circuit of a lithium battery protection system, guarantees the use and storage time of a battery pack, realizes low power consumption, and has simple structure which is easy to realize.
Description
(1) technical field:
The utility model relates to the battery protection field, especially a kind of low power consumption control and active circuit.
(2) background technology:
Lithium ion battery has been widely used in portable type electronic product (as mobile phone, notebook computer, video camera) and electric vehicle power sources.Power supply is composed in series by a plurality of cells usually, to satisfy equipment required voltage and power requirement.In actual use, because after battery pack and the BMS composition power brick, this power brick may need just can be used by the user after the storage for a long time.Battery added the power consumption (power consumption of BMS is in the mA level usually) of BMS from the power consumption electricity when user was idle, can make the time of power brick at some months, with electric quantity loss totally, so BMS just needs lower power consumption, the utility model can be reduced to the uA level with the power consumption that makes BMS, thereby makes power brick to store the longer time.
(3) utility model content:
The purpose of this utility model is to provide a kind of low power consumption control and active circuit, and it can overcome the deficiencies in the prior art, is the circuit of a kind of low-power consumption, easy to control, easy activation, and simple, easy to operate.
The technical solution of the utility model: a kind of low power consumption control and active circuit is characterized in that it is made up of rest-set flip-flop Q4, signal receiving end Vin1 and the power Vcc of switching circuit, external key signal Vin2, outer triggering signal Vin1, fixed resistance RLP2, fixed resistance R1, fixed resistance R2, fixed resistance R3, fixed capacity C1, fixed capacity C2, PMOS pipe Q1, PMOS pipe Q2, NMOS pipe Q3, band Schmidt reverser; Wherein said switching circuit input connects power Vcc, and an one output head grounding, another output are connected and fixed resistance R 1 and fixed resistance R2 and ground connection successively; Between said fixed resistance R1 and fixed resistance R2 tie point V1 is arranged; Said fixed capacity C1 is connected in parallel between tie point V1 and the ground, be with fixed resistance R2 to be connected in parallel, and the tie point between fixed resistance R1 and fixed resistance R2 also is connected with the S end of the rest-set flip-flop Q4 of band Schmidt reverser; Said fixed capacity C2 one end connects power Vcc, and the other end is through fixed resistance R3 ground connection, and with the R end of the rest-set flip-flop Q4 of the common connecting band Schmidt of signal receiving end Vin1 reverser; The output of the rest-set flip-flop Q4 of said band Schmidt reverser is connected with the grid of NMOS pipe Q3; The drain electrode of said NMOS pipe Q3 is connected with the grid of PMOS pipe Q2, is connected its source ground with power Vcc through fixed resistance RLP2 simultaneously; Between said NMOS pipe Q3 and the fixed resistance RLP2 tie point V2 is arranged; The grid of said PMOS pipe Q2 is connected with tie point V2, and its source electrode is connected with power Vcc, and it drains through load ground connection.
Above-mentioned said switching circuit is to be made of fixed resistance RLP1, PMOS pipe Q1 and switch Vin2; Wherein said fixed resistance RLP1 one end connects power Vcc, and the other end is through switch Vin2 ground connection; The grid of said PMOS pipe Q1 is connected and fixed the tie point of resistance R LP1 and switch Vin2, and its source electrode is connected with power Vcc, and drain electrode is connected with fixed resistance R1.
Operation principle of the present utility model: the method for work of this circuit may further comprise the steps:
1. after initially powering on, switch Vin2 opens, and PMOS pipe Q1 is fixed and draws shutoff on the resistance R LP1;
2. be fixed resistance R 2 and fixed capacity C1 of the current potential of tie point V1 draws into L (low level), the current potential of signal receiving end Vin1 is owing to the reason of fixed capacity C2, drawn when powering on for H (high level), this moment, the input R end with the rest-set flip-flop of Schmidt's reverser was H (high level), S end L (low level), output
Be initialized as H (high level);
3. when fixed resistance R3 drew signal receiving end Vin1 into L (low level), the R of rest-set flip-flop end was L (low level), and the S end is L (low level),
Remain H (high level), NMOS pipe Q3 opens, and tie point V2 current potential is drawn for L (low level), and PMOS pipe Q2 opens, and power supply begins powering load by PMOS pipe Q2;
4. idle when system, need to reduce power consumption, this moment switch Vin2 closure, PMOS pipe Q1 opens, the current potential of tie point V1 begins slow rising by fixed resistance R1 and fixed capacity C1;
5. after tie point V1 current potential rose to logic H (high level), this moment, the R end with the rest-set flip-flop of Schmidt's reverser was L (low level), and the S end is H (high level),
Become L (low level);
6. switch Vin2 opens after, and the R end of the rest-set flip-flop of band Schmidt reverser is L (low level), and the S end is L (low level),
Remain L (low level), NMOS pipe Q3 closes, and V tie point 2 is drawn into H (high level), and PMOS pipe Q2 closes, the load outage.
7. when system need activate,, make this moment the input R end of the rest-set flip-flop of band Schmidt reverser be H (high level), S end L (low level), output earlier earlier as long as will draw on the tie point Vin1 (high level) a period of time into H
Become H (high level);
8. tie point Vin1 disconnects fixed resistance R3 after, and tie point Vin1 is drawn into L (low level), and the R end of the rest-set flip-flop of band Schmidt reverser is L (low level), and the S end is L (low level),
Remain H (high level), this moment, NMOS pipe Q3 opened, and tie point V2 current potential is drawn for L (low level), and PMOS pipe Q2 opens, and power supply begins powering load by Q2.
Superiority of the present utility model: 1, can be applied in the control electricity circuit of li-ion cell protection system; 2, guaranteed the use memory time of battery pack when idle; 3, realize that with two outer triggering signals the power supply of load circuit closes, thereby realize low-power consumption, in use again with its activation; 4, simple in structure, realize easily.
(4) description of drawings:
Accompanying drawing is the structured flowchart of related a kind of low power consumption control of the utility model and active circuit.
(5) embodiment:
Embodiment: a kind of low power consumption control and active circuit (seeing accompanying drawing) is characterized in that it is made up of rest-set flip-flop Q4, signal receiving end Vin1 and the power Vcc of switching circuit, external key signal Vin2, outer triggering signal Vin1, fixed resistance RLP2, fixed resistance R1, fixed resistance R2, fixed resistance R3, fixed capacity C1, fixed capacity C2, PMOS pipe Q1, PMOS pipe Q2, NMOS pipe Q3, band Schmidt reverser; Wherein said switching circuit input connects power Vcc, and an one output head grounding, another output are connected and fixed resistance R 1 and fixed resistance R2 and ground connection successively; Between said fixed resistance R1 and fixed resistance R2 tie point V1 is arranged; Said fixed capacity C1 is connected in parallel between tie point V1 and the ground, be with fixed resistance R2 to be connected in parallel, and the tie point between fixed resistance R1 and fixed resistance R2 also is connected with the S end of the rest-set flip-flop Q4 of band Schmidt reverser; Said fixed capacity C2 one end connects power Vcc, and the other end is through fixed resistance R3 ground connection, and with the R end of the rest-set flip-flop Q4 of the common connecting band Schmidt of signal receiving end Vin1 reverser; The output of the rest-set flip-flop Q4 of said band Schmidt reverser is connected with the grid of NMOS pipe Q3; The drain electrode of said NMOS pipe Q3 is connected with the grid of PMOS pipe Q2, is connected its source ground with power Vcc through fixed resistance RLP2 simultaneously; Between said NMOS pipe Q3 and the fixed resistance RLP2 tie point V2 is arranged; The grid of said PMOS pipe Q2 is connected with tie point V2, and its source electrode is connected with power Vcc, and it drains through load ground connection.
Above-mentioned said switching circuit (seeing accompanying drawing) is to be made of fixed resistance RLP1, PMOS pipe Q1 and switch Vin2; Wherein said fixed resistance RLP1 one end connects power Vcc, and the other end is through switch Vin2 ground connection; The grid of said PMOS pipe Q1 is connected and fixed the tie point of resistance R LP1 and switch Vin2, and its source electrode is connected with power Vcc, and drain electrode is connected with fixed resistance R1.
Claims (2)
1. low power consumption control and active circuit is characterized in that it is made up of rest-set flip-flop Q4, signal receiving end Vin1 and the power Vcc of switching circuit, external key signal Vin2, outer triggering signal Vin1, fixed resistance RLP2, fixed resistance R1, fixed resistance R2, fixed resistance R3, fixed capacity C1, fixed capacity C2, PMOS pipe Q1, PMOS pipe Q2, NMOS pipe Q3, band Schmidt reverser; Wherein said switching circuit input connects power Vcc, and an one output head grounding, another output are connected and fixed resistance R 1 and fixed resistance R2 and ground connection successively; Between said fixed resistance R1 and fixed resistance R2 tie point V1 is arranged; Said fixed capacity C1 is connected in parallel between tie point V1 and the ground, be with fixed resistance R2 to be connected in parallel, and the tie point between fixed resistance R1 and fixed resistance R2 also is connected with the S end of the rest-set flip-flop Q4 of band Schmidt reverser; Said fixed capacity C2 one end connects power Vcc, and the other end is through fixed resistance R3 ground connection, and with the R end of the rest-set flip-flop Q4 of the common connecting band Schmidt of signal receiving end Vin1 reverser; The output of the rest-set flip-flop Q4 of said band Schmidt reverser is connected with the grid of NMOS pipe Q3; The drain electrode of said NMOS pipe Q3 is connected with the grid of PMOS pipe Q2, is connected its source ground with power Vcc through fixed resistance RLP2 simultaneously; Between said NMOS pipe Q3 and the fixed resistance RLP2 tie point V2 is arranged; The grid of said PMOS pipe Q2 is connected with tie point V2, and its source electrode is connected with power Vcc, and it drains through load ground connection.
2. according to a kind of low power consumption control and active circuit described in the claim 1, it is characterized in that said switching circuit is to be made of fixed resistance RLP1, PMOS pipe Q1 and switch Vin2; Wherein said fixed resistance RLP1 one end connects power Vcc, and the other end is through switch Vin2 ground connection; The grid of said PMOS pipe Q1 is connected and fixed the tie point of resistance R LP1 and switch Vin2, and its source electrode is connected with power Vcc, and drain electrode is connected with fixed resistance R1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010206922594U CN201966641U (en) | 2010-12-30 | 2010-12-30 | Low-power consumption control and activation circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010206922594U CN201966641U (en) | 2010-12-30 | 2010-12-30 | Low-power consumption control and activation circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201966641U true CN201966641U (en) | 2011-09-07 |
Family
ID=44529193
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2010206922594U Expired - Lifetime CN201966641U (en) | 2010-12-30 | 2010-12-30 | Low-power consumption control and activation circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN201966641U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102074933A (en) * | 2010-12-30 | 2011-05-25 | 天津南大强芯半导体芯片设计有限公司 | Controlling and activating circuit with low power consumption |
| CN104300954B (en) * | 2014-09-30 | 2018-04-27 | 苏州天准科技股份有限公司 | A kind of emergency stop circuit based on double metal-oxide-semiconductors, packaging body, emergency stop circuit device |
-
2010
- 2010-12-30 CN CN2010206922594U patent/CN201966641U/en not_active Expired - Lifetime
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102074933A (en) * | 2010-12-30 | 2011-05-25 | 天津南大强芯半导体芯片设计有限公司 | Controlling and activating circuit with low power consumption |
| CN102074933B (en) * | 2010-12-30 | 2013-11-06 | 天津南大强芯半导体芯片设计有限公司 | Controlling and activating circuit with low power consumption |
| CN104300954B (en) * | 2014-09-30 | 2018-04-27 | 苏州天准科技股份有限公司 | A kind of emergency stop circuit based on double metal-oxide-semiconductors, packaging body, emergency stop circuit device |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned |
Granted publication date: 20110907 Effective date of abandoning: 20131106 |
|
| RGAV | Abandon patent right to avoid regrant |