CN203491731U

CN203491731U - Charging control circuit and electronic equipment

Info

Publication number: CN203491731U
Application number: CN201320472375.9U
Authority: CN
Inventors: 何豁然; 罗勇进
Original assignee: Fairchild Semiconductor Suzhou Co Ltd
Current assignee: Fairchild Semiconductor Suzhou Co Ltd
Priority date: 2013-08-01
Filing date: 2013-08-01
Publication date: 2014-03-19
Anticipated expiration: 2023-08-01

Abstract

The utility model discloses a charging control circuit, which comprises an external power supply, a switching circuit and a charging path circuit composed of a first output circuit and a second output circuit. The external power supply is used for charging a secondary battery by means of the first output circuit. Meanwhile, the external power supply supplies power to a load by means of the second output circuit. The switching circuit is designed to disconnect the circuit between the second battery and the load when the external power supply is in use. According to the utility model, the electronic equipment is disclosed at the same time. Due to the adoption of the charging control circuit, the two output circuits are respectively connected with the secondary battery and the load. During the charging process of the second battery, the charging current is not shared by the load. In this way, the charging time is effectively shortened, so that the service life of the secondary battery is prolonged.

Description

Charging control circuit and electronic equipment

Technical Field

The utility model relates to a switch charger (switching charger) technique especially relates to a charge control circuit and electronic equipment.

Background

Portable devices (Portable devices) are popular with users because of their small size and portability. In the conventional Portable Device, a secondary battery such as a lithium battery is generally used to supply power to the Portable Device. When the secondary battery is discharged, the secondary battery needs to be charged by a switching charger (switching charger) in the Portable Device.

At present, there is only one output terminal in the circuit of the switch charger, and this output terminal is connected to the secondary battery and the load inside the Portable Device at the same time, such as: a Power Management Integrated Circuit (PMIC), and the like. Thus, in the process of charging the secondary battery, a current flows through the load connected to the output terminal of the switch charger circuit, so that the time for charging the secondary battery is prolonged, and the working efficiency of the load is also affected.

For example, assuming that the load is PMIC and the low dropout regulator (LDO) of PMIC generally operates at a smaller voltage, when charging the secondary battery, the operating voltage of the LDO regulator increases due to the current flowing through PMIC, and thus the operating efficiency of the LDO regulator decreases.

SUMMERY OF THE UTILITY MODEL

In order to solve the problems in the prior art, the utility model provides a charge control circuit and electronic equipment.

The technical scheme of the utility model is realized like this:

the utility model relates to a charge control circuit, include:

a charge path circuit including a first output circuit and a second output circuit; an external power supply for charging the secondary battery through the first output circuit and supplying power to the load through the second output circuit; and

when the external power source is present, a connection switch circuit between the secondary battery and the load is disconnected.

The utility model also provides an electronic equipment, include: mainboard, shell and charge control circuit, charge control circuit includes:

a switching circuit that disconnects a connection between the secondary battery and the load when the external power source is present.

The utility model provides a charging control circuit and an electronic device, when an external power supply exists, the connection between a secondary battery and a load is disconnected; meanwhile, the external power supply charges the secondary battery through the first output of the charging path circuit, supplies power to the load through the second output of the charging path circuit, and the two output circuits are respectively connected with the secondary battery and the load.

In addition, the two output circuits are respectively connected with the secondary battery and the load, and the load can not share the charging current in the process of charging the secondary battery, so that the power consumption of the circuit can be reduced, and the circuit has better thermal stability.

In addition, the direct-current voltage provided by the external power supply or the converted direct-current voltage lower than the direct-current voltage provided by the external power supply is converted into direct-current voltage matched with the load through the second output, and power is supplied to the load, so that the working efficiency of the load can be effectively ensured.

In addition, in practical application, a metal oxide semiconductor field effect (MOS) tube with ultra-small on-resistance is adopted as a switch arranged between the secondary battery and the load, so that the power consumption of the circuit can be further reduced, and the thermal stability of the circuit is further improved.

Drawings

Fig. 1 is a schematic diagram of the charging control circuit of the present invention;

fig. 2 is a schematic diagram of a circuit structure of a charging path in the present invention;

fig. 3 is a schematic diagram of a charging control circuit in practical application of the present invention;

fig. 4 is a schematic flow chart of a first charging control method according to the present invention;

fig. 5 is a schematic flow chart of a second charging control method according to the present invention;

fig. 6 is a schematic flow chart of a third charging control method according to the present invention;

fig. 7 is a schematic flow chart of a fourth charging control method according to the present invention;

fig. 8 is a schematic flow chart of a fifth charging control method according to the present invention.

Detailed Description

The basic idea of the utility model is that: disconnecting the secondary battery from the load when the external power source is present; and meanwhile, the external power supply charges the secondary battery through the first output of the charging path circuit and supplies power to the load through the second output of the charging path circuit.

The present invention will be described in further detail with reference to the accompanying drawings and specific embodiments.

The utility model discloses charge control circuit, as shown in fig. 1, include: an external power supply 11, a charging path circuit 12 including a first output circuit and a second output circuit, and a switch circuit 15; wherein,

when the external power source 11 is present, the switch circuit 12 disconnects the connection between the secondary battery 13 and the load 14; meanwhile, the external power supply 11 charges the secondary battery 13 through the first output circuit and supplies power to the load 14 through the second output circuit.

The first output circuit converts a direct-current voltage provided by the external power supply into a direct-current voltage matched with the secondary battery, and outputs the converted direct-current voltage to the secondary battery to charge the secondary battery;

the second output circuit converts the direct-current voltage provided by the external power supply into direct-current voltage matched with the load, outputs the converted direct-current voltage to the load and supplies power to the load.

As shown in fig. 2, the charge path circuit 12 may include: a voltage-reducing circuit 121, a first output circuit 122, and a second output circuit 123; wherein,

the voltage-reducing circuit 121 converts the direct-current voltage supplied from the external power supply 11 into a direct-current voltage lower than the supplied direct-current voltage;

the first output circuit 122 converts the dc voltage output from the voltage-reducing circuit 121 into a dc voltage matched with the secondary battery 13, and outputs the converted dc voltage to the secondary battery 13 to charge the secondary battery 13;

the second output circuit 123 converts the dc voltage output by the voltage-reducing circuit 121 into a dc voltage matched with the load 14, and outputs the converted dc voltage to the load 14 to supply power to the load.

Here, the specific voltage value of the dc voltage lower than the supplied dc voltage may be set as needed.

The conversion of the dc voltage output from the voltage-reducing circuit 121 into a dc voltage matched with the secondary battery 13 is: for example, if the secondary battery 13 is a lithium battery and the charging voltage of the lithium battery is generally a direct-current voltage of 4.2V, the step-down circuit 121 converts the direct-current voltage output by the step-down circuit into a direct-current voltage capable of directly charging the secondary battery 13, and the step-down circuit 121 converts the direct-current voltage into a direct-current voltage capable of directly charging the secondary battery 13: the dc voltage output from the voltage-reducing circuit 121 is converted into a dc voltage of 4.2V to better charge the secondary battery 13.

The step of converting the dc voltage output by the voltage-reducing circuit 121 into a dc voltage matched with the load 14 is: for example, if the load 14 is a PMIC and an LDO regulator in the PMIC operates with a better efficiency when the operating voltage is lower, the step-down circuit 121 converts the dc voltage to a dc voltage that can improve the operating efficiency of the load 14, which means: the dc voltage output by the voltage reducing circuit 121 is converted into a smaller dc voltage, so as to make the LDO regulator in the PMIC operate more efficiently.

The secondary battery 13 may be a lithium battery or the like; the load 14 may be a PMIC or the like.

When the external power supply 11 is not present, the switch circuit 15 turns on the secondary battery 13 and the load 14; the secondary battery 13 supplies power to the load 14.

In practical application, as shown in fig. 3, the charging path circuit 12 may further include a charging path control circuit 124 and a filter circuit 125; wherein,

the charging path control circuit 124 controls the voltage-reducing circuit 121, the first output circuit 122, and the second output circuit 123 to charge the secondary battery 12 with the external power supply 11 sequentially passing through the voltage-reducing circuit 121 and the first output circuit 122, and to supply power to the load 14 with the external power supply 11 sequentially passing through the voltage-reducing circuit 121 and the second output circuit 123;

when the external power source 11 is present, the filter circuit 125 eliminates ripples of the output voltages of the first output circuit 122 and the second output circuit 123. Here, the eliminating of the ripple of the output voltages of the first output circuit 122 and the second output circuit 123 means: the dc voltages output by the first output circuit 122 and the second output circuit 123 are smoothed.

In practical use, as shown in fig. 3, the secondary battery 13 may be a lithium battery; the load 14 may be a PMIC.

As shown in fig. 3, the voltage dropping circuit 121 may include: a first P-channel metal oxide semiconductor field effect transistor (PMOS) MP1, a first N-channel metal oxide semiconductor field effect transistor (NMOS) MN1, and an inductor Lf; the first output circuit 122 may include: a second NMOS MN2 and a first resistor R1; the second output circuit 123 may include: a second PMOS MP 2; the charge path control circuit 124 may include: the circuit comprises a Synthesizer (Synthesizer), a first comparator, a second comparator, a third comparator, a fourth comparator, a first driver D1, a second driver D2, a first capacitor C1, a second capacitor C2, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10 and an eleventh resistor R11.

As shown in fig. 3, the filter circuit 125 may include a third capacitor Cf; the switching circuit 15 may include: and a third PMOS MP 3.

The connection relationship of the components of the charge control circuit shown in fig. 3 is:

in the voltage reducing circuit 121, a gate of a first PMOS MP1 is connected to an output terminal of the synthesizer in the charging path control circuit 124, a source of the first PMOS MP1 is connected to the output voltage Vin of the external power source 11, a drain of the first PMOS MP1 is connected to one end of the inductor Lf and a drain of a first NMOS MN1, a gate of the first NMOS MN1 is connected to the output terminal of the synthesizer in the charging path control circuit 124, and a source of the first NMOS MN1 is grounded; the other end of the inductor Lf is connected to the source of the second NMOS MN2 in the first output circuit 122 and the source of the second PMOS MP2 in the second output circuit 123;

in the first output circuit 122, a gate of a second NMOS MN2 is connected to the output terminal of the second driver D2 in the charging path control circuit 124, a source and a drain of the second NMOS MN2 are both connected to the substrate, a drain of the second NMOS MN2 is connected to one end of an eighth resistor R8 in the charging path control circuit 124, one end of a first resistor R1, and one end of a third capacitor Cf in the filter circuit 125, and the other end of the first resistor R1 is connected to the secondary battery 13;

in the second output circuit 123, a gate of a second PMOS MP2 is connected to the output terminal of the first driver D1 in the charging path control circuit 124, a source and a drain of the second PMOS MP2 are both connected to the substrate, and a drain of the second PMOS MP2 is connected to one end of a tenth resistor R10 in the charging path control circuit 124, the other end of a third capacitor Cf in the filter circuit 125, and the load 14;

in the charging path control circuit 124, an anode of the first comparator is connected to an output end of the second comparator and one end of a first capacitor C1, a cathode of the first comparator is connected to the first triangular wave signal Tri1, an output end of the first comparator is connected to an input end of the first driver D1 and one input end of the synthesizer, the other end of the first capacitor C1 is connected to one end of a second resistor R2, the other end of the second resistor R2 is connected to an anode of the second comparator and one end of a third resistor R3, a cathode of the second comparator is connected to the second reference signal Ref2 through a fourth resistor R4, the other end of the third resistor R3 is connected to the other end of a tenth resistor R10, the other end of the tenth resistor R10 is connected to one end of an eleventh resistor R11, and the other end of the eleventh resistor R11 is grounded; the positive electrode of the third comparator is connected with the output end of the fourth comparator and one end of a second capacitor C2, the negative electrode of the third comparator is connected with a second triangular wave signal Tri2, the output end of the third comparator is connected with the input end of a second driver D2 and the other input end of the synthesizer, the other end of the second capacitor C2 is connected with one end of a fifth resistor R5, the other end of the fifth resistor R5 is connected with the positive electrode of the fourth comparator and one end of a sixth resistor R6, the negative electrode of the fourth comparator is connected with a first reference signal Ref1 through a seventh resistor R7, the other end of a sixth resistor R6 is connected with the other end of an eighth resistor R8, the other end of an eighth resistor R8 is connected with one end of a ninth resistor R9, and the other end of a ninth resistor R9 is grounded;

in the switch circuit 15, the gate of the third PMOS MP3 is connected to the control signal, the source and the drain of the third PMOS MP3 are both connected to the substrate, the source of the third PMOS is connected to the load 14, and the drain of the third PMOS is connected to the secondary battery 13.

The working principle of the charge control circuit shown in fig. 3 is as follows:

when the external power source 11 is present, the control signal causes the third PMOS MP3 to disconnect the secondary battery 13 from the load 14; meanwhile, the synthesizer synthesizes the logic levels of Pulse Width Modulation (PWM) signals output by the first comparator and the third comparator, and generates driving voltages corresponding to turning on or off the first PMOS MP1 and the first NMOS MN1, so that the first PMOS MP1 and the first NMOS MN1 are periodically turned on or off according to the PWM signals output by the synthesizer; meanwhile, the first driver D1 converts the logic level of the PWM signal output by the first comparator into a driving voltage corresponding to turning on or off the second PMOS MP2, so that the second PMOS MP2 is periodically turned on or off according to the PWM signal output by the first driver D1, the second driver D2 converts the logic level of the PWM signal output by the third comparator into a driving voltage corresponding to turning on or off the second NMOS MN2, so that the second NMOS MN2 is periodically turned on or off according to the PWM signal output by the second driver D2, so that the output voltage Vin of the external power supply 11 is converted into a dc voltage lower than the output voltage Vin of the external power supply 11 after passing through the first PMOS MP1 and the inductor Lf in the process of charging the secondary battery 13; on one hand, the dc voltage output by the inductor Lf is converted into a dc voltage capable of directly charging the secondary battery 13 through the second NMOS MN2 and the first resistor R1, so as to charge the secondary battery 13; on the other hand, the dc voltage output by the inductor Lf is converted into a dc voltage with high operating efficiency by the second PMOS MP2, so that the load 14 operates normally and has high operating efficiency.

When the external power source 11 is not present, the control signal causes the third PMOS MP3 to turn on the secondary battery 13 and the load 14, the load 14 is powered by the secondary battery 13; meanwhile, the source of the first PMOS MP1 is not connected to the output voltage Vin of the external power source 11, so that the load 14 is powered by the secondary battery 13.

When the external power source 11 is not present, the ground level signal output by the synthesizer causes the first PMOSMP1 and the first NMOS MN1 to turn off, meanwhile, the ground level signal output by the first driver D1 causes the second PMOS MP2 to turn off, and the ground level signal output by the second driver D2 causes the second NMOS MN2 to turn off, so that the whole charging path circuit 12 stops working. Here, the ground level signal means: the same level signal as ground.

In the second PMOS MP2 and the third PMOS MP3, the source and the drain are both connected to the substrate to form a back-to-back (back-to-back) body diode; accordingly, in the second NMOS MN2, the source and the drain are both connected to the substrate to form a head-to-head (head-to-head) body diode, and the purpose of this connection is: the current direction is controlled, in other words, the current flows only in one direction, and the generation of reverse current is prevented.

The third capacitor Cf forms a filter for filtering the dc voltage passing through the second PMOS MP2 and the second NMOS MN2 to obtain a pure dc voltage.

The third PMOS MP3 is a PMOS with ultra small on-resistance, which acts as a switch. Here, the purpose of using a PMOS with an ultra-small on-resistance is: and the conduction power consumption is reduced, so that the power consumption of the circuit is reduced. The on-resistance value of the PMOS with ultra-small on-resistance can be set according to the requirement, such as 15m Ω.

The control signal causing the third PMOS MP3 to disconnect the secondary battery 13 from the load 14 means that: no current flows from the secondary battery 13 to the load 14 via the third PMOS MP 3.

When the synthesizer synthesizes the logic levels of the PWM signals output by the first comparator and the third comparator, if the PWM signal output by the first comparator is a high level signal and the PWM signal output by the third comparator is a high level signal, the synthesizer synthesizes the PWM signals output by the first comparator and the third comparator into a high level PWM signal; if the PWM signal output by the first comparator is a low-level signal and the PWM signal output by the third comparator is a high-level signal, the synthesizer synthesizes the PWM signals output by the first comparator and the third comparator into a low-level PWM signal; if the PWM signal output by the first comparator is a high-level signal and the PWM signal output by the third comparator is a low-level signal, the synthesizer synthesizes the PWM signals output by the first comparator and the third comparator into a low-level and high-level PWM signal; if the PWM signal output by the first comparator is a low level signal and the PWM signal output by the third comparator is a low level signal, the synthesizer synthesizes the PWM signals output by the first comparator and the third comparator into the low level PWM signal, so as to generate the driving voltage corresponding to turning on or off the first PMOS MP1 and the first NMOS MN 1.

Here, it should be noted that: when the external power source 11 is present and the secondary battery 13 is fully charged, the external power source 11 still supplies power to the load 14 through the first PMOS MP1, the inductor Lf, and the second PMOS MP2 in sequence, in other words, as long as the external power source 11 is present, the control signal turns off the third PMOS MP3, thereby disconnecting the connection between the secondary battery 13 and the load 14, and the external power source 11 supplies power to the load 14.

Based on above-mentioned charge control circuit, the utility model also provides a charge control method, as shown in FIG. 4, this method includes:

step 401: disconnecting the secondary battery from a load when an external power source is present;

step 402: and meanwhile, the external power supply charges the secondary battery through the first output of the charging path circuit and supplies power to the load through the second output of the charging path circuit.

As shown in step 402a in fig. 5, the specific operation of this step is to convert the dc voltage provided by the external power supply into a dc voltage matched with the secondary battery through the first output, so as to charge the secondary battery; and converting the direct current voltage provided by the external power supply into direct current voltage matched with the load through the second output to supply power to the load.

In actual application, step 401 and step 402 are performed simultaneously.

Specifically, the external power supply charges the secondary battery through a first output of a charging path circuit, including:

converting the direct-current voltage provided by the external power supply into direct-current voltage matched with the secondary battery through the first path of output to charge the secondary battery;

correspondingly, the supplying power to the load through the second output of the charging path circuit specifically includes:

and converting the direct current voltage provided by the external power supply into direct current voltage matched with the load through the second output to supply power to the load.

In practical applications, the specific operation of this step is as shown in step 402b in fig. 6, and the charging path circuit converts the dc voltage provided by the external power supply into a dc voltage lower than the provided dc voltage; converting the converted direct-current voltage lower than the provided direct-current voltage into direct-current voltage matched with the secondary battery through the first path of output, and charging the secondary battery; and converting the converted direct current voltage lower than the provided direct current voltage into direct current voltage matched with the load through the second output, and supplying power to the load.

Specifically, the external power supply charges the secondary battery through the first output of the charging path circuit, and specifically includes:

the charging path circuit converts a direct current voltage supplied from the external power supply into a direct current voltage lower than the supplied direct current voltage;

converting the converted direct-current voltage lower than the provided direct-current voltage into direct-current voltage matched with the secondary battery through the first path of output, and charging the secondary battery;

and converting the converted direct-current voltage lower than the provided direct-current voltage into direct-current voltage matched with the load through the second output, and supplying power to the load.

Here, the converting the converted dc voltage lower than the supplied dc voltage into a dc voltage compatible with the secondary battery means: for example, if the secondary battery is a lithium battery and the charging voltage of the lithium battery is generally a dc voltage of 4.2V, the converting the converted dc voltage lower than the supplied dc voltage into the dc voltage capable of directly charging the secondary battery may be: converting the converted DC voltage lower than the supplied DC voltage into a DC voltage of 4.2V so as to better charge the secondary battery.

Converting the converted dc voltage lower than the supplied dc voltage into a dc voltage matched to the load means: for example, if the load is a PMIC and the LDO regulator in the PMIC has better working efficiency when the working voltage is lower, the step of converting the converted dc voltage lower than the provided dc voltage into the dc voltage capable of making the working efficiency of the load higher refers to: and converting the converted direct current voltage lower than the provided direct current voltage into a smaller direct current voltage so as to ensure that the LDO voltage regulator in the PMIC has better working efficiency.

The secondary battery may be a lithium battery or the like; the load may be a PMIC or the like.

As shown in fig. 7, the method may further include: step 403: and when the external power supply exists, eliminating ripples of the output voltages of the first output and the second output. Wherein, the eliminating the ripple of the output voltage of the first output and the second output means: the direct-current voltage output by the first output circuit and the second circuit is smoother. In practical applications, step 403 is performed simultaneously with step 402 b.

As shown in fig. 8, the method may further include: step 404: turning on the secondary battery and the load when the external power supply is not present; the secondary battery supplies power to the load.

Based on above-mentioned charge control circuit, the utility model also provides an electronic equipment, this electronic equipment includes: mainboard, shell and charge control circuit, as shown in fig. 1, charge control circuit includes: an external power supply 11, a charging path circuit 12 including a first output circuit and a second output circuit, and a switch circuit 15; wherein,

When the external power supply 11 is not present, the switch circuit 15 turns on the secondary battery 13 and the load 14; the secondary battery 13 is supplied with power from the load 14.

As shown in fig. 3, the voltage dropping circuit 121 may include: a first PMOS MP1, a first NMOSMN1, and an inductor Lf; the first output circuit 122 may include: a second NMOS MN2 and a first resistor R1; the second output circuit 123 may include: a second PMOS MP 2; the charge path control circuit 124 may include: the circuit comprises a Synthesizer (Synthesizer), a first comparator, a second comparator, a third comparator, a fourth comparator, a first driver D1, a second driver D2, a first capacitor C1, a second capacitor C2, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10 and an eleventh resistor R11.

when the external power source 11 is present, the control signal causes the third PMOS MP3 to disconnect the secondary battery 13 from the load 14; meanwhile, the synthesizer synthesizes the logic levels of the PWM signals output by the first comparator and the third comparator to generate driving voltages corresponding to turning on or off the first PMOS MP1 and the first NMOS MN1, so that the first PMOS MP1 and the first NMOS MN1 are periodically turned on or off according to the PWM signals output by the synthesizer; meanwhile, the first driver D1 converts the logic level of the PWM signal output by the first comparator into a driving voltage corresponding to turning on or off the second PMOS MP2, so that the second PMOS MP2 is periodically turned on or off according to the PWM signal output by the first driver D1, and the second driver D2 converts the logic level of the PWM signal output by the third comparator into a driving voltage corresponding to turning on or off the second NMOS MN2, so that the second NMOS MN2 is periodically turned on or off according to the PWM signal output by the second driver D2, so that the output voltage Vin of the external power source 11 is converted into a dc voltage lower than the output voltage Vin of the external power source 11 after passing through the first PMOS MP1 and the inductor Lf in the process of charging the secondary battery 13; on one hand, the dc voltage output by the inductor Lf is converted into a dc voltage capable of directly charging the secondary battery 13 through the second NMOS MN2 and the first resistor R1, so as to charge the secondary battery 13; on the other hand, the dc voltage output by the inductor Lf is converted into a dc voltage with high operating efficiency by the second PMOS MP2, so that the load 14 operates normally and has high operating efficiency.

The electronic equipment can be a mobile phone, an ipad, a notebook computer and the like.

The above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention.

Claims

1. A charge control circuit, comprising:

2. The circuit according to claim 1, wherein the first output circuit is a first output circuit that converts a direct-current voltage supplied from the external power supply into a direct-current voltage matched with the secondary battery and outputs the converted direct-current voltage to the secondary battery to charge the secondary battery;

the second output circuit is a second output circuit which converts the direct-current voltage provided by the external power supply into direct-current voltage matched with the load, outputs the converted direct-current voltage to the load and supplies power to the load.

3. The circuit of claim 1, wherein the charge path circuit further comprises: a voltage reducing circuit that converts a direct-current voltage supplied from the external power supply into a direct-current voltage lower than the supplied direct-current voltage;

accordingly, the first output circuit is a first output circuit that converts the dc voltage output from the voltage-reducing circuit into a dc voltage matching the secondary battery, outputs the converted dc voltage to the secondary battery, and charges the secondary battery;

the second output circuit is used for converting the direct-current voltage output by the voltage reduction circuit into direct-current voltage matched with the load, outputting the converted direct-current voltage to the load and supplying power to the load.

4. The circuit of claim 3, wherein the charge path circuit further comprises: and a charging path control circuit for controlling the voltage reduction circuit, the first output circuit and the second output circuit, charging the secondary battery by the external power supply sequentially through the voltage reduction circuit and the first output circuit, and supplying power to the load by the external power supply sequentially through the voltage reduction circuit and the second output circuit.

5. The circuit of claim 3, wherein the charging path further comprises: and the filter circuit is used for eliminating ripples of the output voltages of the first output circuit and the second output circuit.

6. The circuit according to claim 1, wherein the switching circuit is a switching circuit that turns on the secondary battery and the load when the external power supply is not present;

the secondary battery is a secondary battery that supplies power to the load.

7. The circuit of claim 1, wherein the secondary battery is a lithium battery.

8. The circuit of claim 1, wherein the load is a power management integrated circuit.

9. An electronic device, comprising: mainboard, shell and charge control circuit, its characterized in that, charge control circuit includes:

10. The electronic apparatus according to claim 9, wherein the first output circuit is a first output circuit that converts a direct-current voltage supplied from the external power supply into a direct-current voltage that matches the secondary battery and outputs the converted direct-current voltage to the secondary battery to charge the secondary battery;

11. The electronic device of claim 9, wherein the charging path circuit further comprises: step-down circuit for converting DC voltage supplied from external power supply into DC voltage lower than the supplied DC voltage

12. The electronic device of claim 11, wherein the charging path circuit further comprises: and a charging path control circuit for controlling the voltage reduction circuit, the first output circuit and the second output circuit, charging the secondary battery by the external power supply sequentially through the voltage reduction circuit and the first output circuit, and supplying power to the load by the external power supply sequentially through the voltage reduction circuit and the second output circuit.

13. The electronic device of claim 11, wherein the charging path further comprises: and the filter circuit is used for eliminating ripples of the output voltages of the first output circuit and the second output circuit.

14. The electronic device according to claim 9, wherein the switch circuit is a switch circuit that turns on the secondary battery and the load when the external power supply is not present;

the secondary battery is a secondary battery that supplies power to the load.

15. The electronic device according to claim 9, wherein the secondary battery is a lithium battery.

16. The electronic device of claim 9, wherein the load is a PMIC.