CN202929168U - Overcharge voltage detection circuit for cell protective circuit - Google Patents
Overcharge voltage detection circuit for cell protective circuit Download PDFInfo
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- CN202929168U CN202929168U CN 201220646984 CN201220646984U CN202929168U CN 202929168 U CN202929168 U CN 202929168U CN 201220646984 CN201220646984 CN 201220646984 CN 201220646984 U CN201220646984 U CN 201220646984U CN 202929168 U CN202929168 U CN 202929168U
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Abstract
Provided is a rapid detection circuit for a cell protective circuit. The rapid detection circuit of the utility model comprises a transistor which operates in the amplification area and is serially connected with the overcharge voltage detection branch. Under the testing mode, the open loop voltage detection circuit is connected into a closed loop feedback mode, thereby obtaining the equivalent overcharge protection voltage of the cell protective circuit via direct measurement. It is unnecessary to obtain the accurate overcharge voltage by scanning the power supply voltage, thereby substantially reducing the testing time and improving the voltage testing precision.
Description
[technical field]
The utility model relates to electronic circuit field, particularly about a kind of quick detection circuit of battery protecting circuit.
[background technology]
Existing lithium battery can arrange the charging and discharging that a battery protection chip (or being called battery protecting circuit) is managed battery battery core usually.As shown in Figure 1, it shows the structural representation of battery protection chip in a battery.As shown in Figure 1; it is arranged on battery protection chip between battery battery core Bat and external both positive and negative polarity BP+, the BP-of battery usually; it generally includes three links and two control ends; three links are respectively the VCC end of the positive pole that is connected in battery battery core; be connected in the VSS end of battery battery core negative pole; be connected in the VM end of the external negative pole BP-of battery, two control ends are respectively the control of discharge end DOUT that controls battery battery core discharge switch Q1 and the charging control end COUT that controls battery battery core charge switch Q2.
When battery is charged; voltage difference between the both positive and negative polarity of battery protection chip meeting test battery battery core Bat; if the voltage between battery battery core Bat is lower than the normal voltage of battery; the electric weight that represents battery battery core is discontented; can charge to it; the charging control end COUT of battery protection chip controls charge switch Q2 conducting, forms the charging path, and the extraneous power supply that is connected in the external both positive and negative polarity BP+ of battery, BP-charges to battery battery core.
When battery externally discharges as power supply, the control of discharge end DOUT output signal of battery protection chip, controlled discharge switch Q1 conducting, battery battery core externally discharges.
Battery protection chip usually can arrange protection mechanism and prevent overcharging to battery battery core.For example; a common battery battery core; voltage when it is full of is a standard value; suppose it is 4.3V; battery protection chip comprises an overcharge protection circuit; whether it surpasses 4.3v according to the voltage between the both positive and negative polarity of battery battery core judges whether battery battery core overcharges; if the voltage between the both positive and negative polarity of battery battery core surpasses 4.3v; the overcharge protection circuit of battery protection chip can be exported a control signal; charging output terminal COUT can control charge switch Q2 according to the control signal of this overcharge protection circuit output, stops battery battery core being charged.
For each battery protection chip, its over-charge protective voltage is to be determined by its inner overcharge protection circuit, when having made a battery protection chip, need to test this chip, with the over-charge protective voltage of the reality of definite this chip.and the misoperation for preventing that the problems such as noise from causing in battery protection chip, one internal latency circuit is arranged usually, typically overcharge time delay greatly between 0.1 second to 2 seconds. but at the test phase of battery protection chip, in order to test additives for overcharge protection voltage (VOC), may need to come the charging voltage of simulated battery battery core repeatedly to test with a plurality of voltages, and it is each because the time delay of delay circuit, it is appreciable making the spent time of whole chip testing, this is very disadvantageous for a large amount of battery protection ic product tests, general prior art as shown in Figure 1, battery protection chip is removed VCC, VSS, VM, DOUT, outside five essential pins of COUT, test pin DS of extra increase, time delay when directly test pin DS being applied test voltage and reduces test, can measure the accurate additives for overcharge protection voltage of this battery protection chip by test, if the undesirable over-charge protective voltage of actual over-charge protective voltage of this battery protection chip, can the parameter of the related device in circuit be trimmed (trimming), thereby additives for overcharge protection voltage is trimmed in certain accuracy rating.
As shown in Figure 2, it shows the structural representation of existing overcharged voltage testing circuit.As shown in Figure 2, the supply voltage namely tested of supply voltage BAT wherein, this overcharged voltage testing circuit comprises by NPN triode Q1, Q2, resistance R 1, PMOS the first transistor PM1, PM2 form one are based on Δ V
BEThe current biasing circuit of/R, wherein Δ V
BE=VBE2-VBE1.PMOS the 3rd transistor PM3 and the first transistor PM1 form current mirror circuit, so the electric current of PM3 place circuit is Δ V
BE/ R1, the base stage of triode Q3 is connected in the R3 of the bleeder circuit that is composed in series by resistance R 3 and R4 and the connected node of R4, and the voltage of the bleeder circuit of R3 and R4 composition is (R3+R4) * (Vbe3+R2* Δ V like this
BE/ R1)/R3; the voltage of this bleeder circuit is the over-charge protective voltage VOC of this chip protection circuit; this over-charge protective voltage detecting circuit also comprises a PMOS transistor PM4; its grid is connected in the connected node of the collector of the drain electrode of PM3 and triode Q3, and its drain electrode is connected in the input end of an amplification and rectification circuit A1.the method of the over-charge protective voltage of existing test chip is regulating power source voltage BAT length by length, when supply voltage during less than VOC voltage, transistor PM4 cut-off, the voltage of the input end of amplification and rectification circuit A1 input increases gradually, this moment amplification and rectification circuit A1 the output terminal output low level, increase gradually along with supply voltage, when supply voltage reaches the over-charge protective voltage VOC of chip protection circuit, the voltage of the input end input of amplification and rectification circuit A1 increases to the turnover voltage of amplification and rectification circuit A1, the output terminal of amplification and rectification circuit A1 is exported high level, supply voltage when so namely can determine the upset of this amplification and rectification circuit A1 is the over-charge protective voltage of this chip.
For a chip; its actual additives for overcharge protection voltage is unknown; scope may be very wide; so existing method of testing is to provide the testing power supply voltage an of wider range; by the mode sweep test supply voltage at interval of a stepping, for overcharging testing circuit output, certain voltage can determine that the value of this test voltage is the over-charge protective voltage of this chip when scanning testing power supply voltage when changing.Test but an existing this method supply voltage stepping of every saltus step (Step) still needs to wait for certain hour, the test duration still can be long like this, increases the chip holistic cost.When testing in addition, in order to save the test duration, each stepping can be set between 2 ~ 5mv usually, and this has also sacrificed certain measuring accuracy.
Therefore, be necessary existing testing circuit is improved, to overcome the defective of prior art.
[utility model content]
The purpose of this utility model is to provide a kind of testing circuit of over-charge protective voltage of battery protecting circuit.
For reaching aforementioned purpose, the overcharged voltage testing circuit of a kind of battery protecting circuit of the utility model, it comprises:
The overcharged voltage detecting unit, it comprises input end, control output end and overcharged voltage measurement output terminal, its control output end is connected in the control end of the first power device;
The first power device, it comprises control end, input end and output terminal, and its input end is connected in supply voltage, and output terminal is connected in the control end of the second power device;
The second power device, it comprises control end, input end and output terminal, and its input end is connected in supply voltage, and output terminal is connected in the input end of overcharged voltage detecting unit;
The input end of overcharged voltage detecting unit is connected in supply voltage, if the input voltage that the overcharged voltage detecting unit detects is less than over-charge protective voltage, control output end output first control signal of overcharged voltage detecting unit is controlled output terminal output first level of the first power device, the input voltage that detects when the overcharged voltage detecting unit is greater than over-charge protective voltage, and the control output end of overcharged voltage detecting unit output the second control signal is controlled the output terminal output second electrical level of the first power device;
The output of controlling the output terminal of the second power device when the output terminal of the first power device is exported the first level increases the input voltage of overcharged voltage detecting unit, the input voltage of the output reduction overcharged voltage detecting unit of the output terminal of control the second power device when the output terminal of the first power device is exported second electrical level.
According to an embodiment of the present utility model, described overcharged voltage testing circuit comprises that is further controlled the Test Switchboard that the second power device is connected to the overcharged voltage detecting unit, the output terminal of the second power device is connected to the input end of overcharged voltage detecting unit when Test Switchboard is closed, the output terminal with the second power device when Test Switchboard disconnects disconnects from the input end of overcharged voltage detecting unit.
According to an embodiment of the present utility model, described overcharged voltage detecting unit comprises bias current circuit, circuit mirror current, voltage detecting branch road; The electric current of circuit mirror current mirror image bias current circuit forms the first electric current, described voltage detecting branch road produces the second electric current in circuit mirror current, and after more described the first electric current of described overcharged voltage detecting unit and the second electric current, the control signal of the first power device is controlled in its control output end output.
according to an embodiment of the present utility model, described current biasing circuit comprises NPN type the first triode Q1, the second triode Q2, the first resistance R 1, pmos type the first transistor PM1, transistor seconds PM2, wherein the source electrode of the first transistor PM1 of this current biasing circuit is connected in supply voltage, the drain electrode of the first transistor PM1 is connected in the collector of the first triode Q1, the grid of the first transistor PM1 is connected with the grid of transistor seconds PM2, the emitter of the first triode Q1 is by the first resistance R 1 ground connection, the base stage of the first triode Q1 is connected with the base stage of the second triode Q2, the source electrode of transistor seconds PM2 is connected in supply voltage, the grid of transistor seconds PM2 is connected with the grid of the first transistor PM1, the drain electrode of transistor seconds PM2 is connected with the collector of triode Q2, the grounded emitter of the second triode Q2, the base stage of the second triode Q2 is connected with the base stage of the first triode Q1, described the second power device is a PMOS transistor PM5, described voltage detecting branch road comprises the drain electrode that is connected in transistor PM5 and the 3rd resistance R 3 and the 4th resistance R 4 of the series connection between ground, described current mirroring circuit comprises PMOS the 3rd transistor PM3 and NPN type the 3rd a triode Q3, wherein the source electrode of the 3rd transistor PM3 is connected in supply voltage, the grid of the 3rd transistor PM3 is connected with the grid of the first transistor PM1 of aforementioned currents biasing circuit, the drain electrode of the 3rd transistor PM3 is connected with the collector of the 3rd triode Q3, the emitter of the 3rd triode Q3 is by the second resistance R 2 ground connection, the base stage of the 3rd triode Q3 is connected in the node that the 3rd resistance R 3 of voltage detecting branch road is connected with the 4th resistance R 4, the connected node of described the 3rd transistor PM3 and the 3rd triode Q3 is the control output end of described overcharged voltage detecting unit, described the first power device is a PMOS transistor PM4.
For reaching aforementioned purpose, the overcharged voltage testing circuit of a kind of battery protecting circuit of the utility model, it comprises:
By NPN type the first triode Q1, the second triode Q2, the first resistance R 1, the current biasing circuit that pmos type the first transistor PM1, transistor seconds PM2 form, wherein the source electrode of the first transistor PM1 of this current biasing circuit is connected in supply voltage, the drain electrode of the first transistor PM1 is connected in the collector of the first triode Q1, the grid of the first transistor PM1 is connected with the grid of transistor seconds PM2, the emitter of the first triode Q1 is by the first resistance R 1 ground connection, and the base stage of the first triode Q1 is connected with the base stage of the second triode Q2; The source electrode of transistor seconds PM2 is connected in supply voltage, the grid of transistor seconds PM2 is connected with the grid of the first transistor PM1, the drain electrode of transistor seconds PM2 is connected with the collector of triode Q2, the grounded emitter of the second triode Q2, the base stage of the second triode Q2 is connected with the base stage of the first triode Q1;
By the voltage detecting branch road that a PMOS the 5th transistor PM5 and the 3rd resistance R 3 and the 4th resistance R 4 form, described the 3rd resistance R 3 and the 4th resistance R 4 are series between the drain electrode and ground of described transistor PM5;
By a PMOS the 3rd transistor PM3 and the current mirroring circuit that NPN type the 3rd triode Q3 forms, the source electrode of wherein said the 3rd transistor PM3 is connected in supply voltage, the grid of the 3rd transistor PM3 is connected with the grid of the first transistor PM1 of aforementioned currents biasing circuit, the drain electrode of the 3rd transistor PM3 is connected with the collector of the 3rd triode Q3, the emitter of the 3rd triode Q3 is by the second resistance R 2 ground connection, and the base stage of the 3rd triode Q3 is connected in the node that the 3rd resistance R 3 of voltage detecting branch road is connected with the 4th resistance R 4;
PMOS the 4th a transistor PM4, its grid is connected in the connected node of the collector of the 3rd transistor PM3 of described current mirroring circuit and the 3rd triode Q3, its source electrode is connected in supply voltage, and the grid that its drain electrode one tunnel is connected in aforementioned the 5th transistor PM5 is leaded up to current source ground connection;
Wherein the connected node of the 5th transistorized drain electrode and the 4th resistance R 4 is the overcharged voltage measurement point of the overcharged voltage testing circuit of this battery protecting circuit.
According to an embodiment of the present utility model, be provided with a Test Switchboard between the drain electrode of the grid of described the 5th transistor PM5 and described the 4th transistor PM4.
According to an embodiment of the present utility model, be provided with one by the compensating module of Test Switchboard control linkage to described overcharged voltage testing circuit between the grid of described the 4th transistor PM4 and the described the 4th transistorized drain electrode.
Battery protecting circuit over-charge protective voltage detecting circuit of the present utility model is by under test pattern; the open-loop voltage testing circuit is connected into closed-loop feedback manner; directly measure the over-charge protective voltage of equivalence; do not need to obtain accurate overcharge voltage by scanning power supply voltage; significantly reduce the test duration, improve the voltage tester precision.
[description of drawings]
Fig. 1 is the structural representation of battery protecting circuit.
Fig. 2 is the structural drawing of the over-charge protective voltage detecting circuit of existing battery protecting circuit.
Fig. 3 is the structural drawing of the over-charge protective voltage detecting circuit of battery protecting circuit of the present utility model.
[embodiment]
Alleged " embodiment " or " embodiment " refer to be contained in special characteristic, structure or the characteristic at least one implementation of the utility model herein.Different local in this manual " in one embodiment " that occur not are all to refer to same embodiment, neither be independent or the embodiment mutually exclusive with other embodiment optionally.
As shown in Figure 1; the battery protecting circuit of rechargeable battery of the present utility model is arranged between battery battery core Bat and external both positive and negative polarity BP+, the BP-of battery; it comprises four links and two control ends; four links are respectively the VCC end of the positive pole that is connected in battery battery core; be connected in the VSS end of battery battery core negative pole; the test lead DS that is connected in the VM end of the external negative pole BP-of battery and is used for testing, two control ends are respectively the control of discharge end DOUT that controls battery battery core discharge switch Q1 and the charging control end COUT that controls battery battery core charge switch Q2.
When battery is charged; voltage difference between the both positive and negative polarity of battery protecting circuit meeting test battery battery core Bat; if the voltage between battery battery core Bat is lower than the normal voltage of battery; the electric weight that represents battery battery core is discontented; can charge to it; the charging control end COUT of battery protecting circuit controls charge switch Q2 conducting, forms the charging path, and the extraneous power supply that is connected in the external both positive and negative polarity BP+ of battery, BP-charges to battery battery core.
When battery externally discharges as power supply, the control of discharge end DOUT output signal of battery protecting circuit, controlled discharge switch Q1 conducting, battery battery core externally discharges.
Battery protecting circuit usually can arrange protection mechanism and prevent overcharging to battery battery core.For example; a common battery battery core; voltage when it is full of is a standard value; suppose it is 4.3V; battery protecting circuit can form an overcharge protection circuit; whether it surpasses 4.3v according to the voltage between the both positive and negative polarity of battery battery core judges whether battery battery core overcharges; if the voltage between the both positive and negative polarity of battery battery core surpasses 4.3v; the overcharge protection circuit of battery protecting circuit can be exported a control signal; charging output terminal COUT can control charge switch Q2 according to the control signal of this overcharge protection circuit output, stops battery battery core being charged.
Usually after chip piece is completed manufacturing, need to test the various parameters of chip, to determine whether this chip is qualified chip, wherein for battery protecting circuit, be namely test event wherein to the mensuration of its over-charge protective voltage parameter.
see also shown in Figure 3, it shows the testing circuit of the over-charge protective voltage of test battery holding circuit of the present utility model, as shown in Figure 3, in an embodiment of the present utility model, this over-charge protective voltage detecting circuit comprises a testing power supply voltage BAT, by NPN triode Q1, Q2, resistance R 1, PMOS the first transistor PM1, the current biasing circuit that PM2 forms, wherein the source electrode of the PMOS the first transistor PM1 of this current biasing circuit is connected in the positive pole of testing power supply voltage, the drain electrode of PM1 is connected in the collector of triode Q1, the grid of PM1 is connected with the grid of transistor seconds PM2, the emitter of triode Q1 is by resistance R 1 ground connection, the base stage of triode Q1 is connected with the base stage of triode Q2, the source electrode of transistor seconds PM2 is connected with the positive pole of supply voltage equally, the grid of transistor seconds PM2 is connected with the grid of the first transistor PM1, the drain electrode of transistor seconds PM2 is connected with the collector of triode Q2, the grounded emitter of triode Q2, the base stage of triode Q2 is connected with the base stage of triode Q1.The grid connected node of the first transistor PM1 and PM2 forbids that by one enable switch ENB is connected with the positive pole of supply voltage, and the base stage connected node of triode Q1 and Q2 is forbidden enable switch ENB ground connection by one.
PMOS the 3rd transistor PM3 and aforementioned the first transistor PM1 form current mirror, wherein the source electrode of the 3rd transistor PM3 is connected in the positive pole of supply voltage, the grid of the 3rd transistor PM3 is connected with the grid of the first transistor PM1, the drain electrode of the 3rd transistor PM3 is connected with the collector of a NPN type triode Q3, the emitter of triode Q3 is by resistance R 2 ground connection, and the base stage of triode Q3 is connected in the node N1 that the resistance R 3 of voltage detecting branch road is connected with resistance R 4.
Wherein in an embodiment of the present utility model, the voltage detecting branch road comprises a PMOS transistor PM5, resistance R 4, resistance R 3, as shown in Figure 3, the source electrode of transistor PM5 is connected with the positive pole of supply voltage, the grid of transistor PM5 is connected with the input node of an amplification and rectification circuit by a Test Switchboard TEST, the drain electrode of transistor PM5 is connected with the first end of resistance R 4 by a Test Switchboard TEST, the first end of resistance R 4 simultaneously by an enable switch EN and forbid Test Switchboard TESTB jointly composition enable to forbid Test Switchboard EN﹠amp; TESTB is connected with the positive pole of supply voltage, and the second end of resistance R 4 is by resistance R 3 ground connection.Wherein at the connected node VOC_T of the drain electrode of transistor PM5 and resistance R 4 output terminal as the over-charge protective voltage of this battery protecting circuit.
PMOS transistor PM4 and a current source I1 form an amplifying circuit, wherein the source electrode of transistor PM4 is connected in the positive pole of supply voltage, the grid of transistor PM4 is connected in the drain electrode of the 3rd transistor PM3 in current mirroring circuit, the drain electrode of transistor PM4 is by current source I1 ground connection, and wherein the node that is connected with current source of transistor PM4 is as the input node of amplification and rectification circuit A1.Be connected with one and forbid enable switch ENB between the positive pole of the grid of transistor PM4 and supply voltage.Be parallel with one with current source I1 and forbid enable switch ENB.Because whole circuit exists three grades oppositely to amplify, for guaranteeing that circuit can not vibrate by steady operation, be connected with a compensating module between the input node of the grid of transistor PM4 and amplification and rectification circuit, wherein this compensating module is by Test Switchboard TEST and forbid that Test Switchboard TESTB controls, only work when test, when withdrawing from test pattern, compensating module and voltage detecting circuit are disconnected, avoid affecting the reaction velocity of voltage detecting voltage.
Wherein amplification and rectification circuit A1 is a shaping circuit, when its input during less than predetermined threshold values, and its output low level, during greater than predetermined threshold values, its output is overturn, and exports high level when its input.
In aforementioned circuit, enable switch EN is the gauge tap that whole circuit is started working, forbid that enable switch ENB is the switch opposite with enable switch EN, if namely enable switch EN is closed, forbid that enable switch opens, if enable switch EN opens, forbid that enable switch ENB is closed, enable switch EN and forbid that enable switch can be by not shown in enable signal IEN, the IENB(figure by the not gate relation respectively) control.When enable switch EN is closed, forbid that enable switch ENB opens, whole circuit is started working.
Test Switchboard TEST is the gauge tap that whole circuit enters test pattern, forbid that Test Switchboard TESTB is the switch opposite with Test Switchboard TEST, if namely Test Switchboard TEST is closed, forbid that enable switch opens, if Test Switchboard TEST opens, forbid that Test Switchboard TESTB is closed, Test Switchboard TEST and forbid Test Switchboard can be respectively test control signal ITEST, ITESTB by the not gate relation control.When Test Switchboard TEST is closed, forbid that Test Switchboard TESTB opens, whole circuit enters test pattern.Wherein aforementioned by enable switch EN and forbid that Test Switchboard TESTB jointly forms enable to forbid Test Switchboard EN﹠amp; TESTB can and forbid that by enable signal IEN test control signal ITESTB exports control signal IEN﹠amp afterwards through one with door; TESTB controls.
When normal operation does not enter test pattern, Test Switchboard TEST opens, this moment, transistor PM5 and compensating module were not attached to testing circuit, started working by the current biasing circuit that the first transistor PM1, transistor seconds PM2, triode Q1, triode Q2 form, the electric current that flows through the first transistor PM1 is △ VBE/R1, △ VBE=VBE2-VBE1 wherein, wherein VBE1 is the voltage between the Base-Emitter of triode Q1, VBE2 is the voltage between the Base-Emitter of triode Q2.The electric current of the 3rd transistor PM3 mirror image the first transistor PM1 of current mirroring circuit; the voltage at the node N1 place of voltage detecting branch road is VBE3+ △ VBE*R2/R1; wherein VBE3 is the voltage between the Base-Emitter of triode Q3; when the voltage of voltage detecting branch road was (R3+R4) * (VBE3+ △ VBE*R2/R1)/R3, this voltage was the over-charge protective voltage VOC of this battery protecting circuit.Can determine the over-charge protective voltage of this battery protecting circuit by the voltage of aforementioned over-charge protective Voltage-output node VOC_T.When the voltage of voltage detecting branch road during less than this over-charge protective voltage; the grid of transistor PM4 is high level; the input node of amplification and rectification circuit A1 is low level; when the voltage of voltage detecting branch road reaches this over-charge protective voltage; the grid of transistor PM4 becomes low level by high level; the current potential of the input node of amplification and rectification circuit A1 transfers high level to by low level at this moment, and saltus step also occurs in the output of amplification and rectification circuit A1.
Please continue to consult shown in Figure 3, when needs were tested chip, it is closed that enable signal IEN controls enable switch EN, forbids that enable switch ENB opens, and to control Test Switchboard TEST closed for test control signal ITEST simultaneously, forbids that Test Switchboard TESTB opens.This moment, the drain electrode of transistor PM5 was connected in the first end of resistance R 4 on the road of voltage detecting by Test Switchboard TEST, and the grid of transistor PM5 is connected in the input node N2 of amplification and rectification circuit A1 by Test Switchboard TEST.be equivalent to a regulator when being operated in the amplification region due to transistor PM5, the drain electrode of transistor PM5 is connected with the resistance R 4 of voltage detecting branch road, therefore voltage that can the regulation voltage detection branch, and the grid of transistor PM5 is connected in the input node N2 of amplification and rectification circuit A1, namely the grid of transistor PM5 is input node voltage-controlled that is subjected to amplification and rectification circuit A1, and the voltage of amplification and rectification circuit A1 input node is be subjected to voltage detecting circuit voltage-controlled, so form a close-loop feedback, for example, if the over-charge protective voltage of this battery protecting circuit is 4.3v, when testing power supply voltage is 3V, as previously mentioned this moment the voltage detecting branch road voltage be voltage less than over-charge protective voltage, this moment, the grid of transistor PM4 was high level, this moment, the input node N1 of amplification and rectification circuit was low level, be connected in the grid of transistor PM5 due to the input node N1 of amplification and rectification circuit, it is low level, control on the voltage of transistor PM5 with the voltage detecting branch road and draw, until the voltage of the overcharged voltage output node VOC_T of voltage detecting branch road is near the voltage of the source electrode of transistor PM5, be also supply voltage 3V.And if when testing power supply voltage is 5v; the voltage of voltage detecting branch road is greater than over-charge protective voltage 4.3v at this moment; the grid voltage of transistor PM4 becomes low level; the voltage of the input node of amplification and rectification circuit A1 becomes high level; because the grid of transistor PM5 becomes high level; control transistorized road galvanization and diminish, make the voltage of voltage detecting branch road by drop-down, just stop adjusting until the overcharged voltage output node voltage of voltage detecting branch road becomes 4.3v.That is to say when supply voltage is a voltage higher than over-charge protective voltage; the voltage of the overcharged voltage output node on the road of final voltage detecting can be adjusted to and equal over-charge protective voltage, can determine the over-charge protective voltage of this battery protecting circuit by the voltage of measuring this overcharged voltage output node.
In the aforementioned embodiment, the resistance R 4 one of voltage detecting branch road is to be connected in the drain electrode of transistor PM5 by Test Switchboard TEST, is by enabling to forbid Test Switchboard EN﹠amp in addition; TESTB is directly connected in supply voltage.But in other embodiments, also can cancel the Test Switchboard TEST that is connected with resistance R 4 and enable to forbid Test Switchboard EN﹠amp; TESTB, the resistance R 4 that changes the road of voltage detecting into directly is connected with the drain electrode of transistor PM5, and when being in non-test mode, when normal operation, transistor PM5 is operated in linear zone, uses as switch; When test pattern, transistor PM5 is operated in the amplification region, uses as adjusting VOC_T voltage.Can bring certain voltage error like this, be the conduction voltage drop on when normal operation transistor PM5, if but smaller this conduction voltage drop design compensated when test pattern simultaneously, also can satisfy the accuracy requirement of VOC.
Be more than a specific embodiment of the present utility model, the various PMOS transistors that adopt in this embodiment also can change nmos pass transistor or junction transistor into.The aforementioned currents mirror circuit can be also to use common-source common-gate current mirror to replace.
Battery protecting circuit over-charge protective voltage detecting circuit of the present utility model is by under test pattern; the open-loop voltage testing circuit is connected into closed-loop feedback manner; directly measure the over-charge protective voltage of equivalence; do not need to obtain accurate overcharge voltage by scanning power supply voltage; significantly reduce the test duration, improve the voltage tester precision.
Above-mentioned explanation has fully disclosed embodiment of the present utility model.It is pointed out that being familiar with any change that the person skilled in art does embodiment of the present utility model does not all break away from the scope of claims of the present utility model.Correspondingly, the scope of claim of the present utility model also is not limited only to previous embodiment.
Claims (7)
1. the overcharged voltage testing circuit of a battery protecting circuit, it comprises:
The overcharged voltage detecting unit, it comprises input end, control output end and overcharged voltage measurement output terminal, its control output end is connected in the control end of the first power device;
The first power device, it comprises control end, input end and output terminal, and its input end is connected in supply voltage, and output terminal is connected in the control end of the second power device;
The second power device, it comprises control end, input end and output terminal, and its input end is connected in supply voltage, and output terminal is connected in the input end of overcharged voltage detecting unit;
The input end of overcharged voltage detecting unit is connected in supply voltage, if the input voltage that the overcharged voltage detecting unit detects is less than over-charge protective voltage, control output end output first control signal of overcharged voltage detecting unit is controlled output terminal output first level of the first power device, the input voltage that detects when the overcharged voltage detecting unit is greater than over-charge protective voltage, and the control output end of overcharged voltage detecting unit output the second control signal is controlled the output terminal output second electrical level of the first power device;
The output of controlling the output terminal of the second power device when the output terminal of the first power device is exported the first level increases the input voltage of overcharged voltage detecting unit, the input voltage of the output reduction overcharged voltage detecting unit of the output terminal of control the second power device when the output terminal of the first power device is exported second electrical level.
2. battery protecting circuit overcharged voltage testing circuit as claimed in claim 1; it is characterized in that: described overcharged voltage testing circuit comprises that is further controlled the Test Switchboard that the second power device is connected to the overcharged voltage detecting unit; the output terminal of the second power device is connected to the input end of overcharged voltage detecting unit when Test Switchboard is closed, the output terminal with the second power device when Test Switchboard disconnects disconnects from the input end of overcharged voltage detecting unit.
3. battery protecting circuit overcharged voltage testing circuit as claimed in claim 1, it is characterized in that: described overcharged voltage detecting unit comprises bias current circuit, circuit mirror current, voltage detecting branch road; The electric current of circuit mirror current mirror image bias current circuit forms the first electric current, described voltage detecting branch road produces the second electric current in circuit mirror current, and after more described the first electric current of described overcharged voltage detecting unit and the second electric current, the control signal of the first power device is controlled in its control output end output.
4. battery protecting circuit overcharged voltage testing circuit as claimed in claim 3, it is characterized in that: described current biasing circuit comprises NPN type the first triode Q1, the second triode Q2, the first resistance R 1, pmos type the first transistor PM1, transistor seconds PM2, wherein the source electrode of the first transistor PM1 of this current biasing circuit is connected in supply voltage, the drain electrode of the first transistor PM1 is connected in the collector of the first triode Q1, the grid of the first transistor PM1 is connected with the grid of transistor seconds PM2, the emitter of the first triode Q1 is by the first resistance R 1 ground connection, the base stage of the first triode Q1 is connected with the base stage of the second triode Q2, the source electrode of transistor seconds PM2 is connected in supply voltage, the grid of transistor seconds PM2 is connected with the grid of the first transistor PM1, the drain electrode of transistor seconds PM2 is connected with the collector of triode Q2, the grounded emitter of the second triode Q2, the base stage of the second triode Q2 is connected with the base stage of the first triode Q1, described the second power device is a PMOS transistor PM5, described voltage detecting branch road comprises the drain electrode that is connected in transistor PM5 and the 3rd resistance R 3 and the 4th resistance R 4 of the series connection between ground, described current mirroring circuit comprises PMOS the 3rd transistor PM3 and NPN type the 3rd a triode Q3, wherein the source electrode of the 3rd transistor PM3 is connected in supply voltage, the grid of the 3rd transistor PM3 is connected with the grid of the first transistor PM1 of aforementioned currents biasing circuit, the drain electrode of the 3rd transistor PM3 is connected with the collector of the 3rd triode Q3, the emitter of the 3rd triode Q3 is by the second resistance R 2 ground connection, the base stage of the 3rd triode Q3 is connected in the node that the 3rd resistance R 3 of voltage detecting branch road is connected with the 4th resistance R 4, the connected node of described the 3rd transistor PM3 and the 3rd triode Q3 is the control output end of described overcharged voltage detecting unit, described the first power device is a PMOS transistor PM4.
5. the overcharged voltage testing circuit of a battery protecting circuit, it comprises:
By NPN type the first triode Q1, the second triode Q2, the first resistance R 1, the current biasing circuit that pmos type the first transistor PM1, transistor seconds PM2 form, wherein the source electrode of the first transistor PM1 of this current biasing circuit is connected in supply voltage, the drain electrode of the first transistor PM1 is connected in the collector of the first triode Q1, the grid of the first transistor PM1 is connected with the grid of transistor seconds PM2, the emitter of the first triode Q1 is by the first resistance R 1 ground connection, and the base stage of the first triode Q1 is connected with the base stage of the second triode Q2; The source electrode of transistor seconds PM2 is connected in supply voltage, the grid of transistor seconds PM2 is connected with the grid of the first transistor PM1, the drain electrode of transistor seconds PM2 is connected with the collector of triode Q2, the grounded emitter of the second triode Q2, the base stage of the second triode Q2 is connected with the base stage of the first triode Q1;
By the voltage detecting branch road that a PMOS the 5th transistor PM5 and the 3rd resistance R 3 and the 4th resistance R 4 form, described the 3rd resistance R 3 and the 4th resistance R 4 are series between the drain electrode and ground of described transistor PM5;
By a PMOS the 3rd transistor PM3 and the current mirroring circuit that NPN type the 3rd triode Q3 forms, the source electrode of wherein said the 3rd transistor PM3 is connected in supply voltage, the grid of the 3rd transistor PM3 is connected with the grid of the first transistor PM1 of aforementioned currents biasing circuit, the drain electrode of the 3rd transistor PM3 is connected with the collector of the 3rd triode Q3, the emitter of the 3rd triode Q3 is by the second resistance R 2 ground connection, and the base stage of the 3rd triode Q3 is connected in the node that the 3rd resistance R 3 of voltage detecting branch road is connected with the 4th resistance R 4;
PMOS the 4th a transistor PM4, its grid is connected in the connected node of the collector of the 3rd transistor PM3 of described current mirroring circuit and the 3rd triode Q3, its source electrode is connected in supply voltage, and the grid that its drain electrode one tunnel is connected in aforementioned the 5th transistor PM5 is leaded up to current source ground connection;
Wherein the connected node of the 5th transistorized drain electrode and the 4th resistance R 4 is the overcharged voltage measurement point of the overcharged voltage testing circuit of this battery protecting circuit.
6. the overcharged voltage testing circuit of battery protecting circuit as claimed in claim 5 is characterized in that: be provided with a Test Switchboard between the drain electrode of the grid of described the 5th transistor PM5 and described the 4th transistor PM4.
7. the overcharged voltage testing circuit of battery protecting circuit as claimed in claim 5 is characterized in that: be provided with one by the compensating module of Test Switchboard control linkage to described overcharged voltage testing circuit between the grid of described the 4th transistor PM4 and the described the 4th transistorized drain electrode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220646984 CN202929168U (en) | 2012-11-29 | 2012-11-29 | Overcharge voltage detection circuit for cell protective circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220646984 CN202929168U (en) | 2012-11-29 | 2012-11-29 | Overcharge voltage detection circuit for cell protective circuit |
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| CN202929168U true CN202929168U (en) | 2013-05-08 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN 201220646984 Withdrawn - After Issue CN202929168U (en) | 2012-11-29 | 2012-11-29 | Overcharge voltage detection circuit for cell protective circuit |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103018655A (en) * | 2012-11-29 | 2013-04-03 | 无锡中星微电子有限公司 | Overcharge voltage detection circuit of battery protection circuit |
| CN103746347A (en) * | 2014-01-28 | 2014-04-23 | 无锡中星微电子有限公司 | Battery protection chip and battery system |
| CN105471077A (en) * | 2016-01-27 | 2016-04-06 | 东莞市开关厂有限公司 | Solar energy integrated intelligent power supply device |
| CN108226794A (en) * | 2016-12-15 | 2018-06-29 | 艾普凌科有限公司 | Secondary cell monitoring arrangement and method for diagnosing faults |
| CN109683006A (en) * | 2017-10-19 | 2019-04-26 | 瑞萨电子株式会社 | Semiconductor device |
| CN110007127A (en) * | 2019-04-28 | 2019-07-12 | 西安华泰半导体科技有限公司 | A kind of voltage detecting circuit |
-
2012
- 2012-11-29 CN CN 201220646984 patent/CN202929168U/en not_active Withdrawn - After Issue
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103018655A (en) * | 2012-11-29 | 2013-04-03 | 无锡中星微电子有限公司 | Overcharge voltage detection circuit of battery protection circuit |
| CN103018655B (en) * | 2012-11-29 | 2015-03-11 | 无锡中星微电子有限公司 | Overcharge voltage detection circuit of battery protection circuit |
| CN103746347A (en) * | 2014-01-28 | 2014-04-23 | 无锡中星微电子有限公司 | Battery protection chip and battery system |
| CN103746347B (en) * | 2014-01-28 | 2016-09-28 | 无锡中感微电子股份有限公司 | Battery protection chip and battery system |
| CN105471077A (en) * | 2016-01-27 | 2016-04-06 | 东莞市开关厂有限公司 | Solar energy integrated intelligent power supply device |
| CN108226794A (en) * | 2016-12-15 | 2018-06-29 | 艾普凌科有限公司 | Secondary cell monitoring arrangement and method for diagnosing faults |
| CN108226794B (en) * | 2016-12-15 | 2021-06-22 | 艾普凌科有限公司 | Secondary battery monitoring device and failure diagnosis method |
| CN109683006A (en) * | 2017-10-19 | 2019-04-26 | 瑞萨电子株式会社 | Semiconductor device |
| CN109683006B (en) * | 2017-10-19 | 2022-10-28 | 瑞萨电子株式会社 | Semiconductor device with a plurality of semiconductor chips |
| CN110007127A (en) * | 2019-04-28 | 2019-07-12 | 西安华泰半导体科技有限公司 | A kind of voltage detecting circuit |
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