CN202905715U - Array substrate and display device - Google Patents
Array substrate and display device Download PDFInfo
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- CN202905715U CN202905715U CN201220488684.0U CN201220488684U CN202905715U CN 202905715 U CN202905715 U CN 202905715U CN 201220488684 U CN201220488684 U CN 201220488684U CN 202905715 U CN202905715 U CN 202905715U
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- array base
- base palte
- gate line
- data wire
- molybdenum
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Abstract
The utility model discloses an array substrate and a display device; when a large size display panel is made in the prior art, aluminium membrane thickness is solely increased to reduce resistance value of grid lines and/or data lines, the aluminium membrane is heated and deformed, so product yield is low; and the array substrate and the display device can prevent the said problem. The array substrate comprises a substrate and a plurality of grid lines and a plurality of data lines arranged on the substrate in a mutually intersecting manner, the grid lines and/or data lines comprise plurality layers of first metal layers arranged by intervals and second metal layers arranged between adjacent first metal layers, wherein a number of the second metal layers is bigger than or equal to 2.
Description
Technical field
The utility model relates to the Display Technique field, relates in particular to a kind of array base palte and display unit.
Background technology
In existing Display Technique, be distributed with mutually many gate lines and many data wires arranged in a crossed manner in the thin-film transistor array base-plate, the material of gate line and data wire forms structure and is molybdenum-aluminium-molybdenum, corresponding to this distributed architecture, the thickness of every stratification material is approximately respectively 150 dusts-3000 dust-800 dust, generally speaking, the gate line that the molybdenum-aluminium of this thickness distribution-molybdenum consists of or data wire can satisfy product in the small size panel below 32 inches performance requirement, yet, if produce large-sized panel, when then increasing owing to panel size, gate line and data wire also will be elongated along with the increase of panel size, therefore, when gate line and data wire are elongated, the resistance value of gate line and data wire causes signal attenuation serious also along with increase, affects properties of product.
In order to reduce the resistance value of gate line and data wire, can adopt the method with the thickness increase of aluminium film, yet, because the thermal coefficient of expansion of aluminium is larger, thermal stability is relatively poor, therefore, after the aluminium film thickness increases, if temperature raises, then the aluminium film will expand, and the aluminium film is thicker, dilatancy more serious, like this, will form projection on the surface of aluminium film, have a strong impact on the yields of product.
The utility model content
Embodiment of the present utility model provides a kind of array base palte and display unit, in the time of can avoiding prior art to make large-sized display floater, the thickness of single increase aluminium film for the resistance value that reduces gate line and/or data wire causes the low problem of yields of product so that the aluminium film is subjected to thermal deformation.
For achieving the above object, embodiment of the present utility model adopts following technical scheme:
Embodiment of the present utility model provides a kind of array base palte, comprise substrate, be arranged at cross one another many gate lines and many data wires on the described substrate, described gate line and/or data wire comprise the first metal layer that Spaced arranges, and be arranged at the second metal level between each adjacent described the first metal layer, wherein, the number of plies of described the second metal level is more than or equal to 2.
Described many gate lines are laterally arranged, and described many data wires are vertically arranged, described gate line and the orthogonal intersection of described data wire.
The material of described the first metal layer is molybdenum, and the material of described the second metal level is aluminium.
Described gate line and/or data wire comprise the first molybdenum layer, be arranged at the first aluminium lamination on described the first molybdenum layer, be arranged at the second molybdenum layer on described the first aluminium lamination, be arranged at the second aluminium lamination on described the second molybdenum layer and be arranged at the 3rd molybdenum layer on described the second aluminium lamination.
The thickness of described the second metal level is less than or equal to 3000 dusts.
The thickness range of described the first molybdenum layer is 120～180 dusts.
The thickness range of described the second molybdenum layer and the 3rd molybdenum layer is 700～900 dusts.
The utility model also provides a kind of display unit, comprises the color membrane substrates of opposing parallel setting and has any array base palte of above-mentioned feature, and be filled in the liquid crystal between described color membrane substrates and the described array base palte.
The utility model also provides a kind of display unit, comprises any array base palte with above-mentioned feature, and is formed at luminous organic material and encapsulation cover plate on the described array base palte.
A kind of array base palte and display unit that the utility model provides, array base palte comprises substrate, be arranged at cross one another many gate lines and many data wires on the substrate, wherein, gate line and/or data wire comprise the first metal layer that Spaced arranges, and be arranged at the second metal level between each adjacent the first metal layer, and the number of the second metal level is more than or equal to 2.Producing under the constant condition of material and facility, by change gate line and/or data wire structure, to reach the thickness that increases gate line and/or data wire, and then reduce the resistance value of gate line and/or data wire, thereby solved when making large-sized display floater, the excessive problem of resistance value that causes owing to the growth of gate line and data wire, avoided simultaneously prior art for the resistance value that reduces gate line and/or data wire the thickness of single increase aluminium film cause the low problem of yields of product so that the aluminium film is subjected to thermal deformation.
Description of drawings
In order to be illustrated more clearly in the utility model embodiment and technical scheme of the prior art, the below will do to introduce simply to the accompanying drawing of required use in embodiment and the description of the Prior Art, apparently, accompanying drawing in the following describes only is embodiment more of the present utility model, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain according to these accompanying drawings other accompanying drawing.
The structural representation of the array base palte that Fig. 1 provides for the utility model;
The gate line that Fig. 2 provides for the utility model and/or the longitudinal cross-section structural representation of data wire.
Embodiment
Below in conjunction with the accompanying drawing among the utility model embodiment, the technical scheme among the utility model embodiment is clearly and completely described, obviously, described embodiment only is the utility model part embodiment, rather than whole embodiment.Based on the embodiment in the utility model, those of ordinary skills are not making the every other embodiment that obtains under the creative work prerequisite, all belong to the scope of the utility model protection.
Need to prove: the utility model embodiment " on " D score just describes the utility model embodiment with reference to the accompanying drawings, as limiting term.
The array base palte that the utility model embodiment provides, comprise substrate, be arranged at cross one another many gate lines and many data wires on the described substrate, described gate line and/or data wire comprise the first metal layer that Spaced arranges, and be arranged at the second metal level between each adjacent described the first metal layer, wherein, the number of plies of described the second metal level is more than or equal to 2.
Wherein, preferably, described many gate lines are laterally arranged, and described many data wires are vertically arranged, described gate line and the orthogonal intersection of described data wire.
Orthogonal arranged in a crossed manner as example take the gate line of laterally arranging and the data wire of vertically arranging, the array base palte 1 that the utility model embodiment provides as shown in Figure 1, comprising:
Wherein, as shown in Figure 2, gate line 11 can comprise the first metal layer 13 that Spaced arranges, and is arranged at the second metal level 14 between each adjacent the first metal layer 13, and wherein, the number of the second metal level 14 is more than or equal to 2;
Perhaps, as shown in Figure 2, data wire 12 also can comprise the first metal layer 13 that Spaced arranges, and is arranged at the second metal level 14 between each adjacent the first metal layer 13, and wherein, the number of the second metal level 14 is more than or equal to 2.
Need to prove, the array base palte that the utility model embodiment provides, can adopt separately gate line to comprise the first metal layer that Spaced arranges, and be arranged at the second metal level between each adjacent described the first metal layer, wherein, the number of described the second metal level is more than or equal to 2 structure; Also can adopt separately data wire to comprise the first metal layer that Spaced arranges, and be arranged at the second metal level between each adjacent described the first metal layer, wherein, the number of described the second metal level is more than or equal to 2 structure; Can also adopt simultaneously gate line and data wire to include the first metal layer that Spaced arranges, and be arranged at the second metal level between each adjacent described the first metal layer, wherein, the number of described the second metal level is more than or equal to 2 structure, and the utility model does not limit.
In fact, the material of gate line and/or data wire can be selected from the metals such as molybdenum, aluminium, copper, but is not limited to this.Consider the factor of the aspects such as thermal stability, conductivity and production cost of different metal, the structure that can adopt two kinds of preparation of metals Spaceds to arrange.Among the utility model embodiment, selecting the material of the first metal layer is molybdenum, and the material of the second metal level is aluminium, to obtain gate line and the data wire of the high comprehensive performances such as thermal stability, conductivity.
The gate line 11 of the array base palte 1 that the utility model embodiment provides and/or data wire 12 can comprise multilayer the first metal layer and the second metal level, and its quantity can be directed to the restriction of array substrate thickness and carry out accommodation.Preferably, gate line 11 and/or data wire 12 comprise three interlayers every the first metal layer 13 that arranges, and are arranged at two the second metal levels 14 between each adjacent the first metal layer 13.Particularly, the material of the first metal layer 13 can be molybdenum, the material of the second metal level 14 can be aluminium, so, that is to say, gate line 11 and/or data wire 12 can comprise the first molybdenum layer, be arranged at the first aluminium lamination on the first molybdenum layer, be arranged at the second molybdenum layer on the first aluminium lamination, be arranged at the second aluminium lamination on the second molybdenum layer and be arranged at the 3rd molybdenum layer on the second aluminium lamination.
Further, the thickness of the second metal level 14 is less than or equal to 3000 dusts, this is to set according to the character of the metal material molybdenum of the making gate line that uses in the present industry and/or data wire and aluminium, because the thermal stability of aluminum metal is relatively poor, thermal coefficient of expansion is also larger simultaneously, if serious deformation occured in the aluminium film when the blocked up meeting of aluminium film caused temperature to raise, so that the yields of product reduces, in order better to guarantee stability and the yields of product, the thickness of the second metal level 14 that the utility model is described is less than or equal to 3000 dusts.
Further, the thickness range of the first molybdenum layer can be 120～180 dusts.
Further, the thickness range of the second molybdenum layer and the 3rd molybdenum layer all can be 700～900 dusts.
Need to prove, Fig. 1 is the part of this array base palte 1 only, it will be appreciated by those skilled in the art that this array base palte 1 comprises a plurality of structures as shown in Figure 1, and the present embodiment only is illustrated as an example of this part example.
The improvement of gate line and/or data wire structure in the pair array substrate that the utility model embodiment provides, at first avoided long and the problem that the gate line 11 that causes and/or data wire 12 resistance values increase of the gate line 11 of large scale display floater and/or data wire 12: the computing formula R=ρ L/S that utilizes resistance value in the electricity, wherein ρ represents the resistivity of resistance, the value of ρ is determined by material itself, L represents the length of resistance, S represents the cross-sectional area of resistance, if need to reduce the resistance value of gate line 11 and/or data wire 12, it is the value of R, because ρ is by the decision of the material of gate line 11 and/or data wire 12 itself, can not change, can only reduce the length L of gate line 11 and/or data wire 12 or the cross-sectional area S of increase gate line 11 and/or data wire 12, yet, in large-sized display floater, the length of gate line 11 and data wire 12 determines, unalterable, therefore, only has the resistance value that reduces gate line 11 and/or data wire 12 by the cross-sectional area S that increases gate line 11 and/or data wire 12, the cross-sectional area of gate line 11 and/or data wire 12 is to be determined by the width of gate line 11 and/or data wire 12 and thickness, but because gate line 11 and/or data wire 12 all are made of metal, lighttight, in order to guarantee the display performance of product, the width of gate line 11 and/or data wire 12 also is unalterable.The array base palte that the utility model embodiment provides, it namely is the structure by change gate line 11 and/or data wire 12, to reach the thickness that increases gate line 11 and/or data wire 12, and then reduce the requirement of the resistance value of gate line 11 and/or data wire 12, thereby go for large-sized display floater.
Statement according to above increase gate line 11 and/or data wire 12 thickness, the composition structure of the present gate line 11 of simultaneously combination and/or data wire 12 molybdenums-aluminium-molybdenum, can not have at cost on the basis of a larger increase, if increase the thickness of gate line 11 and/or data wire 12 by the thickness of single increase aluminium film, because the thermal stability of aluminium is relatively poor, thermal coefficient of expansion is larger, behind the thickness of single increase aluminium film, if temperature raises, then the aluminium film will expand, and the aluminium film is thicker, dilatancy more serious, like this, will in aluminium film surface formation projection one by one, have a strong impact on the yields of product.The low problem of product yields that causes in order to solve this increase aluminium film thickness, utilize simultaneously the stronger thermal stability of molybdenum, the composition structure of gate line 11 and data wire 12 metal levels and the thickness of each metal level are adjusted simultaneously, to reach the production requirement of large scale display floater.
Need to prove, the material of the first metal layer, the second metal level also can be selected the less metal material of other resistance values, but consider in actual production process, if select the too small metal material of resistance value, the situation that can cause the array base palte high cost produced, the material that the utility model embodiment preferably proposes the first metal layer can be molybdenum, and the material of the second metal level can be aluminium, but the utility model does not limit.
Embodiment of the present utility model provides a kind of array base palte, array base palte comprises substrate, be arranged at cross one another many gate lines and many data wires on the substrate, wherein, gate line and/or data wire comprise the first metal layer that Spaced arranges, and be arranged at the second metal level between each adjacent the first metal layer, and the number of the second metal level is more than or equal to 2.Producing under the constant condition of material and facility, by changing the structure of gate line and/or data wire, to reach the thickness that increases gate line and/or data wire, and then reduce the resistance value of gate line and/or data wire, thereby solved when making large-sized display floater, the excessive problem of resistance value that causes owing to the growth of gate line and/or data wire, avoided simultaneously prior art for the resistance value that reduces gate line and/or data wire the thickness of single increase aluminium film cause the low problem of yields of product so that the aluminium film is subjected to thermal deformation.
The utility model embodiment provides a kind of display unit, can be liquid crystal indicator, comprise the color membrane substrates of opposing parallel setting and the array base palte that above-described embodiment proposes, and be filled in the liquid crystal between described color membrane substrates and the described array base palte, repeat no more herein.
The liquid crystal indicator that the utility model embodiment provides, described liquid crystal indicator can have for liquid crystal display, LCD TV, DPF, mobile phone, panel computer etc. product or the device of Presentation Function, therefore the utility model does not limit.
The display unit that the utility model embodiment provides, can be OLED (Organic Light-Emitting Diode, Organic Light Emitting Diode) display unit, comprise the array base palte that above-described embodiment proposes, and be formed at luminous organic material and encapsulation cover plate on this array base palte.
The above; it only is embodiment of the present utility model; but protection range of the present utility model is not limited to this; anyly be familiar with those skilled in the art in the technical scope that the utility model discloses; can expect easily changing or replacing, all should be encompassed within the protection range of the present utility model.Therefore, protection range of the present utility model should be as the criterion with the protection range of described claim.
Claims (9)
1. an array base palte comprises substrate, is arranged at cross one another many gate lines and many data wires on the described substrate, it is characterized in that,
Described gate line and/or data wire comprise the first metal layer that Spaced arranges, and are arranged at the second metal level between each adjacent described the first metal layer, and wherein, the number of plies of described the second metal level is more than or equal to 2.
2. array base palte according to claim 1 is characterized in that, described many gate lines are laterally arranged, and described many data wires are vertically arranged, described gate line and the orthogonal intersection of described data wire.
3. array base palte according to claim 1 is characterized in that, the material of described the first metal layer is molybdenum, and the material of described the second metal level is aluminium.
4. array base palte according to claim 3, it is characterized in that, described gate line and/or data wire comprise the first molybdenum layer, be arranged at the first aluminium lamination on described the first molybdenum layer, be arranged at the second molybdenum layer on described the first aluminium lamination, be arranged at the second aluminium lamination on described the second molybdenum layer and be arranged at the 3rd molybdenum layer on described the second aluminium lamination.
5. array base palte according to claim 4 is characterized in that, the thickness of described the second metal level is less than or equal to 3000 dusts.
6. array base palte according to claim 4 is characterized in that, the thickness range of described the first molybdenum layer is 120～180 dusts.
7. array base palte according to claim 4 is characterized in that, the thickness range of described the second molybdenum layer and the 3rd molybdenum layer is 700～900 dusts.
8. a display unit is characterized in that, comprises color membrane substrates that opposing parallel arranges and such as the described array base palte of any one among the claim 1-7, and is filled in the liquid crystal between described color membrane substrates and the described array base palte.
9. a display unit is characterized in that, comprises such as the described array base palte of any one among the claim 1-7, and is formed at luminous organic material and encapsulation cover plate on the described array base palte.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201220488684.0U CN202905715U (en) | 2012-09-21 | 2012-09-21 | Array substrate and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201220488684.0U CN202905715U (en) | 2012-09-21 | 2012-09-21 | Array substrate and display device |
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| Publication Number | Publication Date |
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| CN202905715U true CN202905715U (en) | 2013-04-24 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201220488684.0U Expired - Lifetime CN202905715U (en) | 2012-09-21 | 2012-09-21 | Array substrate and display device |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2015096203A1 (en) * | 2013-12-27 | 2015-07-02 | 深圳市华星光电技术有限公司 | Liquid crystal panel |
| CN105655391A (en) * | 2016-01-28 | 2016-06-08 | 武汉华星光电技术有限公司 | TFT array substrate and manufacturing method thereof |
| WO2019061956A1 (en) * | 2017-09-26 | 2019-04-04 | 武汉华星光电技术有限公司 | Array substrate and display apparatus |
| CN113009722A (en) * | 2019-12-20 | 2021-06-22 | 京东方科技集团股份有限公司 | Display panel, manufacturing method thereof and display device |
-
2012
- 2012-09-21 CN CN201220488684.0U patent/CN202905715U/en not_active Expired - Lifetime
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2015096203A1 (en) * | 2013-12-27 | 2015-07-02 | 深圳市华星光电技术有限公司 | Liquid crystal panel |
| CN105655391A (en) * | 2016-01-28 | 2016-06-08 | 武汉华星光电技术有限公司 | TFT array substrate and manufacturing method thereof |
| WO2017128561A1 (en) * | 2016-01-28 | 2017-08-03 | 武汉华星光电技术有限公司 | Tft array substrate and manufacturing method therefor |
| CN105655391B (en) * | 2016-01-28 | 2018-10-26 | 武汉华星光电技术有限公司 | Tft array substrate and preparation method thereof |
| WO2019061956A1 (en) * | 2017-09-26 | 2019-04-04 | 武汉华星光电技术有限公司 | Array substrate and display apparatus |
| CN113009722A (en) * | 2019-12-20 | 2021-06-22 | 京东方科技集团股份有限公司 | Display panel, manufacturing method thereof and display device |
| CN113009722B (en) * | 2019-12-20 | 2023-02-24 | 京东方科技集团股份有限公司 | Display panel, manufacturing method thereof and display device |
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Granted publication date: 20130424 |
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| CX01 | Expiry of patent term |