CN103700675A

CN103700675A - AMOLED array basal plate and display device

Info

Publication number: CN103700675A
Application number: CN201310749880.8A
Authority: CN
Inventors: 永山和由
Original assignee: BOE Technology Group Co Ltd
Current assignee: BOE Technology Group Co Ltd
Priority date: 2013-12-31
Filing date: 2013-12-31
Publication date: 2014-04-02
Also published as: CN109273516A

Abstract

The invention discloses an AMOLED array basal plate. The AMOLED array basal plate comprises a plurality of pixel structures formed on a substrate basal plate in an array mode; each pixel structure is formed by encircling a grid line and a signal line and a power supply line which are vertical to the grid line; each pixel structure comprises a thin film transistor structure, an anode, a cathode and an organic lighting layer between the anode and the cathode; each anode is positioned at the area corresponding to each pixel structure; each cathode is a transparent electrode covering the whole array basal plate; an insulation interval layer is formed between the anodes and the cathodes, corresponding to a non-pixel structural area; the anodes, the organic lighting layers and the cathodes form an organic light emitting diode; the grid lines, the signal lines and the power supply lines jointly drive the light emitting diode to light by the thin film transistor structures; the AMOLED array basal plate is characterized by also comprising at least one cathode auxiliary line at the same layer with the anodes and positioned at the corresponding area of the grid lines, the signal lines and the power supply lines. The cathode auxiliary line penetrates through at least two via holes of the insulation interval layer to be connected with the cathodes. Under the condition that the aperture ratio is not influenced, the cathode resistance is reduced.

Description

AMOLED array base palte and display unit

Technical field

The present invention relates to Display Technique field, particularly a kind of AMOLED array base palte and display unit.

Background technology

For the AMOLED display unit of top transmitting, negative electrode adopts transparent ITO(Indium Tin Oxide, indium tin oxide) electrode formation, and be that a monoblock covers the block type electrode on array base palte, so the resistance of negative electrode is very high.Cathode resistor is very high, can increase IR drop, excessive IR drop can affect picture all once.In order to reduce IR drop, in existing scheme, by negative electrode boost line, reduce IR drop, as shown in Figure 1, non-pixel region on array base palte, form the some negative electrode boost lines that are positioned at different layers with negative electrode, normally leak simultaneously and form with anode and/or source, as negative electrode boost line in Fig. 1 120 and anode 110 adopt same material and form simultaneously, both are positioned at same layer.Negative electrode boost line 120 is connected (Fig. 1, negative electrode boost line 120 and via hole 130 are network structure on whole substrate) with the negative electrode that is arranged in upper strata by via hole 130.It is in parallel with negative electrode that this is equivalent to negative electrode boost line 120, thereby reduced the resistance of negative electrode, therefore reduced IR drop.But to specifically in a side of grid line, holding wire and power line, lay some negative electrode boost lines non-pixel region (being non-display area), can cause the aperture opening ratio of whole display unit to reduce.

Summary of the invention

(1) technical problem that will solve

The technical problem to be solved in the present invention is: how in the situation that reducing IR drop, not affect aperture opening ratio.

(2) technical scheme

For solving the problems of the technologies described above, the invention provides a kind of AMOLED array base palte, be included in the some dot structures that form with array format on underlay substrate, described each dot structure by grid line and with described grid line all vertical holding wire and power line surround, described each dot structure comprises: thin-film transistor structure, anode, organic luminous layer between negative electrode and anode and negative electrode, described anode is positioned at the region that each dot structure is corresponding, negative electrode is for covering the transparency electrode of whole array base palte, between the anode that non-dot structure region is corresponding and negative electrode, be formed with dielectric spacer layer, described anode, organic luminous layer and negative electrode are formed with OLED, described grid line, holding wire and power line drive described Organic Light Emitting Diode luminous by described thin-film transistor structure is common, also comprise and being formed on described anode with layer, and be positioned at described grid line, at least one negative electrode boost line of holding wire and power line corresponding region, described negative electrode boost line connects described negative electrode by least two via holes through described dielectric spacer layer.

Wherein, described at least two via holes are all positioned at the crossing region of described grid line and holding wire or power line.

Wherein, described grid line, holding wire and power line corresponding region are all formed with described negative electrode boost line.

Wherein, described at least two via holes are the via hole that is positioned at grid line and holding wire described in each or the crossing region of power line.

Wherein, grid line, holding wire or the power line that the live width of described negative electrode boost line is less than or equal to corresponding region live width separately.

Wherein, the side that described anode deviates from described negative electrode is also formed with the flatness layer of the insulation that covers described array base palte, and the degree of depth of described via hole is greater than the thickness of described dielectric spacer layer.

The present invention also provides a kind of AMOLED display unit, comprises AMOLED array base palte described in above-mentioned any one.

(3) beneficial effect

In the present invention, negative electrode boost line is produced on to grid line, holding wire and power line corresponding region, rather than lay some negative electrode boost lines in a side of grid line, holding wire and power line, therefore do not affect aperture opening ratio, and reduced to a certain extent cathode resistor, thereby reduced IR drop.

Accompanying drawing explanation

Fig. 1 is a kind of AMOLED array base-plate structure schematic diagram of prior art;

Fig. 2 is a kind of AMOLED array base-plate structure schematic diagram of the embodiment of the present invention;

Fig. 3 is the schematic cross-section along A-A of Fig. 2.

Embodiment

Below in conjunction with drawings and Examples, the specific embodiment of the present invention is described in further detail.Following examples are used for illustrating the present invention, but are not used for limiting the scope of the invention.

The AMOLED array base palte of the embodiment of the present invention as shown in Figures 2 and 3, this array base palte is included on underlay substrate 210 the some dot structures that form with array format, described each dot structure by grid line 220 and with described grid line 220 all vertical holding wire 241 and power line 242 surround.Described each dot structure comprises: the organic luminous layer 300 between thin-film transistor structure (in Fig. 2 shown in dotted line frame), anode 271, negative electrode 290 and anode 271 and negative electrode 290.The grid of grid line 220, thin-film transistor), gate insulation layer 230, source leak metal level and (comprising: the source-drain electrode of holding wire 241, power line 242 and thin-film transistor), passivation layer 250, flatness layer 260, anode 271, pixel defining layer 280, organic luminous layer 300 and negative electrode 290 concrete hierarchical structure as shown in Figure 3, comprises from the bottom to top successively: underlay substrate 210, grid metal level (comprising:.

Anode 271 is positioned at the region that each dot structure is corresponding, and negative electrode 290 is for covering the transparency electrode of whole array base palte.Between the anode 271 that non-dot structure region is corresponding and negative electrode 290, be formed with dielectric spacer layer 280(and be also pixel defining layer).Described anode 271, organic luminous layer 300 and negative electrode 290 are formed with OLED, and grid line 220, holding wire 241 and power line 242 drive described Organic Light Emitting Diode luminous by described thin-film transistor structure is common.In order to reduce cathode resistor, also comprise and being formed on anode 272 with layer, and be positioned at least one negative electrode boost line 272 of grid line 220, holding wire 241 and power line 242 corresponding regions, negative electrode boost line 272 connects negative electrode by least two via holes 281 through dielectric spacer layer 280.

Owing to negative electrode boost line 272 being produced on to grid line 220, holding wire 241 and power line 242 corresponding regions, rather than lay some negative electrode boost lines in a side of grid line 220, holding wire 241 and power line 242, therefore do not affect aperture opening ratio, and reduced to a certain extent cathode resistor, thereby reduced IR drop.

Further, the layout of pattern during for convenient making, at least two via holes 281 are all positioned at the crossing region of grid line 220 and holding wire 241 or power line 242.

In order further to reduce cathode resistor, grid line 220, holding wire 241 and power line 242 corresponding regions are all formed with negative electrode boost line 272, and negative electrode boost line 272 forms network structure.Further, for cancellated negative electrode boost line 272, all formation via hole 281 in the region that each grid line 220 and holding wire 241 or power line 242 are crossing.

In order not affect aperture opening ratio, the live width of negative electrode boost line 272 can be less than or equal to grid line 220, holding wire 241 or power line 242 live width separately of corresponding region.

Wherein, the side that anode 271 deviates from negative electrode is also formed with the flatness layer 260 of the insulation that covers described array base palte, in order further to reduce cathode resistor, as shown in Figure 3, the degree of depth of via hole 281 is greater than the thickness of dielectric spacer layer 280, crosses hole depth and can arrive flatness layer 260, even penetrates flatness layer 260, make like this to connect negative electrode 290 and touch area change greatly with negative electrode boost line 272, resistance is less.

The present invention also provides a kind of AMOLED display unit, comprises above-mentioned AMOLED array base palte.This AMOLED display unit can be: any product or parts with Presentation Function such as mobile phone, panel computer, television set, display, notebook computer, DPF, navigator.

Above execution mode is only for illustrating the present invention; and be not limitation of the present invention; the those of ordinary skill in relevant technologies field; without departing from the spirit and scope of the present invention; can also make a variety of changes and modification; therefore all technical schemes that are equal to also belong to category of the present invention, and scope of patent protection of the present invention should be defined by the claims.

Claims

1. an AMOLED array base palte, be included in the some dot structures that form with array format on underlay substrate, described each dot structure by grid line and with described grid line all vertical holding wire and power line surround, described each dot structure comprises: thin-film transistor structure, anode, organic luminous layer between negative electrode and anode and negative electrode, described anode is positioned at the region that each dot structure is corresponding, negative electrode is for covering the transparency electrode of whole array base palte, between the anode that non-dot structure region is corresponding and negative electrode, be formed with dielectric spacer layer, described anode, organic luminous layer and negative electrode are formed with OLED, described grid line, holding wire and power line drive described Organic Light Emitting Diode luminous by described thin-film transistor structure is common, it is characterized in that, also comprise and being formed on described anode with layer, and be positioned at described grid line, at least one negative electrode boost line of holding wire and power line corresponding region, described negative electrode boost line connects described negative electrode by least two via holes through described dielectric spacer layer.

2. AMOLED array base palte as claimed in claim 1, is characterized in that, described at least two via holes are all positioned at the crossing region of described grid line and holding wire or power line.

3. AMOLED array base palte as claimed in claim 1, is characterized in that, described grid line, holding wire and power line corresponding region are all formed with described negative electrode boost line.

4. AMOLED array base palte as claimed in claim 3, is characterized in that, described at least two via holes are the via hole that is positioned at grid line and holding wire described in each or the crossing region of power line.

5. AMOLED array base palte as claimed in claim 1, is characterized in that, the live width of described negative electrode boost line is less than or equal to the grid line of corresponding region, holding wire or power line live width separately.

6. the AMOLED array base palte as described in any one in claim 1～5, it is characterized in that, the side that described anode deviates from described negative electrode is also formed with the flatness layer of the insulation that covers described array base palte, and the degree of depth of described via hole is greater than the thickness of described dielectric spacer layer.

7. an AMOLED display unit, comprises AMOLED array base palte as described in any one in claim 1～6.