CN202854647U - Zero-terminal machine - Google Patents
Zero-terminal machine Download PDFInfo
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- CN202854647U CN202854647U CN 201220419104 CN201220419104U CN202854647U CN 202854647 U CN202854647 U CN 202854647U CN 201220419104 CN201220419104 CN 201220419104 CN 201220419104 U CN201220419104 U CN 201220419104U CN 202854647 U CN202854647 U CN 202854647U
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Abstract
The utility model discloses a zero-terminal machine. The zero-terminal machine is used for achieving a terminal without central processing unit (CPU) and operating systems, simplifies a hardware structure and improves processing speed. The zero-terminal machine comprises a shell body, wherein a network interface and an input or output interface are arranged outside the shell body. A field-programmable gate array and an Ethernet processing unit, a micro control unit, a policy engine unit and an input or output unit are arranged in the shell, wherein the Ethernet processing unit, the micro control unit, the policy engine unit and the input or output unit are connected with the field-programmable gate array, the Ethernet processing unit is respectively connected with the network interface and the micro control unit, the micro control unit is further connected with the policy engine unit, the policy engine unit is further connected with the input or output unit, and the input or output unit is further connected with the input or output interface.
Description
Technical field
The utility model relates to communication technical field, particularly a kind of zero terminating machine.
Background technology
Traditional terminating machine is generally the equipment such as PC, notebook computer.In these terminating machines, usually all include CPU, storer and operating system, its hardware configuration is complicated, and cost of manufacture is expensive.And, in these terminating machines, can't direct communication between the various input-output apparatus, must process through CPU, therefore, need the processing procedure through series of complex, cause that speed is slow, efficient is low.In addition, all hardware in the terminating machine all carries out unified management by operating system, and operating system is realized by software, usually can be divided into operating system nucleus, driver, interface layer and application layer by bottom-up.In this operating system framework, after network interface card receives Frame, Frame need to just can be submitted to corresponding application program through processing layer by layer of operating system, after application program is handled, just can submit to corresponding subsystem through processing layer by layer again, such as display subsystem, audio subsystem etc., become analog signal transmission to output device data-switching at last.In such one section tediously long data communication process, every one deck is processed all needs to take the CPU processing time, causes therefore that processing speed is slow, efficient is low.Simultaneously, the terminating machine that adopts this framework requires high to the performance of CPU and heat radiation, and this will cause the significantly rising of manufacturing cost, when safeguarding at ordinary times, can face again the problem of operating system update, and maintenance cost is very big.
Therefore, need badly at present a kind ofly without CPU, simplify hardware configuration without the terminating machine of operating system, promote processing speed.
The utility model content
The utility model provides a kind of zero terminating machine, and is a kind of without CPU, without the terminating machine of operating system in order to realize, thereby simplifies hardware configuration, promotes processing speed.
A kind of zero terminating machine, comprise: housing, described outside is provided with network interface and input/output interface, described enclosure interior is provided with field programmable gate array and is connected respectively to the Ethernet processing unit of described field programmable gate array, micro-control unit, protocol engine unit and I/O unit, wherein, described Ethernet processing unit also links to each other with described network interface, described micro-control unit respectively; Described micro-control unit also links to each other with described protocol engine unit; Described protocol engine unit also links to each other with described I/O unit; Described I/O unit also links to each other with described input/output interface.
Better, described input/output interface comprises: video interface, audio interface and USB interface, described I/O unit comprises: video processing unit, audio treatment unit and USB processing unit, described video processing unit, described audio treatment unit and described USB processing unit link to each other with described protocol engine unit respectively, described video processing unit also links to each other with described video interface, described audio treatment unit also links to each other with described audio interface, and described USB processing unit also links to each other with described USB interface.
Better, described video processing unit comprises: Video Codec and video dac, and wherein, described Video Codec links to each other with described protocol engine unit, described video dac respectively; Described video dac also links to each other with described video interface.
Better, described video processing unit further comprises: the video clock lock unit that links to each other with described Video Codec.
Better, described video processing unit further comprises: the frame buffer cell, it links to each other with described protocol engine unit, described Video Codec respectively.
Better, described audio treatment unit comprises: audio codec and audio digital to analog converter, and wherein, described audio codec links to each other with described protocol engine unit, described audio digital to analog converter respectively; Described audio digital to analog converter also links to each other with described audio interface.
Better, described USB processing unit comprises: USB codec, USB controller and usb hub, and wherein, described USB codec links to each other with described protocol engine unit, described USB controller respectively; Described USB controller also links to each other with described usb hub; Described usb hub also links to each other with described USB interface.
Better, described outside further is provided with reset key, and described enclosure interior further comprises: be connected to the reset unit of field programmable gate array, this reset unit links to each other with described protocol engine unit, described reset key respectively.
Better, described Ethernet processing unit further comprises: ethernet physical layer chip and ethernet medium MAC layer chip, and wherein, described ethernet physical layer chip links to each other with described network interface, described ethernet medium MAC layer chip respectively; Described ethernet medium MAC layer chip also links to each other with micro-control unit.
Better, described enclosure interior further comprises: be connected to the frequency control chip of field programmable gate array, described frequency control chip links to each other with described I/O unit.
Among the utility model embodiment, link to each other with I/O unit with Ethernet processing unit, micro-control unit, protocol engine unit by FPGA, because FPGA can simulate by hardware language the communication sequential of various hardware, thereby can process the information of coming automatic network and input-output apparatus, thereby replaced traditional CPU, simplified the hardware configuration of terminating machine.
Description of drawings
Fig. 1 is the structural representation of the zero terminating machine among the utility model embodiment;
Fig. 2 is the external structure schematic diagram of the zero terminating machine in the utility model preferred embodiment;
Fig. 3 is the inner structure schematic diagram of the zero terminating machine in the utility model preferred embodiment.
Embodiment
For fully understanding the purpose of this utility model, feature and effect, by following concrete embodiment, the utility model is elaborated, but the utility model is not restricted to this.
The utility model embodiment provides a kind of zero terminating machine, and is a kind of without CPU, without the terminating machine of operating system in order to realize, thereby simplifies hardware configuration, promotes processing speed.
Zero terminating machine among the utility model embodiment is an etui specifically, and it can connect the peripherals such as keyboard, mouse, display, audio amplifier, ethernet device and USB storage medium.Fig. 1 shows the structural representation of zero terminating machine among the utility model embodiment.As shown in Figure 1, zero terminating machine comprises housing 21, housing 21 outer setting are useful on the network interface 24 that connects the network equipments such as Ethernet, and the input/output interface 20 that is used for connecting the input-output apparatus such as keyboard, mouse, display, audio amplifier and USB storage medium.Enclosure interior is provided with field programmable gate array (be called for short FPGA) 1, and the Ethernet processing unit 2, the micro-control unit 3(that are connected respectively to FPGA1 are called for short MCU), protocol engine unit 4 and I/O unit 5.Wherein, an end of Ethernet processing unit 2 links to each other with network interface 24, and the other end links to each other with MCU3; The end of MCU3 links to each other with Ethernet processing unit 2, and the other end links to each other with protocol engine unit 4; One end of protocol engine unit 4 links to each other with MCU3, and the other end links to each other with I/O unit 5; One end of I/O unit 5 links to each other with protocol engine unit 4, and the other end links to each other with input/output interface 20.Wherein, the housing 21 among Fig. 1 is by the straight line signal, and the straight line top represents the part of housing and outside, the part of straight line below expression enclosure interior, and in actual conditions, housing 21 is the tetragonal body shape of a sealing normally.
Particularly, described input/output interface comprises: video interface, audio interface and USB interface, then I/O unit comprises: video processing unit, audio treatment unit and USB processing unit.
Wherein, video processing unit comprises: Video Codec and video dac, and wherein, an end of described Video Codec links to each other with described protocol engine unit, and the other end links to each other with video dac; One end of described video dac links to each other with described Video Codec, and the other end links to each other with described video interface.This video processing unit can further include: the video clock lock unit that links to each other with described Video Codec.And described video processing unit can further include: the frame buffer cell, and the one end links to each other with described protocol engine unit, and the other end links to each other with described Video Codec.
Audio treatment unit comprises: audio codec and audio digital to analog converter, and wherein, an end of described audio codec links to each other with described protocol engine unit, and the other end links to each other with audio digital to analog converter; One end of described audio digital to analog converter links to each other with described audio codec, and the other end links to each other with described audio interface.
The USB processing unit comprises: USB codec, USB controller and usb hub, and wherein, an end of described USB codec links to each other with described protocol engine unit, and the other end links to each other with the USB controller; One end of described USB controller links to each other with described USB codec, and the other end links to each other with described usb hub; One end of described usb hub links to each other with described USB controller, and the other end links to each other with described USB interface.
Ethernet processing unit may further include: ethernet physical layer chip and ethernet medium MAC layer chip, wherein, one end of ethernet physical layer chip links to each other with described network interface, and the other end links to each other with described ethernet medium MAC layer chip; One end of ethernet medium MAC layer chip links to each other with the ethernet physical layer chip, and the other end links to each other with micro-control unit.
In addition, outside can also further be provided with reset key, then described enclosure interior further comprises: be connected to the reset unit of field programmable gate array, an end of this reset unit links to each other with described protocol engine unit, and the other end links to each other with described reset key.And enclosure interior can further include: be connected to the frequency control chip of field programmable gate array, described frequency control chip links to each other with described I/O unit.
Zero terminating machine among the utility model embodiment, link to each other with I/O unit with Ethernet processing unit, micro-control unit, protocol engine unit by FPGA, because FPGA can simulate by hardware language the communication sequential of various hardware, thereby can process the information of coming automatic network and input-output apparatus, thereby replaced traditional CPU, simplified the hardware configuration of terminating machine.
The below describes the concrete structure of the zero terminating machine that the utility model provides in detail with a preferred embodiment.
Fig. 2 shows the outside schematic diagram of the zero terminating machine in the utility model preferred embodiment.As can be seen from Figure 2, zero terminating machine comprises housing 21, housing 21 outer setting have network interface 24, RJ45 gigabit Ethernet network interface for example, this network interface 24 links to each other with outside network device by netting twine, be used for receiving the data that outside network device sends, also be used for transmitting data to outside network device.This outside network device includes but not limited to desktop virtual machine, Control Server.Outside also is provided with input/output interface, is used for linking to each other with input-output apparatus.Particularly, input/output interface comprises: be used for to connect the video interface 23(of display device such as the VGA port), be used for connecting the audio interface (not shown) of the audio frequency apparatuses such as audio amplifier and the USB interface 25 that is used for connecting keyboard, mouse and memory device.Wherein the quantity of USB interface 25 is a plurality of.Also be provided with power interface 22 on the housing 21.
Fig. 3 shows the inner structure schematic diagram of the zero terminating machine in the utility model preferred embodiment.As can be seen from Figure 3, should comprise zero terminating machine inside: the ethernet physical layer chip that links to each other with network interface (for example ethernet port), and the ethernet medium MAC layer chip that links to each other with the ethernet physical layer chip, ethernet physical layer chip and ethernet medium MAC layer chip have consisted of Ethernet processing unit jointly, be used for to realize the base conditioning from the data of network interface.Wherein, the ethernet physical layer chip is used for realizing the transmission channel of network data, and ethernet medium MAC layer chip is used for the network data of ethernet physical layer chip transmission is carried out necessary processing.
Should also comprise zero terminating machine inside: the micro-control unit and the protocol engine unit that are used for the network data that Ethernet processing unit is transmitted is carried out the operations such as analytical calculation.Wherein, micro-control unit links to each other with ethernet medium MAC layer chip in the Ethernet processing unit, be used for the network data of ethernet medium MAC layer chip transmission is carried out necessary analytical calculation, and with the network data transmission after the analytical calculation to the protocol engine unit.The protocol engine unit links to each other with micro-control unit, at first classifies to the network data after the micro-control unit analytical calculation in the protocol engine unit, for example, network data can be divided into video stream data, audio stream data and usb data etc.The protocol engine unit is according to the type of network data, determine the processing protocol of the data of respective type, priority and the Processing Algorithm (will describe in detail hereinafter about concrete processing protocol) of various types of data have been stipulated in the processing protocol, then, the protocol engine unit is distributed to corresponding input-output apparatus after network data is added corresponding type identification.
In order to realize communicating by letter between protocol engine and the input-output apparatus, zero terminating machine inside further comprises I/O unit.One end of I/O unit links to each other with the protocol engine unit, is used for receiving the network data of protocol engine unit distribution, and the other end links to each other with input/output interface, is used for transferring data to corresponding input-output apparatus by input/output interface.Particularly, I/O unit comprises: for the treatment of the video processing unit of video stream data, for the treatment of the audio treatment unit of audio stream data and for the treatment of the USB processing unit of usb data.
Wherein, video processing unit comprises: the Video Codec that links to each other with the protocol engine unit is used for video stream data is encoded or decoded; The video dac that links to each other with Video Codec, be used for Video Codec coding or decoded digital signal are converted to the simulating signal that the VGA port can be identified, and the simulating signal after will changing is given corresponding display device by the VGA port transmission.In order to realize the synchronous of vision signal, video processing unit further comprises: the video clock synchronization module that links to each other with Video Codec.In addition, in order to realize the buffer memory of vision signal, video processing unit further comprises: the frame buffer cell, the one end links to each other with the protocol engine unit, the other end links to each other with Video Codec, for larger in the video stream data amount, when exceeding the processing capacity of Video Codec, buffer memory part video stream data is to the frame buffer cell, to guarantee the normal operation of Video Codec.
Audio treatment unit comprises: the audio codec that links to each other with the protocol engine unit is used for audio stream data is encoded or decoded; The audio digital to analog converter that links to each other with audio codec, be used for audio codec coding or decoded digital signal are changed the simulating signal that can identify for people's ear, and the simulating signal after will changing is by audio interface, and for example boombox interface or headphone interface are transferred to outside audio frequency apparatus.
The USB processing unit comprises: the USB codec that links to each other with the protocol engine unit is used for usb data is encoded or decoded; The USB controller that links to each other with the USB codec is used for USB codec encodes or decoded data are carried out necessary control; The usb hub that links to each other with the USB controller carries out the rear external units that are transferred to correspondence by USB port of operation such as regenerative amplification for the data that the USB controller is transmitted.Wherein, external unit corresponding to USB port comprises keyboard, mouse and flash disk etc.Therefore, except the usb data that is transferred to flash disk, also comprise the button data that a part is transferred to keyboard or mouse in the data that USB port receives.
In order to realize the control to the frequency of the data stream transmitted in the above-mentioned I/O unit, zero terminating machine also comprises: the frequency control chip that links to each other respectively with each I/O unit, and in order to control the transmission frequency of video flowing or audio stream.
In addition, in order to finish the function of restarting of zero terminating machine, on the shell of zero terminating machine, also be provided with reset key, correspondingly, inside at zero terminating machine further is provided with the reset unit that links to each other with reset key, this reset unit also links to each other with the protocol engine unit, be used for producing hardware interrupt when the user presses reset key, and the hardware interrupts data transmission that this hardware interrupt is corresponding is processed to the protocol engine unit.
Can find out by above-mentioned description, the protocol engine unit is mainly used in being distributed to corresponding I/O unit after the network data processing of Ethernet processing unit that micro-control unit is transmitted, is transferred to corresponding output/output device by I/O unit.In addition, the protocol engine unit also be used for to receive input-output apparatus by the data of output/output unit transmission, and by micro-control unit with the network equipment of these data transmission to network port connection.And the protocol engine unit also is used for receiving the hardware interrupts data from reset unit.This shows, the type of the handled data in protocol engine unit comprises at least: video stream data, audio stream data, usb data, Ethernet data and hardware interrupts data.The protocol engine unit has been determined after the type of data, determine the processing protocol of respective type data, then, the protocol engine unit is processed dissimilar the data different priority and algorithm according to the processing protocol of determining, for example: for video stream data, adopt Duplicate Removal Algorithm to process, this Duplicate Removal Algorithm can be based on the Duplicate Removal Algorithm of Hash, can analyze video stream data, set up the multiple index table, can remove identical data, only in the different data of display buffer block reservation, so just reduce the data volume of video stream data, reduced the taking of the network bandwidth, improved the transfer efficiency of video stream data; For audio stream data, adopt the Huffman algorithm to process, this algorithm has effectively reduced the data volume of audio stream data, has reduced the taking of the network bandwidth, and has improved the transfer efficiency of audio stream data; For usb data, adopt the RBTree balanced algorithm to process, this algorithm generates a RBTree with usb data according to priority, and each node of tree is data, so that data can be retrieved rapidly, finally improved the transfer efficiency of usb data.For the hardware interrupts data, adopt the limit priority algorithm to process, receive the hardware interrupts data after, immediately these data are set to limit priority, can be processed at once, thus the response speed of whole system improved, make the man-machine interaction of user and machine experience lifting.For Ethernet data, can adopt algorithms most in use of the prior art to process, do not repeat them here.
Because the zero terminating machine in the present embodiment mainly is not shown by FPGA(Fig. 3) simulate the communication sequential of each hardware, therefore, each unit above-mentioned, for example Ethernet processing unit, micro-control unit, protocol engine unit, I/O unit and reset unit all will be connected on the FPGA, after each unit receives data, all to send to first FPGA, be undertaken sending to again follow-up unit after the necessary processing by FPGA and process.Particularly, FPGA realizes by hardware description language VerilogHDL, as long as write as required the hardware description language of providing standby specific function by the programming personnel, then zero terminal device is powered on, FPGA will initialization, in initialization procedure, the expressed communication protocol of hardware description language that possesses specific function will be poured among the FPGA, so that FPGA becomes the integrated circuit with proprietary feature.Particularly, can a burning software chip be set in zero terminating machine inside, be used for specially realizing the initialization procedure when zero terminating machine powers on.
Zero terminating machine in the present embodiment is easy to customization directly by communicating by letter between FPGA realization and network interface card and the various input-output apparatus.And, because communication process finished by hardware fully, needn't be through the layer by layer processing of the software in the operating system, so that the route of packet process greatly reduces, thereby so that communication process is more convenient, efficient, reliable.And, because the high integration of FPGA has also greatly reduced the hardware circuit on the PCB, so that the wiring difficulty of PCB also descends thereupon, so not only reduced power consumption, also reduced manufacturing cost, reduced error rate.And, owing to do not have operating system, so there is not the maintenance cost of firmware upgrade yet.
In addition, the zero terminating machine in the present embodiment is directly linked to each other with Ethernet processing unit and I/O unit by FPGA, so that zero terminating machine can directly extract log-on message by FPGA when starting, thereby saves start-up time.In addition, zero terminating machine is directly linked up by FPGA and other unit when data transmission, needn't go to process data by bus as traditional PC, so just improved work efficiency, make the design of whole circuit more integrated, oversimplify, cost is lower, and volume is less.
Although it will be understood by those skilled in the art that in the above-mentioned explanation, for ease of understanding, the step of method has been adopted the succession description, should be pointed out that for the order of above-mentioned steps and do not do strict restriction.
One of ordinary skill in the art will appreciate that all or part of step that realizes in above-described embodiment method is to come the relevant hardware of instruction to finish by program, this program can be stored in the computer read/write memory medium, as: ROM/RAM, magnetic disc, CD etc.
Will also be appreciated that the apparatus structure shown in accompanying drawing or the embodiment only is schematically, the presentation logic structure.The module that wherein shows as separating component may or may not be physically to separate, and the parts that show as module may be or may not be physical modules.
Obviously, those skilled in the art can carry out various changes and modification to the utility model and not break away from spirit and scope of the present utility model.Like this, if of the present utility model these are revised and modification belongs within the scope of the utility model claim and equivalent technologies thereof, then the utility model also is intended to comprise these changes and modification interior.
Claims (10)
1. zero terminating machine, it is characterized in that, comprise: housing, described outside is provided with network interface and input/output interface, described enclosure interior is provided with field programmable gate array and is connected respectively to the Ethernet processing unit of described field programmable gate array, micro-control unit, protocol engine unit and I/O unit, wherein
Described Ethernet processing unit also links to each other with described network interface, described micro-control unit respectively;
Described micro-control unit also links to each other with described protocol engine unit;
Described protocol engine unit also links to each other with described I/O unit;
Described I/O unit also links to each other with described input/output interface.
2. zero terminating machine according to claim 1, it is characterized in that, described input/output interface comprises: video interface, audio interface and USB interface, described I/O unit comprises: video processing unit, audio treatment unit and USB processing unit, described video processing unit, described audio treatment unit and described USB processing unit link to each other with described protocol engine unit respectively, described video processing unit also links to each other with described video interface, described audio treatment unit also links to each other with described audio interface, and described USB processing unit also links to each other with described USB interface.
3. zero terminating machine according to claim 2 is characterized in that, described video processing unit comprises: Video Codec and video dac, wherein,
Described Video Codec links to each other with described protocol engine unit, described video dac respectively;
Described video dac also links to each other with described video interface.
4. zero terminating machine according to claim 3 is characterized in that, described video processing unit further comprises: the video clock lock unit that links to each other with described Video Codec.
5. zero terminating machine according to claim 3 is characterized in that, described video processing unit further comprises:
The frame buffer cell, it links to each other with described protocol engine unit, described Video Codec respectively.
6. zero terminating machine according to claim 2 is characterized in that, described audio treatment unit comprises: audio codec and audio digital to analog converter, wherein,
Described audio codec links to each other with described protocol engine unit, described audio digital to analog converter respectively;
Described audio digital to analog converter also links to each other with described audio interface.
7. zero terminating machine according to claim 2 is characterized in that, described USB processing unit comprises: USB codec, USB controller and usb hub, wherein,
Described USB codec links to each other with described protocol engine unit, described USB controller respectively;
Described USB controller also links to each other with described usb hub;
Described usb hub also links to each other with described USB interface.
8. zero terminating machine according to claim 1, it is characterized in that, described outside further is provided with reset key, described enclosure interior further comprises: be connected to the reset unit of field programmable gate array, this reset unit links to each other with described protocol engine unit, described reset key respectively.
9. zero terminating machine according to claim 1 is characterized in that, described Ethernet processing unit further comprises: ethernet physical layer chip and ethernet medium MAC layer chip, wherein,
Described ethernet physical layer chip links to each other with described network interface, described ethernet medium MAC layer chip respectively;
Described ethernet medium MAC layer chip also links to each other with micro-control unit.
10. zero terminating machine according to claim 1 is characterized in that, described enclosure interior further comprises: be connected to the frequency control chip of field programmable gate array, described frequency control chip links to each other with described I/O unit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN 201220419104 CN202854647U (en) | 2012-08-22 | 2012-08-22 | Zero-terminal machine |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN 201220419104 CN202854647U (en) | 2012-08-22 | 2012-08-22 | Zero-terminal machine |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104679145A (en) * | 2015-02-15 | 2015-06-03 | 长芯盛（武汉）科技有限公司 | Terminal and system |
| CN104679144A (en) * | 2015-02-15 | 2015-06-03 | 长芯盛（武汉）科技有限公司 | Terminal all-in-one machine and local area network system |
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2012
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104679145A (en) * | 2015-02-15 | 2015-06-03 | 长芯盛（武汉）科技有限公司 | Terminal and system |
| CN104679144A (en) * | 2015-02-15 | 2015-06-03 | 长芯盛（武汉）科技有限公司 | Terminal all-in-one machine and local area network system |
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Granted publication date: 20130403 Termination date: 20200822 |