CN202839616U - IGBT capable of realizing local service lifetime control - Google Patents
IGBT capable of realizing local service lifetime control Download PDFInfo
- Publication number
- CN202839616U CN202839616U CN 201220427314 CN201220427314U CN202839616U CN 202839616 U CN202839616 U CN 202839616U CN 201220427314 CN201220427314 CN 201220427314 CN 201220427314 U CN201220427314 U CN 201220427314U CN 202839616 U CN202839616 U CN 202839616U
- Authority
- CN
- China
- Prior art keywords
- region
- span
- substrate
- life
- high recombination
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Landscapes
- Thyristors (AREA)
Abstract
The utility model provides an IGBT capable of realizing local service lifetime control. The IGBT comprises a collection zone, an upper part of which is provided with a buffer layer. An upper part of the buffer layer is provided with a drift zone. At least a low service lifetime high composite layer is disposed between the collection zone and the drift zone. A composite center is disposed in the low service lifetime high composite layer, and can be used to reduce the service lifetime of a carrier. A trap zone is disposed in the drift zone, and an emitter zone is disposed in the trap zone. An upper part of the drift zone is sequentially provided with a gate dielectric layer, a grid, an isolation layer, and an emitting electrode. A lower part of the collection zone is provided with a collector. In the utility model, at least one low service lifetime high composite layer is disposed between the collection zone and the drift zone, and the low service lifetime high composite layer can be composited with a great number of surplus carriers generated by the device during the switching-on state, the composite current can be improved, and the hole injection of the collection zone can be reduced, therefore the switching-off trail time can be reduced, the switching on/off time and energy consumption can be reduced, and the anti-latching ability of the device can be improved.
Description
Technical field
The utility model belongs to the essential electronic element field, relates to semiconductor device, particularly a kind of IGBT that realizes Localized Lifetime Control.
Background technology
IGBT(Insulated Gate Bipolar Transistor, insulated gate bipolar transistor) is a kind of compound voltage-controlled power semiconductor that is formed by BJT (double pole triode) and MOSFET (insulating gate type field effect tube), this device has the major advantage of power BJT and power MOSFET simultaneously: input impedance is high, the input driving power is little, conducting resistance is little, current capacity is large, and switching speed is fast etc.In these high voltagehigh frequency power electronic device epoch, IGBT becomes the main flow device of power electronics application undoubtedly.IGBT develops into and has roughly experienced now three generation techniques: PT-IGBT(punch IGBT), and the NPT-IGBT(non-punch through IGBT) and FS-IGBT(electric field termination type IGBT).Break-through and non-break-through refer under puncture voltage, and whether depletion layer break-through n-drift region (Withstand voltage layer).Although NPT-IGBT and FS-IGBT technology more and more are subject to going interior favor, yet for low pressure class IGBT(such as 600V IGBT), consider that NPT-IGBT and FS-IGBT require to process slice technique, the characteristics that technological requirement is high, generally adopt the PT-IGBT structure, thereby the reduction difficulty of processing reduces manufacturing cost.
PT-IGBT as shown in Figure 1, P+ type monocrystalline silicon is collector region 109, n-Withstand voltage layer 107 and n+ resilient coating 108 obtain by extension.Collector region 109 is as collector region (back of the body emitter region), has that thickness is large, the doping content high.During break-over of device, the transistorized hole of PNP emissivity is very high, and n-Withstand voltage layer 107 has accumulated a large amount of electron hole pairs, and conductivity modulation effect is remarkable.When device turn-offed, electronics was difficult to flow out from back side emitter junction, mainly disappear by base recombination, so switching time is long, and switching loss is large.Be to improve turn-off speed, the method that PT-IGBT adopts electron irradiation or heavy metal to mix produces a large amount of complex centres at n-Withstand voltage layer 107, significantly reduces carrier lifetime wherein, electronics, hole compound in the n-Withstand voltage layer 107 when accelerating IGBT and turn-offing.
Although this method can improve the turn-off speed of PT-IGBT, but the method for electron irradiation and heavy metal Doping Lifetime Control belongs to the control of overall situation life-span, be difficult to accomplish Localized Lifetime Control, as in PT-IGBT shown in Figure 1, be not need to do life-span control near front PN junction J1 and the J2, but electron irradiation and heavy metal doping all unavoidably can affect the carrier lifetime here.This overall situation life-span control has a significant defective to be exactly, the carrier lifetime in whole device tagma all can significantly increase along with the rising of temperature, when temperature raises, the carrier concentration of whole n-Withstand voltage layer 107 storages significantly increases, on-state voltage drop obviously reduces, and presents significant negative temperature coefficient, is unfavorable in parallel the use, and also obviously increase of turn-off power loss, affected the reliably and with long-term use of device.
The utility model content
The utility model is intended to solve at least the technical problem that exists in the prior art, has proposed to special innovation a kind of IGBT that realizes Localized Lifetime Control.
In order to realize above-mentioned purpose of the present utility model, the utility model provides a kind of IGBT that realizes Localized Lifetime Control, and it comprises: collector region, described collector region are heavy doping; Be formed with resilient coating on described collector region, described resilient coating is heavy doping, the conductivity type opposite of its conduction type and described collector region; Be formed with the drift region on described resilient coating, described drift region is light dope, the conductivity type opposite of its conduction type and described collector region; Between described collector region and described drift region, be formed with at least low life-span high recombination region of one deck, have the complex centre in the described low life-span high recombination region; Be formed with well region in described drift region, be formed with the emitter region in described well region, the conduction type of described well region is identical with the conduction type of described collector region, and described emitter region is heavy doping, the conductivity type opposite of its conduction type and described collector region; On described drift region, be formed with successively gate dielectric layer, grid, separator and emitter; Under described collector region, be formed with collector electrode; Described drift region, collector region and resilient coating are monocrystalline silicon.
The utility model is formed with at least low life-span high recombination region of one deck between collector region and drift region, the excessive charge carrier that should low life-span high recombination region produces can the multiple device on-state time, improve recombination current, reducing the collector region hole injects, turn-off hangover time thereby reduce, reach the purpose that reduces switching time, switching loss, and improve the anti-breech lock ability of device.
In a kind of preferred embodiment of the present utility model, low life-span high recombination region is formed between described collector region and the described resilient coating.
In another kind of preferred embodiment of the present utility model, low life-span high recombination region is formed between described drift region and the described resilient coating.
In another preferred embodiment of the present utility model, low life-span high recombination region comprises the first low life-span high recombination region and the second low life-span high recombination region, the described first low life-span high recombination region is formed between described drift region and the resilient coating, and the described second low life-span high recombination region is formed between described collector region and the resilient coating.
The utility model can form the low life-span high recombination region of one deck between collector region and drift region, also can form two-layer low life-span high recombination region, and the complex centre is introduced in the more accurate place of doing life-span control at needs of having realized, reduces the life-span of charge carrier.Other zones of device can not be subject to the impact of life-span control simultaneously, like this, although the local place that life-span control is arranged, when temperature raise, the life-span can increase, and the trend that reduces on-state voltage drop is arranged, but other do not introduce the position of life-span control, carrier lifetime can be along with temperature increase and significantly increases, and in this part, temperature plays a leading role on the impact of carrier mobility, along with temperature raises, mobility significantly reduces, and the trend that increases on-state voltage drop is arranged, and these two kinds of effects are cancelled out each other, the negative temperature coefficient of on-state voltage drop has weakened, improve the hot properties of device, be easy to use in parallel, the boost device long-term reliability.All have the complex centre in the two-layer low life-span high recombination region that the utility model forms, both reduce the better effects if of carrier lifetime in conjunction with doing life-span control.
Additional aspect of the present utility model and advantage in the following description part provide, and part will become obviously from the following description, or recognize by practice of the present utility model.
Description of drawings
Above-mentioned and/or additional aspect of the present utility model and advantage are from obviously and easily understanding becoming the description of embodiment in conjunction with following accompanying drawing, wherein:
Fig. 1 is the structural representation of N-shaped channel plane IGBT in the prior art.
Fig. 2 is the structural representation of the first preferred implementation of the utility model IGBT of realizing Localized Lifetime Control.
Fig. 3-Fig. 6 is the processing step schematic diagram of realizing the IGBT of Localized Lifetime Control shown in Fig. 2.
Fig. 7 is the structural representation of the second preferred implementation of the utility model IGBT of realizing Localized Lifetime Control.
Fig. 8-Figure 11 is the processing step schematic diagram of realizing the IGBT of Localized Lifetime Control shown in Fig. 7.
Figure 12 is the structural representation of the 3rd preferred implementation of the utility model IGBT of realizing Localized Lifetime Control.
Figure 13-Figure 17 is the processing step schematic diagram of realizing the IGBT of Localized Lifetime Control shown in Figure 12.
Reference numeral:
101 emitters; 102 separators; 103 grids; 104 gate dielectric layers; 105 emitter regions; 106 well regions; 107 drift regions; 108 resilient coatings; 109 collector regions; 110 collector electrodes;
201 emitters; 202 separators; 203 grids; 204 gate dielectric layers; 205 emitter regions; 206 well regions;
207 drift regions; 208 resilient coatings; 209 low life-span high recombination regions; 210 collector regions; 211 collector electrodes;
301 emitters; 302 separators; 303 grids; 304 gate dielectric layers; 305 emitter regions; 306 well regions;
307 drift regions; 308 resilient coatings; 309 low life-span high recombination regions; 310 collector regions; 311 collector electrodes;
401 emitters; 402 separators; 403 grids; 404 gate dielectric layers; 405 emitter regions; 406 well regions;
407 drift regions; 408 resilient coatings; 409 first low life-span high recombination regions; 410 second low life-span high recombination regions; 411 collector regions; 412 collector electrodes.
Embodiment
The below describes embodiment of the present utility model in detail, and the example of described embodiment is shown in the drawings, and wherein identical or similar label represents identical or similar element or the element with identical or similar functions from start to finish.Be exemplary below by the embodiment that is described with reference to the drawings, only be used for explaining the utility model, and can not be interpreted as restriction of the present utility model.
In description of the present utility model, it will be appreciated that, term " vertically ", " laterally ", " on ", D score, " front ", " afterwards ", " left side ", " right side ", " vertically ", " level ", " top ", " end " " interior ", orientation or the position relationship of indications such as " outward " are based on orientation shown in the drawings or position relationship, only be for convenience of description the utility model and simplified characterization, rather than device or the element of indication or hint indication must have specific orientation, with specific orientation structure and operation, therefore can not be interpreted as restriction of the present utility model.
In description of the present utility model, unless otherwise prescribed and limit, need to prove that term " installation ", " linking to each other ", " connection " should be done broad understanding, for example, can be mechanical connection or electrical connection, also can be the connection of two element internals, can be directly to link to each other, and also can indirectly link to each other by intermediary, for the ordinary skill in the art, can understand as the case may be the concrete meaning of above-mentioned term.
Fig. 2, Fig. 7, Figure 12 are the structural representations of three preferred implementations of the utility model IGBT of realizing Localized Lifetime Control, only are each regional size that provided of signal among the figure, and concrete size can design according to the requirement of device parameters.As seen from the figure, the IGBT of realization Localized Lifetime Control of the present utility model comprises collector region, and this collector region is heavy doping.Be formed with resilient coating on collector region, this resilient coating is heavy doping, the conductivity type opposite of its conduction type and collector region.Be formed with the drift region on resilient coating, this drift region is light dope, the conductivity type opposite of its conduction type and collector region.The material of collector region, resilient coating and drift region can be any material of preparation IGBT, specifically can be but is not limited to silicon, germanium, GaAs, in the present embodiment, preferably adopts monocrystalline silicon.The crystal orientation of collector region, resilient coating and drift region can be the same or different.In a kind of preferred implementation of the present utility model, the crystal orientation of drift region is 100 crystal orientation, and the crystal orientation of collector region is 110 crystal orientation, and the crystal orientation of resilient coating is 100 crystal orientation.In another preferred implementation of the utility model, the crystal orientation of drift region is 110 crystal orientation, and the crystal orientation of collector region is 110 crystal orientation, and the crystal orientation of resilient coating is 100 crystal orientation.
Between collector region and drift region, be formed with at least low life-span high recombination region of one deck, should low life-span high recombination region can for but be not limited to the defect layer that formed by epitaxial growth or bonding technology, its material is formed jointly by the bilevel material adjacent with this low life-span high recombination region, should have the complex centre in the low life-span high recombination region, this complex centre is defective, be specifically as follows but be not limited to the scission of link defective, lattice dislocation or shift defect, has compound charge carrier in it, can absorb charge carrier and reach electric equilibrium, thus the life-span of reducing charge carrier.In the first preferred implementation of the present utility model, should low life-span high recombination region be one deck, be formed between collector region and the resilient coating, in the present embodiment, low life-span high recombination region can be clear with collector region and buffering bed boundary, it is inner also can be deep into collector region and resilient coating, and the thickness of this low life-span high recombination region is 0.03um-0.5um, and the life-span of its inner excess carrier is 5ns-40ns.In the second preferred implementation of the present utility model, should low life-span high recombination region be one deck, be formed between drift region and the resilient coating, should hang down the life-span high recombination region can be clear with drift region and buffering bed boundary, it is inner also can be deep into drift region and resilient coating, the thickness that should hang down the life-span high recombination region is 0.03um-0.5um, and the life-span of its inner excess carrier is 5ns-40ns.In the 3rd preferred implementation of the present utility model, should comprise the first low life-span high recombination region and the second low life-span high recombination region by low life-span high recombination region, wherein, the first low life-span high recombination region is formed between drift region and the resilient coating, the second low life-span high recombination region is formed between collector region and the resilient coating, equally, this first low life-span high recombination region can be clear with drift region and buffering bed boundary, it is inner also can be deep into drift region and resilient coating, the thickness of this first low life-span high recombination region is 0.03um-0.5um, and the life-span of its inner excess carrier is 5ns-40ns.This second low life-span high recombination region can be clear with collector region and buffering bed boundary, and it is inner also can be deep into collector region and resilient coating, and the thickness of this second low life-span high recombination region is 0.03um-0.5um, and the life-span of its inner excess carrier is 5ns-40ns.
Also be formed with well region in the drift region, be formed with the emitter region in well region, the conduction type of well region is identical with the conduction type of collector region, and the emitter region is heavy doping, the conductivity type opposite of its conduction type and collector region.On the drift region, be formed with successively gate dielectric layer, grid and emitter.Under collector region, be formed with collector electrode.In the present embodiment, between grid and emitter, also be formed with separator, the material of this separator can for but be not limited to the oxide of silicon or the nitrogen oxide of silicon, be used for the insulation isolation between grid and the emitter.
The utility model is formed with at least low life-span high recombination region of one deck between collector region and drift region, the excessive charge carrier that should low life-span high recombination region produces can the device on-state time, improve recombination current, reducing the collector region hole injects, turn-off hangover time thereby reduce, reach the purpose that reduces switching time, switching loss, and improve the anti-breech lock ability of device.
The utility model can form the low life-span high recombination region of one deck between collector region and drift region, also can form two-layer low life-span high recombination region, has realized more accurately doing at needs the introducing complex centre, place of life-span control, the life-span of reducing charge carrier.Simultaneously, other zones of device can not be subject to the impact of life-span control, like this, although the local place that life-span control is arranged, when temperature raises, life-span can increase, the trend that reduces on-state voltage drop is arranged, but other do not introduce the position of life-span control, carrier lifetime can be along with temperature increases and significantly increases, in this part, temperature plays a leading role on the impact of carrier mobility, and along with temperature raises, mobility significantly reduces, the trend that increases on-state voltage drop is arranged, these two kinds of effects are cancelled out each other, and the negative temperature coefficient of the on-state voltage drop that weakened improves the hot properties of device, be easy to use in parallel, the boost device long-term reliability.All have the complex centre in the two-layer low life-span high recombination region that the utility model forms, both reduce the better effects if of carrier lifetime in conjunction with doing life-span control.
The utility model also provides the manufacture method of the IGBT that realizes Localized Lifetime Control, and in the first preferred implementation of the present utility model, such as Fig. 3-shown in Figure 6, the manufacture method of the IGBT of this realization Localized Lifetime Control comprises the steps:
S11: the first substrate and the second substrate are provided, this first substrate is light dope, the second substrate is heavy doping, and the conductivity type opposite of the conduction type of the first substrate and the second substrate, in the device of in the end finishing, this first substrate forms drift region 207, this second substrate forms collector region 210, the material of this first substrate and the second substrate can be any semi-conducting material of preparation IGBT, specifically can be but be not limited to silicon, germanium, GaAs, in the present embodiment, the preferred monocrystalline silicon that adopts, the crystal orientation of the first substrate and the second substrate can be the same or different, in the present embodiment, the crystal orientation of the first substrate is 100 crystal orientation, and the crystal orientation of the second substrate is 110 crystal orientation.
S12: form resilient coating 208 at the first substrate back, the utility model indication front refers to the upper surface of substrate, the back side refers to the lower surface of substrate, the resilient coating 208 that forms is heavy doping, its conduction type is identical with the conduction type of the first substrate, form resilient coating 208 method can for but be not limited to ion injection method or epitaxial growth method, in the present embodiment, the preferred ion injection method that adopts, such as Fig. 3-shown in Figure 4, specifically photoetching, in the situation that mask is sheltered, carry out Implantation, and diffusion, annealing, the crystal orientation of the resilient coating 208 of formation is all 100 crystal orientation mutually with the crystal orientation of the first substrate.When adopting epitaxial growth method to form resilient coating 208, the crystal orientation of resilient coating 208 can be identical with the crystal orientation of the first substrate, also can be different, and be specifically as follows and be grown to 110 crystal orientation.
S13: such as Fig. 5-shown in Figure 6, resilient coating 208 and the second substrate bonding with the first substrate, between resilient coating 208 and the second substrate, form low life-span high recombination region 209, should hang down life-span high recombination region 209 can be clear with collector region 210 and resilient coating 208 interfaces, also can be deep into collector region 210 and resilient coating 208 inside, should have the complex centre in the low life-span high recombination region 209, and can reduce the life-span of charge carrier.The concrete bonding method that adopts can close also for hydrophilic bond and can be hydrophobic bonding, the hydrophilic bonding of preferred employing, the temperature range of annealing in the bonding process is 400 ℃-1300 ℃, be applied to the first substrate during bonding and the second on-chip pressure limit is 15N-30N, the thickness of the low life-span high recombination region that forms is 0.03um-0.5um, and the life-span of its inner excess carrier is 5ns-40ns.
Present embodiment forms a high defect layer by adopting silicon chip to carry out bonding near bonded interface, this layer defects is introduced the complex centre makes charge carrier compound, can reduce carrier lifetime.
S14: the front at the first substrate forms well region 206, in well region 206 interior formation emitter regions 205, and the conductivity type opposite of the conduction type of this well region 206 and the first substrate, the emitter region is heavy doping, its conduction type is identical with the conduction type of the first substrate; On the first substrate, form successively gate dielectric layer 204, grid 203 and emitter 201; Under the second substrate, form collector electrode 211.Between grid 203 and emitter 201, also be formed with separator 202, the material of this separator 202 can for but be not limited to the oxide of silicon or the nitrogen oxide of silicon, be used for grid 203 and isolate with the insulation between the emitter 201.
In the utility model shown in Figure 7 the second preferred implementation, realize that the manufacture method of the IGBT of Localized Lifetime Control comprises the steps:
S21: the first substrate and the second substrate are provided, this first substrate is light dope, the second substrate is heavy doping, and the conductivity type opposite of the conduction type of the first substrate and the second substrate, in the device of in the end finishing, this first substrate forms drift region 307, this second substrate forms collector region 310, and the material of this first substrate and the second substrate can be any semi-conducting material of preparation IGBT, specifically can be but is not limited to silicon, germanium, GaAs, in the present embodiment, the preferred monocrystalline silicon that adopts, the crystal orientation of the first substrate and the second substrate can be the same or different, in the present embodiment, the first substrate is identical with the crystal orientation of the second substrate, is 110 crystal orientation.
S22: such as Fig. 8-shown in Figure 9, at the positive resilient coating 308 that forms of the second substrate, this resilient coating 308 is heavy doping, its conduction type is identical with the conduction type of the first substrate, form resilient coating 308 method can for but be not limited to ion injection method or epitaxial growth method, in the present embodiment, the preferred epitaxial growth method that adopts, specifically can be to adopt the method for chemical vapor deposition to form resilient coating in the positive extension of the second substrate, crystal orientation and second substrate of the resilient coating that forms can be the same or different, and are preferably 100 crystal orientation.
S23: such as Figure 10-shown in Figure 11, resilient coating 308 bondings with the first substrate and the second substrate, between the first substrate and resilient coating 308, form low life-span high recombination region 309, should hang down life-span high recombination region 309 can be clear with drift region 307 and resilient coating 308 interfaces, also can be deep into drift region 307 and resilient coating 308 inside, should have the complex centre in the low life-span high recombination region 309, and can reduce the life-span of charge carrier.The concrete bonding method that adopts can close also for hydrophilic bond and can be hydrophobic bonding, the hydrophilic bonding of preferred employing, the temperature range of annealing in the bonding process is 400 ℃-1300 ℃, be applied to the first substrate during bonding and the second on-chip pressure limit is 15N-30N, the thickness of the low life-span high recombination region that forms is 0.03um-0.5um, and the life-span of its inner excess carrier is 5ns-40ns.Present embodiment adopts the silicon chip of different crystal orientations to carry out bonding, and the defect layer defective of formation is more, finer and close, and the charge carrier composite effect is more obvious.
S24: the front at the first substrate forms well region 306, in well region 306 interior formation emitter regions 305, the conductivity type opposite of the conduction type of well region 306 and the first substrate, the emitter region is heavy doping, its conduction type is identical with the conduction type of the first substrate, on the first substrate, form successively gate dielectric layer 304, grid 303 and emitter 301, under the second substrate, form collector electrode 311.In the present embodiment, between grid 303 and emitter 301, also be formed with separator 302, the material of this separator 302 can for but be not limited to the oxide of silicon or the nitrogen oxide of silicon, be used for grid 303 and isolate with the insulation between the emitter 301.
In the utility model shown in Figure 12 the 3rd preferred implementation, realize that the manufacture method of the IGBT of Localized Lifetime Control comprises the steps:
S31: the first substrate is provided, the second substrate and the 3rd substrate, wherein, the first substrate is light dope, the second substrate is heavy doping, the conduction type of the second substrate is identical with the conduction type of the first substrate, the 3rd substrate is heavy doping, the conductivity type opposite of the conduction type of the 3rd substrate and the first substrate, in the device of in the end finishing, this first substrate forms drift region 407, this second substrate forms resilient coating 408, the three substrates and forms collector region 411, this first substrate, the material of the second substrate and the 3rd substrate can be any semi-conducting material of preparation IGBT, specifically can be but be not limited to silicon, germanium, GaAs, in the present embodiment, preferably adopt monocrystalline silicon, the first substrate, the crystal orientation of the second substrate and the 3rd substrate can be the same or different, in the present embodiment, the crystal orientation of the first substrate is 110 crystal orientation, and the crystal orientation of the second substrate is 100 crystal orientation, and the crystal orientation of the 3rd substrate is 110 crystal orientation.
S32: such as Figure 13-shown in Figure 14, one side and the 3rd substrate bonding with the second substrate, between the second substrate and the 3rd substrate, form the second low life-span high recombination region 410, this second low life-span high recombination region 410 can be clear with resilient coating 408 and collector region 411 interfaces, also can be deep into resilient coating 408 and collector region 411 inside, have the complex centre in this second low life-span high recombination region 410, can reduce the life-span of charge carrier.The concrete bonding method that adopts can close also for hydrophilic bond and can be hydrophobic bonding, the hydrophilic bonding of preferred employing, the temperature range of annealing in the bonding process is 400 ℃-1300 ℃, be applied to the second substrate during bonding and the 3rd on-chip pressure limit is 15N-30N, the thickness of the second low life-span high recombination region that forms is 0.03um-0.5um, and the life-span of its inner excess carrier is 5ns-40ns.
S33: such as Figure 16-shown in Figure 17, another side and the first substrate bonding with the second substrate, between the second substrate and the first substrate, form the first low life-span high recombination region 409, this first low life-span high recombination region 409 can be clear with the interface of drift region 407 and resilient coating 408, also can be deep into drift region 407 and resilient coating 408 inside, have the complex centre in this first low life-span high recombination region 409, can reduce the life-span of charge carrier.The concrete bonding method that adopts can close also for hydrophilic bond and can be hydrophobic bonding, the hydrophilic bonding of preferred employing, the temperature range of annealing in the bonding process is 400 ℃-1300 ℃, be applied to the first substrate during bonding and the second on-chip pressure limit is 15N-30N, the thickness of the first low life-span high recombination region that forms is 0.03um-0.5um, and the life-span of its inner excess carrier is 5ns-40ns.
In a kind of preferred implementation of the utility model, as shown in figure 15, between step S32 and step S33, also have following steps: attenuate the second substrate, thining method can be any substrate thinning technique, specifically can be but be not limited to grinding, chemico-mechanical polishing, dry etching, electrochemical corrosion or wet etching method, the preferred Ginding process that adopts, the thickness of the second substrate is 5um-50um behind the attenuate.
In the other preferred implementation of the utility model, can be first with the first substrate and the second substrate bonding, then with the second substrate and the 3rd substrate bonding, in the present embodiment, also can be behind the first substrate and the second substrate bonding two substrates of attenuate, concrete steps are:
S32: with the first substrate and the second substrate bonding, between the first substrate and the second substrate, form the first low life-span high recombination region 409, this first low life-span high recombination region 409 can be clear with the interface of resilient coating 408 with drift region 407, also can be deep into drift region 407 and resilient coating 408 inside, have the complex centre in this first low life-span high recombination region 409, can reduce the life-span of charge carrier.The concrete bonding method that adopts can close also for hydrophilic bond and can be hydrophobic bonding, the hydrophilic bonding of preferred employing, the temperature range of annealing in the bonding process is 400 ℃-1300 ℃, be applied to the first substrate during bonding and the second on-chip pressure limit is 15N-30N, the thickness of the first low life-span high recombination region that forms is 0.03um-0.5um, and the life-span of its inner excess carrier is 5ns-40ns.
Attenuate the second substrate, thining method can be any substrate thinning technique, specifically can be but be not limited to grinding, chemico-mechanical polishing, dry etching, electrochemical corrosion or wet etching method that preferably adopt Ginding process, the thickness of the second substrate is behind the attenuate: 5um-50um;
S33: with the second substrate and the 3rd substrate bonding, between the 3rd substrate and the 3rd substrate, form the second low life-span high recombination region 410, this second low life-span high recombination region 410 can be clear with resilient coating 408 and collector region 411 interfaces, also can be deep into resilient coating 408 and collector region 411 inside, have the complex centre in this second low life-span high recombination region 410, can reduce the life-span of charge carrier.The concrete bonding method that adopts can close also for hydrophilic bond and can be hydrophobic bonding, the hydrophilic bonding of preferred employing, the temperature range of annealing in the bonding process is 400 ℃-1300 ℃, be applied to the second substrate during bonding and the 3rd on-chip pressure limit is 15N-30N, the thickness of the second low life-span high recombination region that forms is 0.03um-0.5um, and the life-span of its inner excess carrier is 5ns-40ns.
S34: the front at the first substrate forms well region 406, in well region 406 interior formation emitter regions 405, the conductivity type opposite of the conduction type of well region 406 and the first substrate, the emitter region is heavy doping, its conduction type is identical with the conduction type of the first substrate, on the first substrate, form successively gate dielectric layer 404, grid 403 and emitter 401, under the second substrate, form collector electrode 412.In the present embodiment, between grid 403 and emitter 401, also be formed with separator 402, the material of this separator 402 can for but be not limited to the oxide of silicon or the nitrogen oxide of silicon, be used for grid 403 and isolate with the insulation between the emitter 401.
Realize describing the manufacture method of the IGBT of Localized Lifetime Control as p-type as example take last formation collector region according to the utility model, for the N-shaped collector region and take its device for the basis, get final product according to opposite conduction type doping.Describe as an example of the 3rd preferred implementation of the present utility model example, at first, adopt hydrophilic method bonding to form the second low life-span high recombination region heavily doped N-shaped the second substrate and heavily doped p-type the 3rd substrate, the temperature of annealing in the bonding process is 1000 ℃, be applied to the second substrate during bonding and the 3rd on-chip pressure is 20N, the thickness of the second low life-span high recombination region that forms is 0.1um, and the life-span of its inner excess carrier is 5ns-40ns.Then, adopt process attenuate the second substrate to 10 um that grinds, again, adopt hydrophilic method bonding to form the first low life-span high recombination region lightly doped N-shaped the first substrate and the second substrate, the temperature of annealing in the bonding process is 900 ℃, be applied to the first substrate during bonding and the second on-chip pressure is 22N, the thickness of the first low life-span high recombination region of formation is 0.15um, and the life-span of its inner excess carrier is 5ns-40ns.At last, form the p-type well region in the front of the first substrate, in the p-type well region, form heavily doped N-shaped emitter region, on the first substrate, form successively gate dielectric layer, grid, separator and emitter, under the 3rd substrate, form collector electrode.
The utility model can form the low life-span high recombination region of one deck between collector region and drift region, also can form two-layer low life-span high recombination region, and the complex centre is introduced in the more accurate place of doing life-span control at needs of having realized, reduces the life-span of charge carrier.Other zones of device can not be subject to the impact of life-span control simultaneously, like this, although the local place that life-span control is arranged, when temperature raise, the life-span can increase, and the trend that reduces on-state voltage drop is arranged, but other do not introduce the position of life-span control, carrier lifetime can be along with temperature increase and significantly increases, and in this part, temperature plays a leading role on the impact of carrier mobility, along with temperature raises, mobility significantly reduces, and the trend that increases on-state voltage drop is arranged, and these two kinds of effects are cancelled out each other, the negative temperature coefficient of on-state voltage drop has weakened, improve the hot properties of device, be easy to use in parallel, the boost device long-term reliability.All have the complex centre in the two-layer low life-span high recombination region that the utility model forms, both reduce the better effects if of carrier lifetime in conjunction with doing life-span control.
In the description of this specification, the description of reference term " embodiment ", " some embodiment ", " example ", " concrete example " or " some examples " etc. means to be contained at least one embodiment of the present utility model or the example in conjunction with specific features, structure, material or the characteristics of this embodiment or example description.In this manual, the schematic statement of above-mentioned term not necessarily referred to identical embodiment or example.And the specific features of description, structure, material or characteristics can be with suitable mode combinations in any one or more embodiment or example.
Although illustrated and described embodiment of the present utility model, those having ordinary skill in the art will appreciate that: can carry out multiple variation, modification, replacement and modification to these embodiment in the situation that does not break away from principle of the present utility model and aim, scope of the present utility model is limited by claim and equivalent thereof.
Claims (6)
1. an IGBT who realizes Localized Lifetime Control is characterized in that, comprising:
Collector region, described collector region are heavy doping;
Be formed with resilient coating on described collector region, described resilient coating is heavy doping, the conductivity type opposite of its conduction type and described collector region;
Be formed with the drift region on described resilient coating, described drift region is light dope, the conductivity type opposite of its conduction type and described collector region;
Between described collector region and described drift region, be formed with at least low life-span high recombination region of one deck, have the complex centre in the described low life-span high recombination region;
Be formed with well region in described drift region, be formed with the emitter region in described well region, the conduction type of described well region is identical with the conduction type of described collector region, and described emitter region is heavy doping, the conductivity type opposite of its conduction type and described collector region;
On described drift region, be formed with successively gate dielectric layer, grid, separator and emitter;
Under described collector region, be formed with collector electrode;
Described drift region, collector region and resilient coating are monocrystalline silicon.
2. the IGBT of realization Localized Lifetime Control as claimed in claim 1 is characterized in that, described low life-span high recombination region is formed between described collector region and the described resilient coating.
3. the IGBT of realization Localized Lifetime Control as claimed in claim 1 is characterized in that, described low life-span high recombination region is formed between described drift region and the described resilient coating.
4. realize as claimed in claim 2 or claim 3 the IGBT of Localized Lifetime Control, it is characterized in that the thickness of described low life-span high recombination region is 0.03um-0.5um, the life-span of its inner excess carrier is 5ns-40ns.
5. the IGBT of realization Localized Lifetime Control as claimed in claim 1, it is characterized in that, described low life-span high recombination region comprises the first low life-span high recombination region and the second low life-span high recombination region, the described first low life-span high recombination region is formed between described drift region and the resilient coating, and the described second low life-span high recombination region is formed between described collector region and the resilient coating.
6. the IGBT of realization Localized Lifetime Control as claimed in claim 5 is characterized in that, the thickness of the described first low life-span high recombination region is 0.03um-0.5um, and the life-span of its inner excess carrier is 5ns-40ns; The thickness of the described second low life-span high recombination region is 0.03um-0.5um, and the life-span of its inner excess carrier is 5ns-40ns.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220427314 CN202839616U (en) | 2012-08-27 | 2012-08-27 | IGBT capable of realizing local service lifetime control |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220427314 CN202839616U (en) | 2012-08-27 | 2012-08-27 | IGBT capable of realizing local service lifetime control |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202839616U true CN202839616U (en) | 2013-03-27 |
Family
ID=47951255
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201220427314 Expired - Lifetime CN202839616U (en) | 2012-08-27 | 2012-08-27 | IGBT capable of realizing local service lifetime control |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN202839616U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103633129A (en) * | 2012-08-27 | 2014-03-12 | 比亚迪股份有限公司 | IGBT capable of realizing localized service lifetime controlling and manufacturing method thereof |
| CN104425578A (en) * | 2013-08-23 | 2015-03-18 | 无锡华润上华半导体有限公司 | Reverse conducting insulated gate bipolar transistor |
-
2012
- 2012-08-27 CN CN 201220427314 patent/CN202839616U/en not_active Expired - Lifetime
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103633129A (en) * | 2012-08-27 | 2014-03-12 | 比亚迪股份有限公司 | IGBT capable of realizing localized service lifetime controlling and manufacturing method thereof |
| CN104425578A (en) * | 2013-08-23 | 2015-03-18 | 无锡华润上华半导体有限公司 | Reverse conducting insulated gate bipolar transistor |
| CN104425578B (en) * | 2013-08-23 | 2019-03-22 | 无锡华润上华科技有限公司 | Reverse-conducting insulated gate bipolar transistor npn npn |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103413824B (en) | A kind of RC-LIGBT device and preparation method thereof | |
| CN103383958B (en) | A kind of RC-IGBT device and making method thereof | |
| CN109192772B (en) | Groove-type insulated gate bipolar transistor and preparation method thereof | |
| CN105932042A (en) | Double-split groove gate charge storage type IGBT and manufacturing method thereof | |
| CN107731899B (en) | Trench gate charge storage type IGBT device with clamping structure and manufacturing method thereof | |
| CN103794647A (en) | Bidirectional IGBT device and manufacturing method thereof | |
| CN107170816B (en) | A kind of landscape insulation bar double-pole-type transistor | |
| CN105789290A (en) | Trench gate insulated gate bipolar transistor (IGBT) device and manufacturing method thereof | |
| CN105932055A (en) | Plane gate IGBT and manufacturing method therefor | |
| CN115241286B (en) | SiC semi-super junction type gate bipolar transistor device and manufacturing method thereof | |
| CN101752415A (en) | Insulated gate bipolar transistor and method for producing same | |
| CN112687746A (en) | Silicon carbide planar MOSFET device and preparation method thereof | |
| CN102254942A (en) | Novel Insulated Gate Bipolar Transistor (IGBT) with stepped gate structure and manufacturing method thereof | |
| CN105789291A (en) | Double split trench gate charge storage type insulated gate bipolar transistor (IGBT) and manufacturing method thereof | |
| CN104103682A (en) | IGBT with novel buffer layer structure and manufacturing method thereof | |
| CN109065608B (en) | Transverse bipolar power semiconductor device and preparation method thereof | |
| CN102945858A (en) | IGBT (Insulated Gate Bipolar Transistor) device with field stop buffer layer and manufacture method of IGBT device | |
| CN105140121B (en) | Trench gate IGBT preparation methods with carrier accumulation layer | |
| CN202839616U (en) | IGBT capable of realizing local service lifetime control | |
| CN114005877A (en) | Ultrathin super-junction IGBT device and preparation method | |
| CN103633129A (en) | IGBT capable of realizing localized service lifetime controlling and manufacturing method thereof | |
| CN116504817B (en) | RC-IGBT structure with high switching speed and low loss and preparation method thereof | |
| CN110504314B (en) | Groove-type insulated gate bipolar transistor and preparation method thereof | |
| CN110504313B (en) | Transverse groove type insulated gate bipolar transistor and preparation method thereof | |
| CN110416295B (en) | Groove-type insulated gate bipolar transistor and preparation method thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20191211 Address after: 518119 1 Yanan Road, Kwai Chung street, Dapeng New District, Shenzhen, Guangdong Patentee after: SHENZHEN BYD MICROELECTRONICS Co.,Ltd. Address before: 315800 No. 155, West Mount Lu Road, Ningbo Free Trade Zone, Ningbo, Zhejiang Patentee before: NINGBO BYD SEMICONDUCTOR Co.,Ltd. |
|
| CP01 | Change in the name or title of a patent holder | ||
| CP01 | Change in the name or title of a patent holder |
Address after: 518119 No.1 Yan'an Road, Kuiyong street, Dapeng New District, Shenzhen City, Guangdong Province Patentee after: BYD Semiconductor Co.,Ltd. Address before: 518119 No.1 Yan'an Road, Kuiyong street, Dapeng New District, Shenzhen City, Guangdong Province Patentee before: BYD Semiconductor Co.,Ltd. Address after: 518119 No.1 Yan'an Road, Kuiyong street, Dapeng New District, Shenzhen City, Guangdong Province Patentee after: BYD Semiconductor Co.,Ltd. Address before: 518119 No.1 Yan'an Road, Kuiyong street, Dapeng New District, Shenzhen City, Guangdong Province Patentee before: SHENZHEN BYD MICROELECTRONICS Co.,Ltd. |
|
| CX01 | Expiry of patent term | ||
| CX01 | Expiry of patent term |
Granted publication date: 20130327 |