CN202758283U - Multi-interface flushbonading mainboard - Google Patents
Multi-interface flushbonading mainboard Download PDFInfo
- Publication number
- CN202758283U CN202758283U CN201220417977.XU CN201220417977U CN202758283U CN 202758283 U CN202758283 U CN 202758283U CN 201220417977 U CN201220417977 U CN 201220417977U CN 202758283 U CN202758283 U CN 202758283U
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- interface
- processing module
- module
- lvds
- central processing
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Abstract
The utility model discloses a multi-interface flushbonading mainboard which comprises a centre processing module. The centre processing module is connected with a controller area network (CAN) controller, a red, green, blue (RGB) transition low voltage differential signaling (LVDS) chip, a digital video digital analog converter, a physical layer (PHY) module and a field programmable gata array (FPGA) chip. The CAN controller is provided with at least two CAN interfaces which are connected with the external world. The RGB transition LVDS chip is provided with a LVDS interface which is connected with the external world. The digital video digital analog converter is provided with a video graphics array (VGA) interface which is connected with the external world. The PHY module is provided with an Ethernet interface. The FPGA is provided with an industrial standard architecture (ISA) slot. The multi-interface flushbonading mainboard has the advantages of providing abundant interfaces which comprise a peripheral component interconnect (PCI) interface, a VGA interface and a LVDS interface and the like and being capable of being applied to extensive field.
Description
Technical field
The utility model relates to a kind of computer motherboard, particularly relates to a kind of many interfaces embedded main board.
Background technology
Current, single-chip computer control system has been widely used in the every field such as family, industry, but these embedded systems great majority or use separately, with extraneous communication main or by serial ports or other such as 485, the special purpose interface such as CAN realizes.Development along with computer technology and network technology, network communication is increasingly general, the advantage of network communication is to utilize ripe procotol, can realize that teledata is mutual fast, so it is more and more important that equipment and the external world carry out communication by network, general interface on the existing interface chip is too single all by interface chip realization equipment and the connection of being connected, and application is very narrow.
The utility model content
The purpose of this utility model is to overcome the shortcoming and defect of above-mentioned prior art, and a kind of many interfaces embedded main board is provided, and solves the very narrow drawback of prior art application.
The purpose of this utility model is achieved through the following technical solutions: many interfaces embedded main board, comprise a central processing module, be connected with the CAN controller on the described central processing module, RGB turns the LVDS chip, the digital video digital to analog converter, PHY module and a fpga chip, be provided with at least two CAN interfaces that are connected with the external world on the described CAN controller, described RGB turns provides the LVDS interface that is connected with the external world on the LVDS chip, provide the VGA that is connected with external world interface on the described digital video digital to analog converter, be provided with Ethernet interface on the described PHY module, be provided with the ISA slot on the described FPGA.
Also be provided with the RS232 debug serial port on the described central processing module.
Also be connected with a real time clock module on the described central processing module.
Be connected with the state indicating module on the described central processing module.
Described state indicating module is LED light.
Also be provided with a PCI bridge on the described central processing module, provide at least three pci interfaces on the described PCI bridge.
The beneficial effects of the utility model are: provide abundant interface, include pci interface, VGA interface, LVDS interface etc., so that this device can be applied to widely field.
Description of drawings
Fig. 1 is structured flowchart of the present utility model.
Embodiment
The utility model is described in further detail below in conjunction with embodiment, but structure of the present utility model is not limited only to following examples:
[embodiment]
As shown in Figure 1, many interfaces embedded main board, comprise a central processing module, be connected with the CAN controller on the described central processing module, RGB turns the LVDS chip, the digital video digital to analog converter, PHY module and a fpga chip, be provided with at least two CAN interfaces that are connected with the external world on the described CAN controller, described RGB turns provides the LVDS interface that is connected with the external world on the LVDS chip, provide the VGA that is connected with external world interface on the described digital video digital to analog converter, be provided with Ethernet interface on the described PHY module, be provided with the ISA slot on the described FPGA, the video card of can pegging graft, sound card, the expansion cards such as network interface card and so-called Multi function interface clip.
Also be provided with the RS232 debug serial port on the described central processing module.
Also be connected with a real time clock module on the described central processing module.
Be connected with the state indicating module on the described central processing module, described state indicating module is LED light, is used to indicate the working condition of whole device.
Also be provided with a PCI bridge on the described central processing module, provide three pci interfaces on the described PCI bridge.
In the present embodiment, central processing module adopts the MPC5121e chip, this chip designs with PC/104 and PC/104+ standard size, complete compatible PC/104 V2.5 and PC/104 PLUS V2.3 standard have the characteristics such as low-power consumption, high-performance, band 2D/3D acceleration display engine and multimedia audio accelerating engine; The CAN controller adopts the PCA82C250 chip, and the CAN interface that it provides is used for external CAN equipment; It is the chip of DS90C387 that RGB turns LVDS chip employing model, is used for externally connected with display screen; It is the TL5632C chip that the digital video digital to analog converter adopts model, is used for the digital of digital video data that central processing module transmits is converted into analog video data.
Claims (6)
1. many interfaces embedded main board, it is characterized in that, comprise a central processing module, be connected with the CAN controller on the described central processing module, RGB turns the LVDS chip, the digital video digital to analog converter, PHY module and a fpga chip, be provided with at least two CAN interfaces that are connected with the external world on the described CAN controller, described RGB turns provides the LVDS interface that is connected with the external world on the LVDS chip, provide the VGA that is connected with external world interface on the described digital video digital to analog converter, be provided with Ethernet interface on the described PHY module, be provided with the ISA slot on the described FPGA.
2. many interfaces embedded main board according to claim 1 is characterized in that, also is provided with the RS232 debug serial port on the described central processing module.
3. many interfaces embedded main board according to claim 1 is characterized in that, also is connected with a real time clock module on the described central processing module.
4. arbitrary described many interfaces embedded main board is characterized in that according to claim 1～3, is connected with the state indicating module on the described central processing module.
5. many interfaces embedded main board according to claim 4 is characterized in that, described state indicating module is LED light.
6. many interfaces embedded main board according to claim 1 is characterized in that, also is provided with a PCI bridge on the described central processing module, provides at least three pci interfaces on the described PCI bridge.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201220417977.XU CN202758283U (en) | 2012-08-22 | 2012-08-22 | Multi-interface flushbonading mainboard |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201220417977.XU CN202758283U (en) | 2012-08-22 | 2012-08-22 | Multi-interface flushbonading mainboard |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202758283U true CN202758283U (en) | 2013-02-27 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201220417977.XU Expired - Lifetime CN202758283U (en) | 2012-08-22 | 2012-08-22 | Multi-interface flushbonading mainboard |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN202758283U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105099572A (en) * | 2014-05-22 | 2015-11-25 | 中国科学院声学研究所 | Control type communication system in sonar signal processor |
-
2012
- 2012-08-22 CN CN201220417977.XU patent/CN202758283U/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105099572A (en) * | 2014-05-22 | 2015-11-25 | 中国科学院声学研究所 | Control type communication system in sonar signal processor |
| CN105099572B (en) * | 2014-05-22 | 2018-11-13 | 中国科学院声学研究所 | Control type communication system in a kind of signal processing machine |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20170811 Address after: West high tech Zone Fucheng Road in Chengdu city of Sichuan province 610041 No. 399 Tianfu New Valley No. 8 Building 2 unit 805 room Patentee after: CHENGDU AISDUN SCIENCE & TECHNOLOGY CO.,LTD. Address before: 8, building 16, block A, Pioneer Road, 610000 hi tech Development Zone, Sichuan, Chengdu Patentee before: CHENGDU ISTONE MEASUREMENT CONTROL TECHNOLOGY Co.,Ltd. |
|
| CX01 | Expiry of patent term | ||
| CX01 | Expiry of patent term |
Granted publication date: 20130227 |