CN202976787U - Multi-format signal conversion device and display equipment - Google Patents
Multi-format signal conversion device and display equipment Download PDFInfo
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- CN202976787U CN202976787U CN 201220593245 CN201220593245U CN202976787U CN 202976787 U CN202976787 U CN 202976787U CN 201220593245 CN201220593245 CN 201220593245 CN 201220593245 U CN201220593245 U CN 201220593245U CN 202976787 U CN202976787 U CN 202976787U
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Abstract
The present utility model discloses a multi-format signal conversion device. The multi-format signal conversion device comprises a signal input module for collecting external input signals; a signal processing module connected with the signal input module and used for realizing video signal format conversion processing of the external input signals; and a signal output module connected with the signal processing module and transmitted to the signals subjected to the video signal format conversion processing to a signal transmission medium. The device supports multi-format signal input, and is compatible to simulate VGA signals, CVBS signals, YPbPr signals, S-Video signals, digital DVI signals and digital HDMI signals; the signal input compatibility is excellent; and great convenience can be brought for use of users.
Description
Technical field
The utility model relates to video export technique field, relates in particular to a kind of multi-format chromacoder and display device.
Background technology
At present, DVI(Digital Visual Interface, digital visual interface) interface mainly is divided into two kinds: a kind of is DVI-Digital, and DVI-Digital can only receive digital DVI signal, can not receive any simulating signal; Another kind is DVI-Integrated, and DVI-Integrated can receive digital DVI signal and simulation VGA(Video Graphics Array, shows the drawing array) signal.Existing like this DVI interface can only compatible with digital DVI signal and simulation VGA signal, it is compatible relatively poor that its signal is inputted, in the miscellaneous occasion of signal source, need to gather with different signaling interfaces different signal sources, thereby cause the variation of signal acquiring system, bring great inconvenience also for user's use.
The utility model content
Fundamental purpose of the present utility model is to propose a kind of multi-format chromacoder and display device, is intended to realize the input of multi-format signal, to improve compatibility, reduces use cost.
In order to achieve the above object, the utility model proposes a kind of multi-format chromacoder, this multi-format chromacoder comprises:
Be used for gathering the signal input module of external input signal;
Be connected, be used for described external input signal is carried out the signal processing module of video signal format conversion process with this signal input module; And
Be connected with this signal processing module, be used for the signal after the video signal format conversion process is transferred to signal output module on signal transmission medium.
Preferably, described signal input module comprises:
Be used for gathering the input end of analog signal of the analog video signal that comprises simulation VGA signal, CVBS signal, YPbPr signal and S-Video signal; And
Be used for gathering the digital signal input end of the digital video signal that comprises digital DVI signal and digital HDMI signal.
Preferably, described signal processing module comprises:
Be used for receiving the DVI-Integrated of described analog video signal or described digital video signal;
Be connected, be used for simulating signal chip matrix that described analog video signal is distributed with this DVI-Integrated; And
Be connected, be used for described analog video signal and described digital video signal are carried out the vision signal process chip of video signal format conversion process with this simulating signal chip matrix.
Preferably, described DVI-Integrated comprises the analog signal channel corresponding with input end of analog signal and the digital signal channel corresponding with digital signal input end; Described analog signal channel is connected with corresponding input pin on described simulating signal chip matrix.
Preferably, described vision signal process chip comprises the simulating signal input port of containing VGA input port, CVBS input port, YPbPr input port and S-Video input port, and the digital signal input port of containing the DVI/HDMI input port;
Described simulating signal input port is connected with corresponding output pin on described simulating signal chip matrix;
Described digital signal input port is connected with described digital signal channel.
Preferably, it is characterized in that, described vision signal process chip comprises that also one is used for controlling described simulating signal chip matrix described analog video signal is assigned to MCU on simulating signal input port corresponding to this vision signal process chip, and the control end of described MCU is connected with total line traffic control pin of described simulating signal chip matrix.
The utility model further also proposes a kind of display device, and this display device comprises the multi-format chromacoder, and this multi-format chromacoder comprises:
Be used for gathering the signal input module of external input signal;
Be connected, be used for described external input signal is carried out the signal processing module of video signal format conversion process with this signal input module; And
Be connected with this signal processing module, be used for the signal after the video signal format conversion process is transferred to signal output module on signal transmission medium.
the utility model increases the simulating signal chip matrix between standard DVI-Integrated and vision signal process chip, by the simulating signal chip matrix, the analog signal channel of standard DVI-Integrated is distributed into more analog signal channel, correspondence is connected on the simulating signal input port of vision signal process chip, the direct correspondence of the digital signal channel of DVI-Integrated is connected on the digital signal input port of vision signal process chip, after the vision signal process chip recognizes effective analog video signal or digital video signal, this analog video signal or digital video signal are carried out the video signal format conversion process, to be converted to the required signal type of user from the dissimilar signal of outside input, for the user.The utility model multi-format chromacoder has been expanded the application of existing standard DVI-Integrated, support the input of multi-format signal, can compatiblely simulate VGA signal, CVBS signal, YPbPr signal, S-Video signal, digital DVI signal and digital HDMI signal, it is compatible splendid that its signal is inputted, and brings great convenience also for user's use.
Description of drawings
Fig. 1 is the structural representation of the utility model multi-format chromacoder preferred embodiment;
Fig. 2 is the structural representation of simulating signal chip matrix preferred embodiment in the utility model multi-format chromacoder.
The realization of the purpose of this utility model, functional characteristics and advantage in connection with embodiment, and is described further with reference to accompanying drawing.
Embodiment
Further illustrate the technical solution of the utility model below in conjunction with Figure of description and specific embodiment.Should be appreciated that specific embodiment described herein only in order to explaining the utility model, and be not used in restriction the utility model.
The utility model proposes a kind of multi-format chromacoder.
See figures.1.and.2, Fig. 1 is the structural representation of the utility model multi-format chromacoder preferred embodiment; Fig. 2 is the structural representation of simulating signal chip matrix 220 preferred embodiments in the utility model multi-format chromacoder.
In the present embodiment, the multi-format chromacoder comprises signal input module 100, signal processing module 200 and signal output module 300.
Wherein, signal input module 100 is used for gathering external input signal, signal processing module 200 is connected with signal input module 100, signal input module 100 is transferred to signal processing module 200 with external input signal, 200 pairs of external input signals of signal processing module carry out the video signal format conversion process, signal output module 300 is connected with signal processing module 200, after signal processing module 200 is converted to the required signal type of user with external input signal, transfer signals to through signal output module 300 on user's signal transmission medium, for the user.
In above-described embodiment, signal input module 100 comprises input end of analog signal 110 and digital signal input end 120, the external input signal that collects from input end of analog signal 110 is analog video signal, and this analog video signal comprises simulation VGA signal, CVBS signal, YPbPr signal and S-Video signal; From digital signal input end 120 to external input signal be digital video signal, this digital video signal comprises digital DVI signal and digital HDMI signal.
particularly, DVI-Integrated 210 comprises analog signal channel 211 and digital signal channel 212, analog signal channel 211 is corresponding with input end of analog signal 110, and simulation VGA signal, CVBS signal, YPbPr signal or the S-Video signal inputted from the outside transfer on analog signal channel 211 through input end of analog signal 110, digital signal channel 212 is corresponding with digital signal input end 120, and digital DVI signal or the digital HDMI signal inputted from the outside transfer on digital signal channel 212 through digital signal input end 120, in analog signal channel 211 3 is connected with corresponding input pin on simulating signal chip matrix 220 respectively with signalling channel, as depicted in figs. 1 and 2, 3 to No. 5 signalling channels of analog signal channel 211 are connected to respectively three input pins of IN3 to IN5 on simulating signal chip matrix 220, the present embodiment is preferably with No. 3 in analog signal channel 211, No. 4 and No. 5 signalling channels are connected to respectively the IN3 on simulating signal chip matrix 220, three input pins of IN4 and IN5, according to other needs, also can be connected to any three input pins on simulating signal chip matrix 220, the simulation VGA signal that analog signal channel 211 will receive, the CVBS signal, YPbPr signal or S-Video signal transfer to simulating signal chip matrix 220, in Fig. 2, the network label is that R/Pr/CVBS represents that No. 3 signalling channels are connected with the IN3 pin, allow simulation VGA signal, IN3 pin input on CVBS signal or YPbPr signal from analog signal matrix chip 220, the network label is that G/Y/Y represents that No. 4 signalling channels are connected with the IN4 pin, allows the IN4 pin input on simulation VGA signal, YPbPr signal or S-Video signal from analog signal matrix chip 220, the network label is that B/Pb/C represents that No. 5 signalling channels are connected with the IN5 pin, allows the IN5 pin input on simulation VGA signal, YPbPr signal or S-Video signal from analog signal matrix chip 220.
Vision signal process chip 230 comprises simulating signal input port 231 and digital signal input port 232, wherein, simulating signal input port 231 comprises VGA input port, CVBS input port, YPbPr input port and S-Video input port, simultaneously, the VGA input port comprises R passage, G passage and B passage, the CVBS input port comprises the CVBS passage, the YPbPr input port comprises Pr passage, Y passage and Pb passage, the S-Video input port comprises Y passage and C-channel, and digital signal input port 232 comprises the DVI/HDMI input port; On simulating signal input port 231 and simulating signal chip matrix 220, corresponding output pin is connected, and digital signal input port 232 is connected with digital signal channel 212.
as shown in Figure 1, preferably select in the present embodiment in analog signal channel 211 No. 1 and No. 2 signalling channels as the row field signal passage of simulation VGA signal, therefore directly No. 1 in analog signal channel 211 is connected with the VGA input port with the number of being connected signalling channel, and simulating signal chip matrix 220 with No. 3 signalling channels be distributed into 3 with identical signalling channel respectively with the VGA input port, the CVBS input port is connected with the YPbPr input port, with No. 4 signalling channels be distributed into 3 with identical signalling channel respectively with the VGA input port, the YPbPr input port is connected with the S-Video input port, with No. 5 signalling channels be distributed into 3 with identical signalling channel respectively with the VGA input port, the YPbPr input port is connected with the S-Video input port, in addition, need to prove, can also select other chip matrixs with video switch function if needed, No. 3, No. 4 and No. 5 signalling channels further can also be distributed into some identical signalling channels, for use.6 to No. 9 signalling channels of digital signal channel 212 are connected with the corresponding DVI/HDMI input port of digital signal input port 232 respectively.
In Fig. 2, the network label is that VGA_R, VGA_G are connected that with VGA_B OU1, OU4 on simulating signal chip matrix 220 be connected an output pin and be connected with R passage, G passage and the B passage of VGA input port respectively with OU7; The network label is that YPbPr_Pr, YPbPr_Y are connected that with YPbPr_Pb OU2, OU5 on simulating signal chip matrix 220 be connected an output pin and be connected with Pr passage, Y passage and the Pb passage of YPbPr input port respectively with OU8; The network label is that CVBS represents that the OU3 output pin on simulating signal chip matrix 220 is connected with the CVBS passage of CVBS input port; The network label is that SV_Y, SV_C represent that OU6 on simulating signal chip matrix 220 is connected an output pin and is connected with C-channel with the Y passage of S-Video input port respectively with OU9; The network label is that Control1 and Control2 represent the I on simulating signal chip matrix 220
2The total line traffic control pin of C SDA is connected with SCL with the control end of vision signal process chip 230 and is connected.
In above-described embodiment, vision signal process chip 230 also comprises MCU 233, and in Fig. 2, the network label is that Control1 and Control2 represent the I on simulating signal chip matrix 220
2The total line traffic control pin of C SDA is connected with SCL with the control end Control1 of MCU 233 and is connected with Control2, MCU 233 sends control signal Control to simulating signal chip matrix 220, and control simulation signal matrix chip 220 is assigned to analog video signal the simulating signal input port of these vision signal process chip 230 correspondences.What deserves to be explained is, the present embodiment is preferably selected the vision signal process chip 230 of built-in MCU 233, this vision signal process chip 230 can select other process chip with vision signal processing capacity to replace, if the process chip of selecting does not have built-in MCU 233, can be on the basis of this process chip, increase by one and have the single-chip microcomputer that this MCU 233 controls functions, analog video signal is assigned to the purpose of the simulating signal input port of these vision signal process chip 230 correspondences to realize control simulation signal matrix chip 220.
in addition, need to prove, if the signaling interface in the present embodiment is not DVI-Integrated 210, but adopt other to have the input of the multi-format of support signal, and analog video signal and digital video signal correspondence can be assigned to the simulating signal input port 231 of vision signal process chip 230 and other interfaces of the function on digital signal input port 232, need to not increase simulating signal chip matrix 220 between DVI-Integrated 210 and vision signal process chip 230, and directly each passage correspondence of this interface is connected to simulating signal input port 231 and the digital signal input port 232 of vision signal process chip 230.
the utility model increases the simulating signal chip matrix between standard DVI-Integrated and vision signal process chip, by the simulating signal chip matrix, the analog signal channel of standard DVI-Integrated is distributed into more analog signal channel, correspondence is connected on the simulating signal input port of vision signal process chip, the direct correspondence of the digital signal channel of DVI-Integrated is connected on the digital signal input port of vision signal process chip, after the vision signal process chip recognizes effective analog video signal or digital video signal, this analog video signal or digital video signal are carried out the video signal format conversion process, to be converted to the required signal type of user from the dissimilar signal of outside input, for the user.The utility model multi-format chromacoder has been expanded the application of existing standard DVI-Integrated, support the input of multi-format signal, can compatiblely simulate VGA signal, CVBS signal, YPbPr signal, S-Video signal, digital DVI signal and digital HDMI signal, it is compatible splendid that its signal is inputted, thereby reduce user's purchase cost, bring great convenience also for user's use.
The utility model further also proposes a kind of display device, and this display device comprises the multi-format chromacoder, and the concrete structure of this multi-format chromacoder and principle of work repeat no more with reference to above-described embodiment herein.
The above is only preferred embodiment of the present utility model; not thereby limit the scope of the claims of the present utility model; every equivalent structure or equivalent flow process conversion that utilizes the utility model instructions and accompanying drawing content to do; or directly or indirectly be used in other relevant technical fields, all in like manner be included in scope of patent protection of the present utility model.
Claims (7)
1. a multi-format chromacoder, is characterized in that, comprising:
Be used for gathering the signal input module of external input signal;
Be connected, be used for described external input signal is carried out the signal processing module of video signal format conversion process with this signal input module; And
Be connected with this signal processing module, be used for the signal after the video signal format conversion process is transferred to signal output module on signal transmission medium.
2. multi-format chromacoder as claimed in claim 1, is characterized in that, described signal input module comprises:
Be used for gathering the input end of analog signal of the analog video signal that comprises simulation VGA signal, CVBS signal, YPbPr signal and S-Video signal; And
Be used for gathering the digital signal input end of the digital video signal that comprises digital DVI signal and digital HDMI signal.
3. multi-format chromacoder as claimed in claim 2, is characterized in that, described signal processing module comprises:
Be used for receiving the DVI-Integrated of described analog video signal or described digital video signal;
Be connected, be used for simulating signal chip matrix that described analog video signal is distributed with this DVI-Integrated; And
Be connected, be used for described analog video signal and described digital video signal are carried out the vision signal process chip of video signal format conversion process with this simulating signal chip matrix.
4. multi-format chromacoder as claimed in claim 3, is characterized in that, described DVI-Integrated comprises the analog signal channel corresponding with input end of analog signal and the digital signal channel corresponding with digital signal input end; Described analog signal channel is connected with corresponding input pin on described simulating signal chip matrix.
5. multi-format chromacoder as claimed in claim 4, it is characterized in that, described vision signal process chip comprises the simulating signal input port of containing VGA input port, CVBS input port, YPbPr input port and S-Video input port, and the digital signal input port of containing the DVI/HDMI input port;
Described simulating signal input port is connected with corresponding output pin on described simulating signal chip matrix;
Described digital signal input port is connected with described digital signal channel.
6. multi-format chromacoder as claimed in claim 5, it is characterized in that, described vision signal process chip comprises that also one is used for controlling described simulating signal chip matrix described analog video signal is assigned to MCU on simulating signal input port corresponding to this vision signal process chip, and the control end of described MCU is connected with total line traffic control pin of described simulating signal chip matrix.
7. a display device, is characterized in that, comprises multi-format chromacoder as described in any one in claim 1 to 6.
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| CN 201220593245 CN202976787U (en) | 2012-11-12 | 2012-11-12 | Multi-format signal conversion device and display equipment |
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| CN 201220593245 CN202976787U (en) | 2012-11-12 | 2012-11-12 | Multi-format signal conversion device and display equipment |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102982782A (en) * | 2012-11-12 | 2013-03-20 | 深圳市创凯电子有限公司 | Multi-format signal conversion device and display equipment |
| CN103402069A (en) * | 2013-07-15 | 2013-11-20 | 青岛海信电器股份有限公司 | Electronic equipment, and display device and signal processing device for electronic equipment |
| CN104571996A (en) * | 2015-01-05 | 2015-04-29 | 山东超越数控电子有限公司 | Domestically-produced computer platform based split-screen achievement method |
| CN111050140A (en) * | 2019-12-31 | 2020-04-21 | 广州路派电子科技有限公司 | Backing image system and control method thereof |
-
2012
- 2012-11-12 CN CN 201220593245 patent/CN202976787U/en not_active Withdrawn - After Issue
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102982782A (en) * | 2012-11-12 | 2013-03-20 | 深圳市创凯电子有限公司 | Multi-format signal conversion device and display equipment |
| CN102982782B (en) * | 2012-11-12 | 2015-06-17 | 深圳市创凯电子有限公司 | Multi-format signal conversion device and display equipment |
| CN103402069A (en) * | 2013-07-15 | 2013-11-20 | 青岛海信电器股份有限公司 | Electronic equipment, and display device and signal processing device for electronic equipment |
| CN103402069B (en) * | 2013-07-15 | 2016-05-04 | 青岛海信电器股份有限公司 | Electronic equipment and display unit thereof and signal processing apparatus |
| CN104571996A (en) * | 2015-01-05 | 2015-04-29 | 山东超越数控电子有限公司 | Domestically-produced computer platform based split-screen achievement method |
| CN111050140A (en) * | 2019-12-31 | 2020-04-21 | 广州路派电子科技有限公司 | Backing image system and control method thereof |
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Granted publication date: 20130605 Effective date of abandoning: 20150617 |
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