CN202713156U - Isolated voltage conversion circuit - Google Patents
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- CN202713156U CN202713156U CN 201220201922 CN201220201922U CN202713156U CN 202713156 U CN202713156 U CN 202713156U CN 201220201922 CN201220201922 CN 201220201922 CN 201220201922 U CN201220201922 U CN 201220201922U CN 202713156 U CN202713156 U CN 202713156U
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Abstract
The utility model provides an isolated voltage conversion circuit, which comprises an input port for receiving input voltage; an output port for providing an output voltage; a transformer having a primary winding, a secondary winding, and a third winding, wherein the primary winding, the secondary winding, and the third winding each have a first end and a second end, and the first end of the primary winding is coupled to the input port to receive an input voltage; a primary side power switch coupled between a second end of a primary side winding of the transformer and a primary side ground; the secondary side power switch is coupled between the first end of the secondary side winding of the transformer and the output port; a secondary side controller providing a frequency modulation signal; the coupling device receives the frequency modulation signal and provides a frequency control signal; and the primary side controller receives the current detection signal and the frequency control signal, and outputs a gate electrode signal to the control end of the primary side power switch at the output end so as to control the on-off of the primary side power switch.
Description
Technical field
The utility model relates to power circuit, and more particularly, the utility model relates to isolated voltage conversion circuit.
Background technology
Current isolated voltage conversion circuit adopts former limit control mode usually.As shown in Figure 1, isolated voltage conversion circuit 10 adopts transformer T1 as energy-storage travelling wave tube usually.One power switch is electrically coupled to the former limit Lp of transformer, and control circuit is controlled conducting and the shutoff of this power switch, makes energy alternately be stored or be passed to the secondary Ls of transformer in the former limit of transformer T1.The secondary Ls of transformer transfers its energy to output capacitance Co, produces an output voltage V o at output capacitance Co two ends, and this output voltage V o is the VD of isolated converter.In isolated converter shown in Figure 1, power switch and control circuit are integrated in the chip IC 1.In the isolated converter of former limit control, output voltage V o feeds back to the feedback end FB of control circuit by a coupled apparatus D0, with the break-make of the electric current power ratio control switch that flows through power switch.
In the control mode of former limit, coupled apparatus must keep operating state to guarantee isolated voltage conversion circuit normal operation always.When realizing, the power consumption of optocoupler increases along with alleviating of load by optocoupler and additional device thereof (such as resistance etc.) when coupled apparatus.Therefore coupled apparatus has increased the no-load loss of system, has reduced the efficient of system under light condition.
The utility model content
The purpose of this utility model is to solve the problems referred to above of prior art, and a kind of isolated voltage conversion circuit of secondary control is provided.
Described isolated voltage conversion circuit is characterized in that, comprising: input port receives input voltage; Output port provides output voltage; Transformer has former limit winding, secondary winding and the tertiary winding, and wherein, former limit winding, secondary winding and the tertiary winding have respectively first end and the second end, and the first end of described former limit winding is coupled to input port and receives input voltage; Former limit power switch has first end, the second end and control end, and wherein said first end is coupled to the second end of the former limit winding of transformer, and the former limit of described the second termination is with reference to ground; Secondary power switch is coupled between the first end and output port of secondary winding of transformer; The secondary controller has power end, the first feedback end and coupling control end, and wherein said power end receives output voltage, and described the first feedback end receives the first feedback signal that characterizes output voltage, described coupling control end output frequency modulation signal; Coupled apparatus has input side and outlet side, and wherein said input side is coupled between the coupling control end of output port and secondary controller, and described outlet side provides frequency control signal; Former limit controller, have current detecting end, frequency control signal end and output, wherein the current detecting termination is received the current detection signal that characterizes the electric current that flows through former limit winding, the frequency control signal end is coupled to the outlet side receive frequency control signal of coupled apparatus, and described former limit controller is exported gate signal at output; The output that the control end of wherein said former limit power switch is coupled to former limit controller receives gate signal; The outlet side of described coupled apparatus is coupled in the frequency control signal end of former limit controller and former limit with reference between the ground.
In one embodiment, described secondary controller comprises: error amplifier, have first input end, the second input and output, wherein said first input end couples the first feedback signal, described the second input receives the baseline error signal, and described error amplifier is at the output output error signal; Error comparator, have first input end, the second input and output, the output that wherein said first input end is coupled to error amplifier receives error signal, and described the second input couples modulation signal, and described error comparator is exported the first comparison signal at output; The first switch, have first end, the second end and control end, described first end is coupled to the coupling control end, described the second termination secondary is with reference to ground, the output that described control end is coupled to error comparator receives the first comparison signal, described the first switch is open-minded when the first comparison signal is the first logic level, turn-offs when the first comparison signal is the second logic level.
In one embodiment, described former limit controller comprises: peak comparator has first input end, the second input and output, wherein said first input end received current detection signal, described the second input receives peak-current signal, described output output peak current control signal; Logical circuit, have first input end, the second input and output, wherein said first input end is coupled to the outlet side receive frequency control signal of coupled apparatus, the output that described the second input is coupled to peak comparator receives peak current control signal, described output output logic control signal.
In one embodiment, described logical circuit comprises: the first rest-set flip-flop, have set end, reset terminal and output, wherein said set end couples frequency control signal, the output that described reset terminal is coupled to peak comparator receives peak current control signal, described output output logic control signal.
In one embodiment, the logic control signal of described logical circuit output is coupled to the output of former limit controller.
In one embodiment, described former limit controller also has the second feedback end, described former limit controller also comprises: load detecting circuit, have first input end, the second input and output, wherein said first input end receives the second feedback signal, described the second input receives gate signal, described output output loading detection signal; Start control circuit, have input and output, described input received current detection signal, described output output starts control signal.
In one embodiment, described former limit controller also comprises selector, has first input end, the second input, control end and output, wherein said first input end is coupled to the output that starts control circuit and receives the startup control signal, described the second input is coupled to the output receive logic control signal of logical circuit, described control end receives load detection signal, described selector will start the output that control signal is coupled to former limit controller when load detection signal is effective, logic control signal is coupled to the output of former limit controller when load detection signal is invalid.
In one embodiment, described load detecting circuit comprises: the load detecting comparator, have first input end, the second input and output, described first input end receives the second feedback signal, described the second input receives load detecting reference signal, described output output loading comparison signal; Impulse circuit has input and output, and described input receives gate signal, described output output pulse signal; Latch, has the clock end, signal input part and output, described clock end is to the output return pulse signal of impulse circuit, the output that described signal input port is coupled to the load detecting comparator receives the load comparison signal, described latch when described clock termination is received pulse signal at output output loading detection signal.
In one embodiment, described startup control circuit comprises: the peak-peak comparator, have first input end, the second input and output, described first input end received current detection signal, described the second input receives the peak-current signal maximum, described output output peak inrush current control signal; Oscillator, the clock signal that output is fixing; The second rest-set flip-flop, have set end, reset terminal and output, described set end is coupled to oscillator receive clock signal, and the output that described reset terminal is coupled to the peak-peak comparator receives the peak inrush current control signal, and described output output starts control signal.
Description of drawings
Fig. 1 shows the circuit diagram of the isolated voltage changer of former limit control of the prior art;
Fig. 2 shows the electrical block diagram according to the isolated voltage conversion circuit 20 of the utility model one embodiment;
The waveform schematic diagram of each signal when Fig. 3 shows the load saltus step in Fig. 2 circuit;
Fig. 4 shows the electrical block diagram according to the former limit controller 204 of the utility model one embodiment.
Embodiment
The below will describe specific embodiment of the utility model in detail, should be noted that the embodiments described herein only is used for illustrating, and be not limited to the utility model.In the following description, in order to provide thorough understanding of the present utility model, a large amount of specific detail have been set forth.Yet, it is evident that for those of ordinary skills: needn't adopt these specific detail to carry out the utility model.In other examples, for fear of obscuring the utility model, do not specifically describe known circuit, material or method.
In whole specification, " embodiment ", " embodiment ", " example " or mentioning of " example " are meaned: special characteristic, structure or characteristic in conjunction with this embodiment or example description are comprised among at least one embodiment of the utility model.Therefore, phrase " in one embodiment ", " in an embodiment ", " example " or " example " that occurs in each place of whole specification differs to establish a capital and refers to same embodiment or example.In addition, can with any suitable combination and/or sub-portfolio with specific feature, structure or property combination in one or more embodiment or example.In addition, it should be understood by one skilled in the art that at this accompanying drawing that provides all be for illustrative purposes, and accompanying drawing is drawn in proportion not necessarily.Should be appreciated that when claiming element " to be connected to " or during " being couple to " another element, it can be directly to connect or be couple to another element or can have intermediary element.On the contrary, when claiming element " to be directly connected to " or during " being directly coupled to " another element, not having intermediary element.The identical identical element of Reference numeral indication.Term used herein " and/or " comprise any and all combinations of one or more relevant projects of listing.
Fig. 2 shows the electrical block diagram according to the isolated voltage conversion circuit 20 of the utility model one embodiment.As shown in Figure 2, isolated voltage conversion circuit 20 comprises: input port receives input voltage vin; Output port provides output voltage V o; Transformer T1 has former limit winding L p, secondary winding L s and tertiary winding Lt, wherein, former limit winding L p, secondary winding L s and tertiary winding Lt have respectively first end and the second end, and the first end of described former limit winding L p is coupled to input port to receive input voltage vin; Former limit power switch M1 has first end, the second end and control end, and wherein said first end is coupled to the second end of the former limit winding L p of transformer T1, and the former limit of described the second termination is with reference to ground PGND; Secondary power switch D1 is coupled between the first end and output port of secondary winding L s of transformer; Secondary controller 202, has power end VCC, the first feedback end FB1 and coupling control end OP, wherein said power end VCC receives output voltage V o, described the first feedback end FB1 receives the first feedback signal Vfb1 that characterizes output voltage V o, based on output voltage V o and the first feedback signal Vfb1, described secondary controller 202 produces frequency modulated signal at coupling control end OP; Coupled apparatus, comprise input side 101-1 and outlet side 101-2, wherein input side 101-1 is coupled between the coupling control end of output port and secondary controller, to receive output voltage V o and frequency modulated signal, described coupled apparatus provides frequency control signal Con based on described output voltage and described frequency modulated signal at its output; Former limit controller 201, has current detecting end CS, frequency control signal end FRE and output Drv, wherein current detecting end CS couples the current detection signal Vcs that characterizes the electric current that flows through former limit winding L p, frequency control signal end FRE is coupled to the outlet side 101-2 receive frequency control signal Con of coupled apparatus, described former limit controller 201 is based on current detection signal Vcs and frequency control signal Con, its output Drv output gate signal Gate to the control end of former limit power switch M1 to control the break-make of former limit power switch M1; The outlet side 101-2 of wherein said coupled apparatus is coupled in the frequency control signal end FRE of former limit controller 201 and former limit with reference between the ground PGND.
As shown in Figure 2, coupled apparatus comprises photoelectric coupled device.The input side 101-1 of described photoelectric coupled device comprises light-emitting diode, and its outlet side 101-2 comprises photistor.The anode of described light-emitting diode is coupled to output port to receive output voltage V o by resistance R 2; Negative electrode is coupled to secondary controller 202, and the frequency modulated signal that coupling control end OP is provided is coupled to photistor.The former limit of one termination of described photistor is with reference to ground PGND, and the other end is exported described frequency control signal Con.Described frequency control signal Con has similar waveform to frequency modulated signal, different amplitudes.Wherein resistance R 2 is used for the electric current that light-emitting diode is flow through in restriction.In one embodiment, resistance R 2 can be omitted.Light-emitting diode and resistance R 2 are not limited to the connected mode in embodiment illustrated in fig. 2.In one embodiment, the location swap of resistance R 2 and light-emitting diode.Those of ordinary skills will be appreciated that, the effect of optocoupler and resistance R 2 is for frequency modulated signal is coupled into frequency control signal, thereby offer former limit controller 201, any connected mode of above-mentioned functions or device (such as hall device) realized all is included within the utility model scope.The operation principle of photoelectric coupled device is those of ordinary skills' common practise, and is simple and clear for narrating, and no longer elaborates herein.
In one embodiment, described secondary controller 202 comprises: error amplifier 102, have first input end (positive input terminal), the second input (negative input end) and output, wherein said first input end couples the first feedback signal Vfb1 that characterizes output voltage V o, described the second input receives baseline error signal Vref1, based on the first feedback signal Vfb1 and baseline error signal Vref1, described error amplifier 102 is at output output error signal Vc; Error comparator 103, has first input end (negative input end), the second input (positive input terminal) and output, the output that wherein said first input end is coupled to error amplifier 102 receives error signal Vc, described the second input couples modulation signal Vsaw, based on error signal Vc and modulation signal Vsaw, described error comparator 103 is exported the first comparison signal at output; The first switch M2, have first end, the second end and control end, wherein said first end is coupled to coupling control end OP, described the second termination secondary is with reference to ground SGND, the output that described control end is coupled to error comparator 103 receives the first comparison signal, based on the first comparison signal, described the first switch M2 or open or turn-off produces frequency modulated signal at described coupling control end OP.
In one embodiment, described secondary controller 202 also comprises modulation signal generator 104.Described modulation signal generator 104 has input and output, and the first end that its input is coupled to secondary power tube D1 receives synchronizing signal, and based on synchronizing signal, described modulation signal generator 104 is at its output output modulation signal Vsaw.The function of described modulation signal generator 104 is: when secondary power tube D1 opened, synchronizing signal was high, and modulation signal Vsaw rises; When modulation signal Vsaw rose to error signal Vc, modulation signal dropped to low level, waited for that modulation signal Vsaw rose again when synchronizing signal was high next time.Modulation signal generator 104 is the common practise of this area, and is simple and clear for narrating, and no longer sets forth its physical circuit herein.
The generation of modulation signal Vsaw must be based on synchronizing signal.In one embodiment, described modulation signal Vsaw has fixing low level time t in each switch periods.Namely pass through set time t, modulation signal Vsaw begins to rise; When modulation signal Vsaw rises to error signal Vc, become low level.Again pass through set time t, modulation signal Vsaw rises.Above process is gone round and begun again.Described fixedly low level time can be according to the practical situations setting.
In one embodiment, described former limit controller 201 comprises: peak comparator 107, have first input end, the second input and output, wherein said first input end received current detection signal Vcs, described the second input receives peak-current signal Vlim, based on described current detection signal Vcs and peak-current signal Vlim, described peak comparator 107 is at output output peak current control signal Vp; Logical circuit 108, have first input end, the second input and output, wherein first input end is coupled to the outlet side 101-2 receive frequency control signal Con of coupled apparatus, the output that described the second input is coupled to peak comparator 107 receives peak current control signal Vp, based on frequency control signal Con and peak current control signal Vp, described logical circuit 108 is in output output logic control signal 111.In this embodiment, described the first rest-set flip-flop is level triggers.
In one embodiment, the first rest-set flip-flop is pulse-triggered, and frequency control signal Con trailing edge is effective.
In one embodiment, the logic control signal 111 of logical circuit 108 outputs is used as the break-make that gate signal Gate controls former limit power switch M1.Those of ordinary skills should be understood that gate signal Gate usually can be through controlling the break-make of former limit power switch M1 again after the driver reinforcement driving force.Driver belongs to the common practise of this area, for simplicity, and not expression in Fig. 2.
In the embodiment shown in Figure 2, frequency control signal Con Low level effective.Logical circuit 108 comprises: the first inverter 109, have input and input, wherein input is coupled to coupled apparatus outlet side 101-2 receive frequency control signal Con, and based on frequency control signal Con, described the first inverter 109 is exported anti-phase frequency control signal at output; The first rest-set flip-flop 106, have the set end " S ", reset terminal " R " and output " Q ", set end wherein " S " output that is coupled to the first inverter 109 receives anti-phase frequency control signal, reset terminal " R " output that is coupled to peak comparator 107 receives peak current control signal Vp, based on anti-phase frequency control signal and peak current control signal Vp, described the first rest-set flip-flop 106 is in output output logic control signal 111.
Those of ordinary skills will be appreciated that the first inverter 109 can omit in the effective embodiment of frequency control signal Con high level; The first inverter 109 also can be positioned at the first rest-set flip-flop 106 inside, namely the set end be "
", this set end "
" Low level effective.
The waveform schematic diagram of each signal when Fig. 3 shows the load saltus step in the isolated voltage conversion circuit 20 shown in Figure 2.Wherein, Iload represents load current, is the electric current that flows through load resistance RL among Fig. 2; GD1 represents the break-make exemplary waveforms of secondary power switch D1, is not concrete signal waveform, and when secondary power switch pipe D1 opened, GD1 was high, and when secondary power switch pipe D1 turn-offed, GD1 was low; Gate represents the output signal of logical circuit 108, the gate signal of former limit power switch M1 namely, and in the embodiment shown in Figure 2, when Gate was high, former limit power switch M1 was open-minded, and Gate is when low, and former limit power switch M1 turn-offs; Vc is error signal; Vsaw is modulation signal; Con is frequency control signal.
The course of work of isolated voltage conversion circuit 20 is described below in conjunction with Fig. 2 and Fig. 3.When isolated voltage conversion circuit 20 steady operation, output voltage V o remains unchanged.T0 constantly, load by heavy duty to the underloading saltus step.Output voltage V o will rise slightly this moment, and the first feedback signal Vfb1 follows rising, cause error signal Vc to rise.Because the rate of rise of modulation signal Vsaw is fixed, thus the time that modulation signal Vsaw rises to error signal Vc increase, the low level time of the first comparison signal of the first comparator 103 outputs is increased.Thereby increased the turn-off time of the first switch M2.Frequency control signal Con is high when switching tube M2 turn-offs, when switching tube M2 conducting, it is low level pulse, therefore when load is underloading by heavily loaded saltus step, the increase of output voltage will be so that the high level time of frequency control signal Con increases, and namely the interval of frequency control signal output low level pulse increases.Frequency control signal Con is through after the first inverter 109 anti-phase, and set the first rest-set flip-flop 106 makes logic control signal 111 for high, and namely gate signal Gate be height, thereby opens former limit power switch M1.The prolongation of the blanking time of the low level pulse of frequency control signal Con means that the turn-off time of former limit power switch M1 increases.Thereby so that in a switch periods, the energy that input voltage is delivered to load RL reduces, to adapt to the decline of load current.At t1 constantly, load is heavy duty by the underloading saltus step, output voltage V o descends, the first feedback signal Vfb1 follows decline, then error signal Vc descends, so that the minimizing of the turn-off time of the first switch M2, thereby so that the high level time of frequency control signal Con shortens, namely the interval of frequency control signal output low level pulse reduces.Frequency control signal Con is through after the first inverter 109 anti-phase, and set the first rest-set flip-flop 106 makes logic control signal 111 for high, and namely gate signal Gate be height, thereby opens former limit power switch M1.The shortening of the blanking time of the low level pulse of frequency control signal Con means that the turn-off time of former limit power switch M1 shortens.Thereby so that in a switch periods, the energy that input voltage is delivered to load RL increases, to adapt to the rising of load current.
Because in isolated voltage conversion circuit 20, coupled apparatus is in " free time " state when the first switch M2 is disconnected.Under unloaded and light condition, prolong the opening time of the first switch M2, and correspondingly, " free time " state time of coupled apparatus also is extended.Therefore, the power consumption of coupled apparatus and auxiliary circuit thereof (such as resistance R 2) reduces greatly, thus Effective Raise the efficient of isolated voltage conversion circuit.
Fig. 4 shows the electrical block diagram according to the former limit controller 204 of the utility model one embodiment.Compare with former limit controller 201, described former limit controller 204 also has the second feedback end FB2, the first end that is coupled to tertiary winding Lt receives the second feedback signal Vfb2, logical circuit 108c in the described former limit controller 204 also comprises: load detecting circuit 401, has first input end, the second input and output, wherein said first input end receives the second feedback signal Vfb2, described the second input receives gate signal Gate, based on the second feedback signal Vfb2 and gate signal Gate, described load detecting circuit 401 is at output output loading detection signal 403; Start control circuit 402, have input and output, described input received current detection signal Vcs, based on current detection signal Vcs, described startup control circuit starts control signal 404 in output output.
The power end Vcc of secondary controller is coupled to output and receives output voltage V o as supply power voltage.When starting and output voltage V o when on the low side, the secondary controller may be because electricity shortage and the frequency control signal Con of output error.At this moment, former limit controller 204 adopts the break-make that starts the former limit power switch M1 of control circuit 402 controls, the control of the frequency control signal Con of the mistake of shielding secondary controller output.
In one embodiment, described former limit controller 204 also comprises selector 118, has the first input, the second input, control end and output, wherein said first input end is coupled to and starts control circuit 402 reception startup control signals 404, described the second input is coupled to the output receive logic control signal 111 of the first rest-set flip-flop, described control end receives load detection signal 403, based on load detection signal 403, described selector 118 will start control signal 404 or logical control signals 111 and be coupled to output, control former limit power switch M1 as gate signal Gate.
In one embodiment, described selector 118 comprises single-ended commutator (SPDT), described single-ended commutator has first input end, the second input, control end and output, wherein wherein said first input end is coupled to and starts control circuit 402 reception startup control signals 404, described the second input is coupled to the output receive logic control signal 111 of the first rest-set flip-flop, described control end receives load detection signal 403, when load detection signal 403 effectively the time, described single-pole double-throw switch (SPDT) will start control signal 404 and be coupled to output, control former limit power switch M1 as gate signal Gate, when load detection signal 403 is invalid, described single-pole double-throw switch (SPDT) is coupled to output with the logic control signal 111 of the first rest-set flip-flop output, controls former limit power switch M1 as gate signal Gate.
In one embodiment, described load detecting circuit 401 comprises: load detecting comparator 121, have first input end (negative input end), the second input (positive input terminal) and output, described first input end receives the second feedback signal Vfb2, described the second input receives load detecting reference signal Vref2, based on the second feedback signal Vfb2 and load detecting reference signal Vref2, described load detecting comparator 121 output loading comparison signals 125; Impulse circuit 123 has input and output, and described input receives gate signal Gate, based on gate signal Gate, and described output output pulse signal 124; Latch 126, have clock end clk, signal input part D and output Q, described clock end clk is to the output return pulse signal 124 of impulse circuit 123, the output that described signal input part D is coupled to load detecting comparator 121 receives load comparison signal 125, based on pulse signal 124 and load comparison signal 125, described latch 126 is at output Q output loading detection signal 403.
In one embodiment, described load detecting circuit 401 also comprises delay circuit 120, has input and output, and described input receives gate signal Gate, and described output is coupled to the output of impulse circuit.When gate signal Gate closes former limit power switch M1, through the delay time that delay circuit 120 is preset, impulse circuit 123 output pulse signals 124.The second feedback signal Vfb2 is the voltage signal on the tertiary winding Lt.Have no progeny when former limit power switch M1 closes, secondary power switch pipe D1 opens, and the second feedback signal Vfb2 saltus step this moment is to output voltage V o.Secondary controller 202 is powered by output voltage V o.If output voltage V o lower (power down when working in circuit start period or output voltage), to such an extent as to secondary controller 202 can't work, then frequency control signal Con may be wrong.When the secondary power switch conducting, the second feedback signal Vfb2 is directly proportional with output voltage V o.In one embodiment, o is lower when output voltage V, to such an extent as to when the secondary controller can't normally just done, the second feedback signal Vfb2 was lower than load detecting reference signal Vref2, and 121 upsets of load detecting comparator.After latch received impulse circuit 123 output pulse signals 124, the load detecting comparison signal that load detecting comparator 121 is exported latched, and output loading detection signal 403 is indicated the state of output voltage V o.Seen from the above description, in each switch periods, load detecting circuit 401 all will detect output voltage V o, if output voltage V o is lower than certain value (the second feedback voltage Vfb 2 is less than load detecting reference signal Vref2), load detection signal 403 will be controlled selector 118 will start the startup control signal 404 of control circuit output as gate signal Gate.The delay time of delay circuit 120 be for signal that latch 126 latchs be under the stable state of the second feedback signal Vfb2, to obtain.Those of ordinary skills should be understood that the delay time of load detecting reference signal Vref2 and delay circuit 120 can arrange according to the side circuit applicable cases.
In one embodiment, starting control circuit 402 comprises: peak-peak comparator 119, have first input end, the second input and output, described first input end received current detection signal Vcs, described the second input receives peak-current signal maximum Vlim_max, based on current detection signal Vcs and peak-current signal maximum Vlim_max, described peak-peak comparator 119 is at output output peak inrush current control signal Vmp; Oscillator 114, clock signal Vosc; The second rest-set flip-flop 117, have set end " S ", reset terminal " R " and output " Q ", described set end " S " is coupled to oscillator 114 receive clock signal Vosc, the output that described reset terminal " R " is coupled to peak-peak comparator 119 receives peak inrush current control signal Vmp, based on clock signal Vosc and peak inrush current control signal Vmp, described the second rest-set flip-flop 117 starts control signal 404 in output " Q " output.
In one embodiment, the clock signal Vosc of oscillator 114 outputs has fixed frequency fs_max, i.e. the maximum operation frequency of isolated voltage conversion circuit.Thereby peak-peak comparator 119 is controlled the set end of the second rest-set flip-flop 117 with the current detection signal Vcs output signal of comparing with peak-current signal maximum Vlim_max.
Although described the utility model with reference to several exemplary embodiments, should be appreciated that used term is explanation and exemplary and nonrestrictive term.Because the utility model is implementation and do not break away from spirit or the essence of utility model in a variety of forms, so be to be understood that, above-described embodiment is not limited to any aforesaid details, and should be in the spirit and scope that the claim of enclosing limits explain widely, therefore fall into whole variations in claim or its equivalent scope and remodeling and all should be the claim of enclosing and contain.
Claims (9)
1. an isolated voltage conversion circuit is characterized in that, comprising:
Input port receives input voltage;
Output port provides output voltage;
Transformer has former limit winding, secondary winding and the tertiary winding, and wherein, former limit winding, secondary winding and the tertiary winding have respectively first end and the second end, and the first end of described former limit winding is coupled to input port and receives input voltage;
Former limit power switch has first end, the second end and control end, and wherein said first end is coupled to the second end of the former limit winding of transformer, and the former limit of described the second termination is with reference to ground;
Secondary power switch is coupled between the first end and output port of secondary winding of transformer;
The secondary controller has power end, the first feedback end and coupling control end, and wherein said power end receives output voltage, and described the first feedback end receives the first feedback signal that characterizes output voltage, described coupling control end output frequency modulation signal;
Coupled apparatus has input side and outlet side, and wherein said input side is coupled between the coupling control end of output port and secondary controller, and described outlet side provides frequency control signal;
Former limit controller, have current detecting end, frequency control signal end and output, wherein the current detecting termination is received the current detection signal that characterizes the electric current that flows through former limit winding, the frequency control signal end is coupled to the outlet side receive frequency control signal of coupled apparatus, and described former limit controller is exported gate signal at output; Wherein
The output that the control end of described former limit power switch is coupled to former limit controller receives gate signal.
2. isolated voltage conversion circuit as claimed in claim 1 is characterized in that described secondary controller comprises:
Error amplifier has first input end, the second input and output, and wherein said first input end couples the first feedback signal, and described the second input receives the baseline error signal, and described error amplifier is at the output output error signal;
Error comparator, have first input end, the second input and output, the output that wherein said first input end is coupled to error amplifier receives error signal, and described the second input couples modulation signal, and described error comparator is exported the first comparison signal at output;
The first switch, have first end, the second end and control end, described first end is coupled to the coupling control end, described the second termination secondary is with reference to ground, the output that described control end is coupled to error comparator receives the first comparison signal, described the first switch is open-minded when the first comparison signal is the first logic level, turn-offs when the first comparison signal is the second logic level.
3. isolated voltage conversion circuit as claimed in claim 1 is characterized in that described former limit controller comprises:
Peak comparator has first input end, the second input and output, wherein said first input end received current detection signal, and described the second input receives peak-current signal, described output output peak current control signal;
Logical circuit, have first input end, the second input and output, wherein said first input end is coupled to the outlet side receive frequency control signal of coupled apparatus, the output that described the second input is coupled to peak comparator receives peak current control signal, described output output logic control signal.
4. isolated voltage conversion circuit as claimed in claim 3 is characterized in that described logical circuit comprises:
The first rest-set flip-flop has set end, reset terminal and output, and wherein said set end couples frequency control signal, and the output that described reset terminal is coupled to peak comparator receives peak current control signal, described output output logic control signal.
5. isolated voltage conversion circuit as claimed in claim 3 is characterized in that, the logic control signal of described logical circuit output is coupled to the output of former limit controller.
6. such as each described isolated voltage conversion circuit in claim 3 or 4, it is characterized in that, described former limit controller also has the second feedback end, and described former limit controller comprises:
Load detecting circuit has first input end, the second input and output, and wherein said first input end receives the second feedback signal, and described the second input receives gate signal, described output output loading detection signal;
Start control circuit, have input and output, described input received current detection signal, described output output starts control signal.
7. isolated voltage conversion circuit as claimed in claim 6, it is characterized in that, described former limit controller also comprises selector, has first input end, the second input, control end and output, wherein said first input end is coupled to the output that starts control circuit and receives the startup control signal, described the second input is coupled to the output receive logic control signal of logical circuit, described control end receives load detection signal, described selector will start the output that control signal is coupled to former limit controller when load detection signal is effective, logic control signal is coupled to the output of former limit controller when load detection signal is invalid.
8. isolated voltage conversion circuit as claimed in claim 6 is characterized in that, described load detecting circuit comprises:
The load detecting comparator has first input end, the second input and output, and described first input end receives the second feedback signal, and described the second input receives load detecting reference signal, described output output loading comparison signal;
Impulse circuit has input and output, and described input receives gate signal, described output output pulse signal;
Latch, has the clock end, signal input part and output, described clock end is to the output return pulse signal of impulse circuit, the output that described signal input port is coupled to the load detecting comparator receives the load comparison signal, described latch when described clock termination is received pulse signal at output output loading detection signal.
9. isolated voltage conversion circuit as claimed in claim 6 is characterized in that, described startup control circuit comprises:
The peak-peak comparator has first input end, the second input and output, described first input end received current detection signal, and described the second input receives the peak-current signal maximum, described output output peak inrush current control signal;
Oscillator, the clock signal that output is fixing;
The second rest-set flip-flop, have set end, reset terminal and output, described set end is coupled to oscillator receive clock signal, and the output that described reset terminal is coupled to the peak-peak comparator receives the peak inrush current control signal, and described output output starts control signal.
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| Application Number | Priority Date | Filing Date | Title |
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| CN 201220201922 CN202713156U (en) | 2012-05-08 | 2012-05-08 | Isolated voltage conversion circuit |
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| Application Number | Priority Date | Filing Date | Title |
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| CN 201220201922 CN202713156U (en) | 2012-05-08 | 2012-05-08 | Isolated voltage conversion circuit |
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| CN202713156U true CN202713156U (en) | 2013-01-30 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105471291A (en) * | 2015-12-31 | 2016-04-06 | 深圳宝砾微电子有限公司 | Flyback type AC-DC voltage conversion circuit and flyback type voltage converter |
| CN105471231A (en) * | 2015-12-31 | 2016-04-06 | 深圳宝砾微电子有限公司 | Flyback AC-DC conversion circuit and flyback voltage converter |
-
2012
- 2012-05-08 CN CN 201220201922 patent/CN202713156U/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105471291A (en) * | 2015-12-31 | 2016-04-06 | 深圳宝砾微电子有限公司 | Flyback type AC-DC voltage conversion circuit and flyback type voltage converter |
| CN105471231A (en) * | 2015-12-31 | 2016-04-06 | 深圳宝砾微电子有限公司 | Flyback AC-DC conversion circuit and flyback voltage converter |
| CN105471291B (en) * | 2015-12-31 | 2018-07-20 | 深圳宝砾微电子有限公司 | A kind of inverse-excitation type AC-DC voltage conversion circuits and inverse-excitation type electric pressure converter |
| CN105471231B (en) * | 2015-12-31 | 2019-03-08 | 深圳宝砾微电子有限公司 | A kind of Flyback ac-dc converter circuit and inverse-excitation type electric pressure converter |
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