CN202978708U - Isolated voltage conversion circuit - Google Patents
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Abstract
The utility model provides an isolated voltage conversion circuit. The isolated voltage conversion circuit includes: the transformer comprises a primary winding, a secondary winding and a third winding, the primary winding is coupled with the primary power switch, the secondary winding is coupled with the secondary power switch, the coupling device is provided with an input side and an output side, the input side is coupled with the secondary controller, the output side generates a frequency control signal, the primary controller provides a gate signal to control the on-off of the primary power switch, and the primary controller comprises: the circuit comprises a peak value comparator, a logic circuit, a starting control circuit, a load detection circuit and a selector.
Description
Technical field
The utility model relates to electronic circuit, and more particularly, the utility model relates to isolated voltage conversion circuit.
Background technology
Some isolated voltage conversion circuit adopts the mode of former limit control chip and the combination of secondary control chip to control the work of isolated voltage conversion circuit.In the isolated voltage conversion circuit of this class, coupled apparatus is coupled to former limit control chip with the control signal that the secondary control chip produces, thereby and the control signal that produces of former limit control chip control together the work of isolated electric pressure converter.The secondary control chip is powered by the output voltage of isolated voltage conversion circuit usually.
Isolated voltage conversion circuit is when starting, and output voltage is not yet set up, and at output short-circuit or when other faults occur, output voltage will power down.In these cases, the secondary control chip will can't work because of electricity shortage.Therefore the control signal that produces of secondary control chip may be wrong, will cause isolated voltage conversion circuit irregular working.
The utility model content
The purpose of this utility model is to solve the problems referred to above of prior art, and a kind of improved isolated voltage conversion circuit is provided.
for achieving the above object, the utility model proposes a kind of isolated voltage conversion circuit, described isolated voltage conversion circuit comprises: transformer, former limit power switch, secondary power switch, former limit controller, secondary controller and coupled apparatus, wherein said transformer comprises former limit winding, secondary winding and the tertiary winding, described former limit winding and former limit power switch couple, described secondary winding and secondary power switch couple, described coupled apparatus has input side and outlet side, described input side couples described secondary controller, described outlet side produces frequency control signal, described former limit controller provides gate signal to control the break-make of former limit power switch, wherein said former limit controller comprises: peak comparator, has first input end, the second input and output, wherein said first input end receives the current detection signal that the electric current of former limit winding is flow through in reflection, described the second input receives peak-current signal, described output output peak current control signal, logical circuit has first input end, the second input and output, and wherein said first input end receive frequency control signal, described the second input receives peak current control signal, described output output logic control signal, start control circuit, have input and output, described input receives the current detection signal that the electric current of former limit power switch is flow through in reflection, and described output output starts control signal, load detecting circuit, have first input end, the second input and output, wherein said first input end is coupled to tertiary winding receiving feedback signals, described the second input receives the gate signal of controlling former limit power switch, described output output loading detection signal, selector, has first input end, the second input, control end and output, wherein said first input end is coupled to the output that starts control circuit and receives the startup control signal, and described the second input is coupled to the output receive logic control signal of logical circuit, and described control end is coupled to load detecting circuit and receives load detection signal, described selector is exported when load detection signal is effective and is started control signal, output logic control signal when load detecting circuit is invalid.
According to embodiment of the present utility model, wherein said logical circuit comprises the first rest-set flip-flop, has the set end, reset terminal and output, wherein said set end couples frequency control signal, described reset terminal is coupled to peak comparator and receives peak current control signal, described output output logic control signal.
According to embodiment of the present utility model, wherein said load detecting circuit comprises: the load detecting comparator, have first input end, the second input and output, described first input end receives the second feedback signal, described the second input receives load detecting reference signal, described output output loading comparison signal; Impulse circuit has input and output, and described input receives gate signal, described output output pulse signal; Latch, has the clock end, signal input port and output port, described clock port is coupled to the output return pulse signal of impulse circuit, the output that described signal input port is coupled to the load detecting comparator receives the load comparison signal, and described latch is the output loading detection signal after the clock termination is received pulse signal.
According to embodiment of the present utility model, wherein said startup control circuit comprises: the peak-peak comparator, has first input end, the second input and output, wherein said first input end receives the peak inrush current signal, described the second input received current detection signal, described peak-peak comparator is in output output peak inrush current control signal; Oscillator, output has the clock signal of fixed frequency; The second rest-set flip-flop, have the set end, reset terminal and output, wherein said set end is coupled to oscillator receive clock signal, described reset terminal is coupled to the peak-peak comparator and receives the peak inrush current control signal, and described output output starts control signal.
According to embodiment of the present utility model, wherein said secondary controller comprises: error amplifier, have first input end, the second input and output, wherein said first input end couples the first feedback signal that characterizes output voltage, described the second input receives baseline error signal, described output output error signal; Error comparator has first input end, and the output that the second input and output, wherein said first input end are coupled to error amplifier receives error signal, and described the second input couples modulation signal, described output output the first comparison signal; The first switch has first end, the second end and control end, and wherein said the second termination secondary is with reference to ground, and the output that described control end is coupled to error comparator receives the first comparison signal, and described first end provides frequency modulated signal.
Isolated voltage translator circuit according to the above-mentioned each side of the utility model works system in start-up course, thereby has guaranteed the stability of system in the whole service process.
Description of drawings
Fig. 1 shows the circuit diagram of the isolated voltage changer of controlling on former limit of the prior art;
Fig. 2 shows the electrical block diagram according to the isolated voltage conversion circuit 20 of the utility model one embodiment;
The waveform schematic diagram of each signal when Fig. 3 shows the load saltus step in Fig. 2 circuit;
Fig. 4 shows the electrical block diagram according to the former limit controller 204 of the utility model one embodiment.
Embodiment
The below will describe specific embodiment of the utility model in detail, should be noted that the embodiments described herein only is used for illustrating, and be not limited to the utility model.In the following description, in order to provide thorough understanding of the present utility model, a large amount of specific detail have been set forth.Yet, it is evident that for those of ordinary skills: needn't adopt these specific detail to carry out the utility model.In other examples, for fear of obscuring the utility model, do not specifically describe known circuit, material or method.
In whole specification, " embodiment ", " embodiment ", " example " or mentioning of " example " are meaned: special characteristic, structure or characteristic in conjunction with this embodiment or example description are comprised at least one embodiment of the utility model.Therefore, phrase " in one embodiment ", " in an embodiment ", " example " or " example " that occurs in each place of whole specification differs to establish a capital and refers to same embodiment or example.In addition, can with any suitable combination and/or sub-portfolio with specific feature, structure or property combination in one or more embodiment or example.In addition, it should be understood by one skilled in the art that at this accompanying drawing that provides be all for illustrative purposes, and accompanying drawing is drawn in proportion not necessarily.Should be appreciated that when claiming element " to be connected to " or during " being couple to " another element, it can be directly connect or be couple to another element or can have intermediary element.On the contrary, when claiming element " to be directly connected to " or during " being directly coupled to " another element, not having intermediary element.The identical identical element of Reference numeral indication.Term used herein " and/or " comprise any and all combinations of one or more relevant projects of listing.
Fig. 2 shows the electrical block diagram according to the isolated voltage conversion circuit 20 of the utility model one embodiment.As shown in Figure 2, isolated voltage conversion circuit 20 comprises: input port receives input voltage vin; Output port provides output voltage V o; Transformer T1 has former limit winding L p, secondary winding L s and tertiary winding Lt, wherein, former limit winding L p, secondary winding L s and tertiary winding Lt have respectively first end and the second end, and the first end of described former limit winding L p is coupled to input port to receive input voltage vin; Former limit power switch M1 has first end, the second end and control end, and wherein said first end is coupled to the second end of the former limit winding L p of transformer T1, and described the second termination former limit is with reference to ground PGND; Secondary power switch D1 is coupled between the first end and output port of secondary winding L s of transformer; Secondary controller 202, has power end VCC, the first feedback end FB1 and coupling control end OP, wherein said power end VCC receives output voltage V o, described the first feedback end FB1 receives the first feedback signal Vfb1 that characterizes output voltage V o, based on output voltage V o and the first feedback signal Vfb1, described secondary controller 202 produces frequency modulated signal at coupling control end OP; Coupled apparatus, comprise input side 101-1 and outlet side 101-2, wherein input side 101-1 is coupled between the coupling control end of output port and secondary controller, to receive output voltage V o and frequency modulated signal, described coupled apparatus provides frequency control signal Con based on described output voltage and described frequency modulated signal at its output; Former limit controller 201, has current detecting end CS, frequency control signal end FRE and output Drv, wherein current detecting end CS couples the current detection signal Vcs that characterizes the electric current that flows through former limit winding L p, frequency control signal end FRE is coupled to the outlet side 101-2 receive frequency control signal Con of coupled apparatus, described former limit controller 201 is based on current detection signal Vcs and frequency control signal Con, at its output Drv output gate signal Gate to the control end of former limit power switch M1 to control the break-make of former limit power switch M1; The outlet side 101-2 of wherein said coupled apparatus is coupled in the frequency control signal end FRE of former limit controller 201 and former limit with reference between ground PGND.
As shown in Figure 2, coupled apparatus comprises photoelectric coupled device.The input side 101-1 of described photoelectric coupled device comprises light-emitting diode, and its outlet side 101-2 comprises photistor.The anode of described light-emitting diode is coupled to output port to receive output voltage V o by resistance R 2; Negative electrode is coupled to secondary controller 202, and the frequency modulated signal that coupling control end OP is provided is coupled to photistor.One termination former limit of described photistor is with reference to ground PGND, the described frequency control signal Con of other end output.Described frequency control signal Con has similar waveform to frequency modulated signal, different amplitudes.Wherein resistance R 2 is used for the electric current that light-emitting diode is flow through in restriction.In one embodiment, resistance R 2 can be omitted.Light-emitting diode and resistance R 2 are not limited to the connected mode in embodiment illustrated in fig. 2.In one embodiment, the location swap of resistance R 2 and light-emitting diode.Those of ordinary skills will be appreciated that, the effect of optocoupler and resistance R 2 is for frequency modulated signal is coupled into frequency control signal, thereby offer former limit controller 201, within any connected mode that realizes above-mentioned functions or device (such as hall device) all are included in the utility model scope.The operation principle of photoelectric coupled device is those of ordinary skills' common practise, and is simple and clear for narrating, and no longer elaborates herein.
In one embodiment, described secondary controller 202 comprises: error amplifier 102, have first input end (positive input terminal), the second input (negative input end) and output, wherein said first input end couples the first feedback signal Vfb1 that characterizes output voltage V o, described the second input receives baseline error signal Vref1, based on the first feedback signal Vfb1 and baseline error signal Vref1, described error amplifier 102 is at output output error signal Vc; Error comparator 103, has first input end (negative input end), the second input (positive input terminal) and output, the output that wherein said first input end is coupled to error amplifier 102 receives error signal Vc, described the second input couples modulation signal Vsaw, based on error signal Vc and modulation signal Vsaw, described error comparator 103 is at output output the first comparison signal; The first switch M2, have first end, the second end and control end, wherein said first end is coupled to coupling control end OP, described the second termination secondary is with reference to ground SGND, the output that described control end is coupled to error comparator 103 receives the first comparison signal, based on the first comparison signal, described the first switch M2 or open or turn-off produces frequency modulated signal at described coupling control end OP.
In one embodiment, described secondary controller 202 also comprises modulation signal generator 104.Described modulation signal generator 104 has input and output, and the first end that its input is coupled to secondary power tube D1 receives synchronizing signal, and based on synchronizing signal, described modulation signal generator 104 is at its output output modulation signal Vsaw.The function of described modulation signal generator 104 is: when secondary power tube D1 opened, synchronizing signal was high, and modulation signal Vsaw rises; When modulation signal Vsaw rose to error signal Vc, modulation signal dropped to low level, waited for that when synchronizing signal is high next time, modulation signal Vsaw rises again.Modulation signal generator 104 is the common practise of this area, and is simple and clear for narrating, and no longer sets forth its physical circuit herein.
The generation of modulation signal Vsaw must be based on synchronizing signal.In one embodiment, described modulation signal Vsaw has fixing low level time t in each switch periods.Namely pass through set time t, modulation signal Vsaw begins to rise; When modulation signal Vsaw rises to error signal Vc, become low level.Again pass through set time t, modulation signal Vsaw rises.Above process is gone round and begun again.Described fixedly low level time can be according to the practical situations setting.
In one embodiment, described former limit controller 201 comprises: peak comparator 107, have first input end, the second input and output, wherein said first input end received current detection signal Vcs, described the second input receives peak-current signal Vlim, based on described current detection signal Vcs and peak-current signal Vlim, described peak comparator 107 is at output output peak current control signal Vp; Logical circuit 108, have first input end, the second input and output, wherein first input end is coupled to the outlet side 101-2 receive frequency control signal Con of coupled apparatus, the output that described the second input is coupled to peak comparator 107 receives peak current control signal Vp, based on frequency control signal Con and peak current control signal Vp, described logical circuit 108 is in output output logic control signal 111.In this embodiment, described the first rest-set flip-flop is level triggers.
In one embodiment, the first rest-set flip-flop is pulse-triggered, and frequency control signal Con trailing edge is effective.
In one embodiment, the logic control signal 111 of logical circuit 108 outputs is used as the break-make that gate signal Gate controls former limit power switch M1.Those of ordinary skills should be understood that gate signal Gate usually can be through controlling the break-make of former limit power switch M1 again after driver reinforcement driving force.Driver belongs to the common practise of this area, for simplicity, and not expression in Fig. 2.
In the embodiment shown in Figure 2, frequency control signal Con Low level effective.Logical circuit 108 comprises: the first inverter 109, have input and input, wherein input is coupled to coupled apparatus outlet side 101-2 receive frequency control signal Con, and based on frequency control signal Con, described the first inverter 109 is at the anti-phase frequency control signal of output output; The first rest-set flip-flop 106, have the set end " S ", reset terminal " R " and output " Q ", set end wherein " S " output that is coupled to the first inverter 109 receives anti-phase frequency control signal, reset terminal " R " output that is coupled to peak comparator 107 receives peak current control signal Vp, based on anti-phase frequency control signal and peak current control signal Vp, described the first rest-set flip-flop 106 is in output output logic control signal 111.
Those of ordinary skills will be appreciated that the first inverter 109 can omit in the effective embodiment of frequency control signal Con high level; The first inverter 109 also can be positioned at the first rest-set flip-flop 106 inside, namely the set end be "
", this set end "
" Low level effective.
The waveform schematic diagram of each signal when Fig. 3 shows the load saltus step in isolated voltage conversion circuit 20 shown in Figure 2.Wherein, Iload represents load current, is the electric current that flows through load resistance RL in Fig. 2; GD1 represents the break-make exemplary waveforms of secondary power switch D1, is not concrete signal waveform, and when secondary power switch pipe D1 opened, GD1 was high, and when secondary power switch pipe D1 turn-offed, GD1 was low; Gate represents the output signal of logical circuit 108, the gate signal of former limit power switch M1 namely, and in the embodiment shown in Figure 2, when Gate was high, former limit power switch M1 was open-minded, and Gate is when low, and former limit power switch M1 turn-offs; Vc is error signal; Vsaw is modulation signal; Con is frequency control signal.
The course of work of isolated voltage conversion circuit 20 is described below in conjunction with Fig. 2 and Fig. 3.When isolated voltage conversion circuit 20 steady operation, output voltage V o remains unchanged.T0 constantly, load by heavy duty to the underloading saltus step.Output voltage V o will rise slightly this moment, and the first feedback signal Vfb1 follows rising, cause error signal Vc to rise.Because the rate of rise of modulation signal Vsaw is fixed, thus the time that modulation signal Vsaw rises to error signal Vc increase, the low level time of the first comparison signal of the first comparator 103 outputs is increased.Thereby increased the turn-off time of the first switch M2.Frequency control signal Con is high when switching tube M2 turn-offs, be low level pulse when switching tube M2 conducting, therefore when load is underloading by heavily loaded saltus step, the increase of output voltage will make the high level time of frequency control signal Con increase, and namely the interval of frequency control signal output low level pulse increases.Frequency control signal Con is through after the first inverter 109 anti-phase, and set the first rest-set flip-flop 106 makes logic control signal 111 for high, and namely gate signal Gate be height, thereby opens former limit power switch M1.The prolongation of the interval time of the low level pulse of frequency control signal Con means that the turn-off time of former limit power switch M1 increases.Thereby make in a switch periods, the energy that input voltage is delivered to load RL reduces, to adapt to the decline of load current.At t1 constantly, load is heavy duty by the underloading saltus step, output voltage V o descends, the first feedback signal Vfb1 follows decline, error signal Vc descends, make the turn-off time of the first switch M2 reduce, thereby make the high level time of frequency control signal Con shorten, namely the interval of frequency control signal output low level pulse reduces.Frequency control signal Con is through after the first inverter 109 anti-phase, and set the first rest-set flip-flop 106 makes logic control signal 111 for high, and namely gate signal Gate be height, thereby opens former limit power switch M1.The shortening of the interval time of the low level pulse of frequency control signal Con means that the turn-off time of former limit power switch M1 shortens.Thereby make in a switch periods, the energy that input voltage is delivered to load RL increases, to adapt to the rising of load current.
Due in isolated voltage conversion circuit 20, coupled apparatus is in " free time " state when the first switch M2 is disconnected.Under unloaded and light condition, extend the opening time of the first switch M2, and correspondingly, " free time " state time of coupled apparatus also is extended.Therefore, the power consumption of coupled apparatus and auxiliary circuit thereof (as resistance R 2) reduces greatly, thereby has effectively improved the efficient of isolated voltage conversion circuit.
Fig. 4 shows the electrical block diagram according to the former limit controller 204 of the utility model one embodiment.compare with former limit controller 201, described former limit controller 204 also has the second feedback end FB2, the first end that is coupled to tertiary winding Lt receives the second feedback signal Vfb2, logical circuit 108c in described former limit controller 204 also comprises: load detecting circuit 401, has first input end, the second input and output, wherein said first input end receives the second feedback signal Vfb2, described the second input receives gate signal Gate, based on the second feedback signal Vfb2 and gate signal Gate, described load detecting circuit 401 is at output output loading detection signal 403, start control circuit 402, have input and output, described input received current detection signal Vcs, based on current detection signal Vcs, described startup control circuit starts control signal 404 in output output.
The power end Vcc of secondary controller is coupled to output and receives output voltage V o as supply power voltage.When starting and output voltage V o when on the low side, the frequency control signal Con that the secondary controller may the output error due to electricity shortage.At this moment, former limit controller 204 adopts and starts the break-make that control circuit 402 is controlled former limit power switch M1, the control of the frequency control signal Con of the mistake of shielding secondary controller output.
in one embodiment, described former limit controller 204 also comprises selector 118, has the first input, the second input, control end and output, wherein said first input end is coupled to and starts control circuit 402 reception startup control signals 404, described the second input is coupled to the output receive logic control signal 111 of the first rest-set flip-flop, described control end receives load detection signal 403, based on load detection signal 403, described selector 118 will start control signal 404 or logical control signals 111 and be coupled to output, control former limit power switch M1 as gate signal Gate.
in one embodiment, described selector 118 comprises single-ended commutator (SPDT), described single-ended commutator has first input end, the second input, control end and output, wherein wherein said first input end is coupled to and starts control circuit 402 reception startup control signals 404, described the second input is coupled to the output receive logic control signal 111 of the first rest-set flip-flop, described control end receives load detection signal 403, when load detection signal 403 is effective, described single-pole double-throw switch (SPDT) will start control signal 404 and be coupled to output, control former limit power switch M1 as gate signal Gate, when load detection signal 403 is invalid, described single-pole double-throw switch (SPDT) is coupled to output with the logic control signal 111 of the first rest-set flip-flop output, control former limit power switch M1 as gate signal Gate.
In one embodiment, described load detecting circuit 401 comprises: load detecting comparator 121, have first input end (negative input end), the second input (positive input terminal) and output, described first input end receives the second feedback signal Vfb2, described the second input receives load detecting reference signal Vref2, based on the second feedback signal Vfb2 and load detecting reference signal Vref2, described load detecting comparator 121 output loading comparison signals 125; Impulse circuit 123 has input and output, and described input receives gate signal Gate, based on gate signal Gate, and described output output pulse signal 124; Latch 126, has clock port, signal input port and output port, described clock port is coupled to the output return pulse signal 124 of impulse circuit 123, the output that described signal input port is coupled to load detecting comparator 121 receives load comparison signal 125, based on pulse signal 124 and load comparison signal 125, described latch 126 is at output output loading detection signal 403.
In one embodiment, described load detecting circuit 401 also comprises delay circuit 120, has input and output, and described input receives gate signal Gate, and described output is coupled to the output of impulse circuit.When gate signal Gate closes former limit power switch M1, through the default delay time of delay circuit 120, impulse circuit 123 output pulse signals 124.The second feedback signal Vfb2 is the voltage signal on tertiary winding Lt.Have no progeny when former limit power switch M1 closes, secondary power switch pipe D1 opens, and the second feedback signal Vfb2 saltus step this moment is to output voltage V o.Secondary controller 202 is powered by output voltage V o.If output voltage V o lower (power down when working in circuit start period or output voltage), to such an extent as to secondary controller 202 can't work, frequency control signal Con may be wrong.When the secondary power switch conducting, the second feedback signal Vfb2 is directly proportional to output voltage V o.In one embodiment, o is lower when output voltage V, to such an extent as to when the secondary controller can't normally just done, the second feedback signal Vfb2 was lower than load detecting reference signal Vref2, load detecting comparator 121 overturns.After latch received impulse circuit 123 output pulse signals 124, the load detecting comparison signal that load detecting comparator 121 is exported latched, and output loading detection signal 403 is indicated the state of output voltage V o.Seen from the above description, in each switch periods, load detecting circuit 401 all will detect output voltage V o, if output voltage V o is lower than certain value (the second feedback voltage Vfb 2 is less than load detecting reference signal Vref2), load detection signal 403 will be controlled selector 118 will start the startup control signal 404 of control circuit output as gate signal Gate.The delay time of delay circuit 120 be for signal that latch 126 latchs be to obtain under the stable state of the second feedback signal Vfb2.Those of ordinary skills should be understood that the delay time of load detecting reference signal Vref2 and delay circuit 120 can arrange according to the side circuit applicable cases.
In one embodiment, starting control circuit 402 comprises: peak-peak comparator 119, have first input end, the second input and output, described first input end received current detection signal Vcs, described the second input receives peak-current signal maximum Vlim_max, based on current detection signal Vcs and peak-current signal maximum Vlim_max, described peak-peak comparator 119 is at output output peak inrush current control signal Vmp; Oscillator 114, clock signal Vosc; The second rest-set flip-flop 117, have set end " S ", reset terminal " R " and output " Q ", described set end " S " is coupled to oscillator 114 receive clock signal Vosc, the output that described reset terminal " R " is coupled to peak-peak comparator 119 receives peak inrush current control signal Vmp, based on clock signal Vosc and peak inrush current control signal Vmp, described the second rest-set flip-flop 117 starts control signal 404 in output " Q " output.
In one embodiment, the clock signal Vosc of oscillator 114 outputs has fixed frequency fs_max, i.e. the maximum operation frequency of isolated voltage conversion circuit.Output signal is controlled the set end of the second rest-set flip-flop 117 thereby peak-peak comparator 119 is compared current detection signal Vcs with peak-current signal maximum Vlim_max.
According to the isolated voltage conversion circuit of the embodiment of the present invention, comprise and start control circuit and load detecting circuit, therefore, and when circuit start, effective decision circuitry situation, and enable the startup control circuit, system is worked in start-up course.Thereby guaranteed the stability of system in the whole service process.
Although described the utility model with reference to several exemplary embodiments, should be appreciated that term used is explanation and exemplary and nonrestrictive term.Because the utility model can specifically be implemented in a variety of forms and not break away from spirit or the essence of utility model, so be to be understood that, above-described embodiment is not limited to any aforesaid details, and should be in the spirit and scope that the claim of enclosing limits explain widely, therefore fall into whole variations in claim or its equivalent scope and remodeling and all should be the claim of enclosing and contain.
Claims (5)
1. isolated voltage conversion circuit, described isolated voltage conversion circuit comprises: transformer, former limit power switch, secondary power switch, former limit controller, secondary controller and coupled apparatus, wherein said transformer comprises former limit winding, secondary winding and the tertiary winding, described former limit winding and former limit power switch couple, described secondary winding and secondary power switch couple, described coupled apparatus has input side and outlet side, described input side couples described secondary controller, described outlet side produces frequency control signal, described former limit controller provides gate signal to control the break-make of former limit power switch, it is characterized in that, wherein said former limit controller comprises:
Peak comparator, have first input end, the second input and output, wherein said first input end receives the current detection signal that the electric current of former limit winding is flow through in reflection, described the second input receives peak-current signal, described output output peak current control signal;
Logical circuit has first input end, the second input and output, and wherein said first input end receive frequency control signal, described the second input receives peak current control signal, described output output logic control signal;
Start control circuit, have input and output, described input receives the current detection signal that the electric current of former limit power switch is flow through in reflection, and described output output starts control signal;
Load detecting circuit, have first input end, the second input and output, wherein said first input end is coupled to tertiary winding receiving feedback signals, described the second input receives the gate signal of controlling former limit power switch, described output output loading detection signal;
Selector, has first input end, the second input, control end and output, wherein said first input end is coupled to the output that starts control circuit and receives the startup control signal, and described the second input is coupled to the output receive logic control signal of logical circuit, and described control end is coupled to load detecting circuit and receives load detection signal, described selector is exported when load detection signal is effective and is started control signal, output logic control signal when load detection signal is invalid.
2. isolated voltage conversion circuit as claimed in claim 1, it is characterized in that, wherein said logical circuit comprises the first rest-set flip-flop, has the set end, reset terminal and output, wherein said set end couples frequency control signal, and described reset terminal is coupled to peak comparator and receives peak current control signal, described output output logic control signal.
3. isolated voltage conversion circuit as claimed in claim 1, is characterized in that, wherein said load detecting circuit comprises:
The load detecting comparator has first input end, the second input and output, and described first input end receives the second feedback signal, and described the second input receives load detecting reference signal, described output output loading comparison signal;
Impulse circuit has input and output, and described input receives gate signal, described output output pulse signal;
Latch, has the clock end, signal input port and output port, described clock port is coupled to the output return pulse signal of impulse circuit, the output that described signal input port is coupled to the load detecting comparator receives the load comparison signal, and described latch is the output loading detection signal after the clock termination is received pulse signal.
4. isolated voltage conversion circuit as claimed in claim 1, is characterized in that, wherein said startup control circuit comprises:
The peak-peak comparator, have first input end, the second input and output, wherein said first input end receives the peak inrush current signal, described the second input received current detection signal, described peak-peak comparator is in output output peak inrush current control signal;
Oscillator, output has the clock signal of fixed frequency;
The second rest-set flip-flop, have the set end, reset terminal and output, wherein said set end is coupled to oscillator receive clock signal, described reset terminal is coupled to the peak-peak comparator and receives the peak inrush current control signal, and described output output starts control signal.
5. isolated voltage conversion circuit as described in claim 1 ~ 4 any one, is characterized in that, wherein said secondary controller comprises:
Error amplifier has first input end, the second input and output, and wherein said first input end couples the first feedback signal that characterizes output voltage, and described the second input receives baseline error signal, described output output error signal;
Error comparator has first input end, and the output that the second input and output, wherein said first input end are coupled to error amplifier receives error signal, and described the second input couples modulation signal, described output output the first comparison signal;
The first switch has first end, the second end and control end, and wherein said the second termination secondary is with reference to ground, and the output that described control end is coupled to error comparator receives the first comparison signal, and described first end provides frequency modulated signal.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108696164A (en) * | 2018-08-22 | 2018-10-23 | 西华大学 | The single-phase photovoltaic grid-connected Miniature inverter of flyback and control method of DCM frequency control |
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2012
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108696164A (en) * | 2018-08-22 | 2018-10-23 | 西华大学 | The single-phase photovoltaic grid-connected Miniature inverter of flyback and control method of DCM frequency control |
| CN108696164B (en) * | 2018-08-22 | 2024-01-05 | 西华大学 | Flyback single-phase photovoltaic grid-connected micro inverter controlled by DCM frequency conversion and control method |
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