CN202677389U

CN202677389U - Serial port expansion structure

Info

Publication number: CN202677389U
Application number: CN 201220326183
Authority: CN
Inventors: 高万堂; 郭明杰; 廖志清; 陈志君; 戴祥; 罗涛; 杨媛; 孙树会
Original assignee: Chengdu Meye Technology Co Ltd
Current assignee: Chengdu Meye Technology Co Ltd
Priority date: 2012-07-06
Filing date: 2012-07-06
Publication date: 2013-01-16
Anticipated expiration: 2022-07-06

Abstract

The utility model relates to the technology of serial port expansion, and in particular relates to a serial port expansion structure which is characterized in that each serial port of a central processing unit (CPU) is correspondingly connected with an analog switch, and is connected with a physical level conversion chip or a physical level conversion circuit by the corresponding analog switch; the 2N analog switches are available, wherein N is an integer which is more than or equal to 1; and the physical level conversion chip can be an RS 232, an RS 485, a photovoltaic conversion chip or the like; the physical level conversion circuit is formed by an optocoupler, a triode or a diode, and a resistor and a capacitor of the optocoupler, the triode or the diode, and the like. The serial port expansion structure is simple in structure, lower in cost, easy to use on various occasions on a large scale, stable and reliable; and furthermore, the serial port expansion structure is better in data continuity, and completely avoids the phenomenon of data miss in the working period.

Description

A kind of serial ports expansion structure

Technical field

The utility model relates to Serial Port expanding technology, particularly a kind of serial ports expansion structure.

Background technology

For the electronic technology of develop rapidly, serial line interface is as a kind of use of main communication modes, and is more and more general, causes many occasions that the expansion of serial ports has been proposed requirement.

Can be summarized as following two classes in existing Serial Port expanding technology: a kind of is the mode that adopts the outside serial ports time-sharing multiplex of multichannel, and a kind of is the mode of bus extended serial port chip.

For the time-sharing multiplex mode, be that each work of a plurality of work is divided into a plurality of time periods, then each time period cross-reference of each work.This mode can only be used for that communications protocol is certain, the similarly specific occasion of communication modes, can not be used in especially the initiatively occasion of broadcast transmission data of external unit, and is can not resolution protocol indefinite, particularly the occasion of external unit broadcast transmission data.

For the mode of bus extended serial port chip, such as the multi-serial-port card in the computer system, its cost is relatively costly, complex structure, and the more occasion of external unit that connects for need especially, its price is multiplied especially, and this is unfavorable for using in a large number in various occasions.

Therefore need another kind of serial ports expansion structure, moderate cost can be applicable to various occasions.

The utility model content

For the deficiency of the technology that has the extended serial port mode now, a kind of serial ports expansion method and apparatus that the utility model proposes, cost is lower, and is reliable and stable, is easy to be used in a large number various occasions.

The technical solution adopted in the utility model is a kind of serial ports expansion structure, it is characterized in that: each serial ports correspondence of CPU is connected with analog switch, connects conversion physical level conversion chip or change-over circuit by analog switch, and described analog switch is 2N, N 〉=1 wherein, N is integer.

CPU contains n separate physical serial ports, n 〉=1 wherein, and n is integer.

Further, m CPU connects to form by internal bus, m 〉=1 wherein, and m is integer.

Described physical level conversion chip can be the chips such as RS232, RS485 or opto-electronic conversion.

Described physical level change-over circuit can be the level shifting circuit that optocoupler, triode or diode and resistance capacitance thereof etc. form.

The universal input of described CPU or output are connected to gating position and the enable bit of analog switch.

The beneficial effects of the utility model are as follows:

The utility model is simple in structure, and cost is lower, is easy to be used in a large number various occasions, and is reliable and stable; And the utility model data continuity is better, has avoided missing during operation the situation of data fully.

Description of drawings

Fig. 1 is the utility model circuit system structural representation

Fig. 2 is a kind of implementing circuit structural representation of the many CPU of the utility model

Fig. 3 is a kind of implementing circuit structural representation of the utility model list CPU

Wherein Reference numeral is: U, U0, U1, U2, U3 are CPU, and COM0, COM1, COM2 are serial ports, and K01, K02, K11, K12, K21, K22, U4, U5 are analog switch, and GPIO is universal input or output, and ZSDL is the communication indicating circuit; XP01, XP02 among Fig. 1 ..., XP08, XP11, XP12 ..., XP18, XP21, XP22 ..., XP28 is interface chip, XP200, XP201 among Fig. 2, XP221, XP222 ..., XP228 is interface chip, XP300, XP301 among Fig. 3, XP321, XP322 ..., XP328.

Embodiment

Embodiment 1

As shown in Figure 1, to the explanation of the utility model circuit system structural representation, n=3 in this example:

Central processing unit U has 3 serial communication interface COM0, COM1, COM2,3 kinds of dissimilar external communications equipments of 3 separate connections of communication interface, every kind of external communications equipment can connect 1 ~ 32, according to the difference of external communications equipment, interface chip XP01, XP02 ..., XP08, XP11, XP12 ..., XP18, XP21, XP22 ..., XP28 can be the level shifting circuit that RS232, RS485, opto-electronic conversion chip or optocoupler, triode, diode and resistance capacitance thereof etc. form.Central processing unit image data, deal with data and the external device data that is forwarded to one of them mouthful realize that the data between several kind equipments are transmitted mutually to other two types of external units of residue.

The concrete connection of this structure is as follows:

(1) the serial ports COM0 of CPU is connected to conversion physical level conversion chip by analog switch K01, K02;

(2) the serial ports COM1 of CPU by analog switch K11, K12 be connected to conversion physical level conversion chip XP01, XP02 ..., XP08;

(3) the serial ports COM2 of CPU is connected to conversion physical level conversion chip by analog switch K21, K22;

(4) the serial ports COM0 of CPU and serial ports COM1, serial ports COM2 also can partly or entirely be connected directly to conversion physical level conversion chip;

(5) GPIO of CPU is connected to analog switch gating position and enable bit;

(6) CPU passes through bus exchanging data each other;

(7) the described analog switch in above-mentioned (1) ~ (5) has K01, K02, K11, K12, K21, K22.

The utility model also is connected with communication indicating circuit ZSDL, and the utility model can be processed dissimilar data stream quickly and easily by different serial ports.

Embodiment 2

As shown in Figure 2, be a concrete application example of the present utility model: the electrical block diagram of many CPU, m=4 in this example.

Central processor CPU is respectively U0 ~ U3 in this example, use and be C8051F310, adopt I2C bus and spi bus to interconnect the realization data sharing between 4 CPU, wherein U0 is that primary controller is controlled the communication between other CPU, the independent serial ports output of each serial ports COM0, COM1 of U0, U1, U2, U3, COM2 is connected with respectively interface chip XP200, XP201.The serial ports that in this example only is U3 has been expanded the output of serial ports by U4, U5 analog switch CD4051, be connected with respectively interface chip XP221, XP222 ..., XP228, adopt MAX3232E to export as RS232.All CPU also are connected with communication indicating circuit ZSDL.

Embodiment 3

As shown in Figure 3, be a concrete application example of the utility model: the electrical block diagram of single CPU.

In this example, U is central processor CPU, and model is C8051F340, comprises two serial ports COM1, COM2, and these two serial ports COM1, COM2 directly are connected with interface chip XP300, XP301, and interface chip XP300, XP301 adopt MAX3232; U also comprises the 3rd serial ports COM3, adopt the simulation of I/O mouth, through analog switch U6, U7 expansion, analog switch 6, U7 adopt UCD4051, with interface chip XP321, XP322 ..., XP328 connects, interface chip XP321, XP322 ..., XP328 adopts MAX232.

Claims

1. serial ports expansion structure, it is characterized in that: each serial ports correspondence of CPU is connected with analog switch, connects conversion physical level conversion chip by analog switch, and described analog switch is 2N, N 〉=1 wherein, N is integer.

2. a kind of serial ports expansion structure according to claim 1, it is characterized in that: CPU contains n separate physical serial ports, n 〉=1 wherein, n is integer.

3. a kind of serial ports expansion structure according to claim 1 and 2, it is characterized in that: m CPU connects to form by internal bus, m 〉=1 wherein, m is integer.

4. a kind of serial ports expansion structure according to claim 1 is characterized in that: described physical level conversion chip employing RS232 chip.

5. a kind of serial ports expansion structure according to claim 1 is characterized in that: described physical level conversion chip employing RS485 chip.

6. a kind of serial ports expansion structure according to claim 1 is characterized in that: described physical level conversion chip employing opto-electronic conversion chip.

7. a kind of serial ports expansion structure according to claim 1, it is characterized in that: the universal input of described CPU or delivery outlet are connected to gating position and the enable bit of analog switch.