CN202632346U - Voltage stabilizer for medium-high frequency interface in electronic tag - Google Patents

Voltage stabilizer for medium-high frequency interface in electronic tag Download PDF

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Publication number
CN202632346U
CN202632346U CN 201220316350 CN201220316350U CN202632346U CN 202632346 U CN202632346 U CN 202632346U CN 201220316350 CN201220316350 CN 201220316350 CN 201220316350 U CN201220316350 U CN 201220316350U CN 202632346 U CN202632346 U CN 202632346U
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CN
China
Prior art keywords
nmos pipe
nmos
voltage
pmos
tube
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Expired - Fee Related
Application number
CN 201220316350
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Chinese (zh)
Inventor
曾维亮
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Chengdu Hongshan Technology Co Ltd
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Chengdu Hongshan Technology Co Ltd
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Application filed by Chengdu Hongshan Technology Co Ltd filed Critical Chengdu Hongshan Technology Co Ltd
Priority to CN 201220316350 priority Critical patent/CN202632346U/en
Application granted granted Critical
Publication of CN202632346U publication Critical patent/CN202632346U/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

The utility model discloses a voltage stabilizer for a medium-high frequency interface in an electronic tag. The voltage stabilizer comprises a first resistor, a first P-channel metal oxide semiconductor (PMOS) tube and a first N-channel metal oxide semiconductor (NMOS) tube, wherein two ends of the first resistor is respectively connected with a source electrode of the first PMOS tube and a drain electrode of the first NMOS tube, a source electrode of the first NMOS tube is grounded, the first PMOS tube is a metal oxide semiconductor (MOS) tube connected with a diode, and a grid electrode of the first NMOS tube is connected with a grid electrode of the first PMOS tube. A direct current voltage input line is connected onto a line between the drain electrode of the first NMOS tube and the first resistor, and a direct current voltage output line is connected onto a line between the source electrode of the first PMOS tube and the first resistor. By adopting the structure, the voltage stabilizer is simple in whole structure and convenient to achieve. The voltage stabilizer can avoid voltage discharge and hopping through the action of the first PMOS tube and the first NMOS tube and further avoid demodulation failure.

Description

The voltage stabilizer that is used for electronic tag medium-high frequency interface
Technical field
The utility model relates to the radio-frequency technique field, specifically is the voltage stabilizer that is used for electronic tag medium-high frequency interface.
Background technology
Along with the fast development of electronic technology and improving constantly of manufacture level; The REID development of adopting radio to realize is swift and violent; Radio frequency recognizing electronic label is as a kind of non-contact IC card; It combines radiotelegraphy and IC technology, through the automatic recognition objective object of radiofrequency signal and obtain related data.The high frequency interface of electronic tag forms the high-frequency transmission path from the reader to the electronic tag in the radio-frequency recognition system, high frequency interface ABSORPTION CURRENT from its antenna, and with after the current commutates voltage stabilizing that absorbs as the power supply of chip in the electronic tag.Be provided with voltage stabilizer in the high frequency interface; Voltage stabilizer is mainly used in the direct supply overtension that prevents after the rectification; And too high DC voltage released, existing voltage stabilizer is through supply voltage and certain normal voltage are compared, and then obtains the voltage that need release; The discharge voltage that obtains like this has the process of a unexpected saltus step of voltage; Make the change amount of leakage current before and after saltus step bigger, this possibly make that the depth of modulation that receives signal is very little in certain section field strength range, and then can cause the demodulation failure.
The utility model content
The purpose of the utility model is to overcome the deficiency of prior art, provides when input direct voltage is too high, voltage is released can avoid discharge voltage the voltage stabilizer that is used for electronic tag medium-high frequency interface of saltus step to occur.
The purpose of the utility model mainly realizes through following technical scheme: the voltage stabilizer that is used for electronic tag medium-high frequency interface; Comprise first resistance, PMOS pipe and NMOS pipe; Drain electrode is connected with NMOS pipe with PMOS pipe source electrode respectively at the said first resistance two ends; The source ground of the one NMOS pipe, the metal-oxide-semiconductor that said PMOS pipe connects for diode, a NMOS tube grid is connected with the drain electrode of PMOS pipe; Be connected with the DC voltage incoming line on the circuit between the drain electrode of said NMOS pipe and first resistance, be connected with the DC voltage output line on the circuit between the said PMOS pipe source electrode and first resistance.The metal-oxide-semiconductor that diode connects in the utility model is that grid and the drain electrode with metal-oxide-semiconductor links together; Because there is leakage current in metal-oxide-semiconductor under certain voltage; So the metal-oxide-semiconductor that diode connects in the utility model is used for simulating the resistance that resistance is very big, and can realize control through the parameter of adjustment metal-oxide-semiconductor to resistance.DC voltage incoming line in the utility model receives the DC voltage after the rectification of high frequency interface, the DC voltage output of DC voltage output line after with voltage stabilizing.
The voltage stabilizer that is used for electronic tag medium-high frequency interface; Also comprise the 2nd NMOS pipe, the 3rd NMOS pipe and the 4th NMOS pipe; Said the 2nd NMOS pipe, the 3rd NMOS pipe and the 4th NMOS pipe three's grid all is connected first resistance and connects on the end of NMOS pipe drain electrode; The drain electrode of said the 2nd NMOS pipe is connected with the circuit that a NMOS tube grid and a PMOS manage between the drain electrode; The source electrode of the 3rd NMOS pipe is connected with the 2nd NMOS pipe source electrode with the drain electrode of the 4th NMOS pipe respectively with drain electrode, and the 4th NMOS manages source ground.The circuit that the 2nd NMOS pipe, the 3rd NMOS pipe and the 4th NMOS pipe connect in the utility model constitutes current foldback circuit.
Be connected with first electric capacity on the said DC voltage output line, the other end that said first electric capacity connects the DC voltage output line terminal relatively is connected with NMOS pipe source electrode.The utility model carries out filtering through first resistance and first electric capacity to the DC voltage of importing, filtering HFS wherein, thus make the DC voltage of output more steady, first electric capacity can receive the electric current of releasing.
Compared with prior art; The utlity model has following beneficial effect: the utility model comprises first resistance, PMOS pipe and NMOS pipe; The utility model is released to DC voltage through NMOS pipe when output dc voltage is too high; Thereby reach the purpose that reduces voltage, under the effect of PMOS pipe, the voltage of importing a NMOS tube grid is steady; Saltus step appears in voltage in the time of avoiding discharge voltage, and then can avoid failing in the bigger demodulation that causes of the change amount before and after the saltus step because of leakage current.
Description of drawings
Fig. 1 is the structural representation of the utility model embodiment.
The pairing name of Reference numeral is called in the accompanying drawing: R1-first resistance, P1-the one PMOS pipe, N1-the one NMOS pipe, N2-the 2nd NMOS pipe, N3-the 3rd NMOS pipe, N4-the 4th NMOS pipe, 1-DC voltage incoming line, 2-DC voltage output line.
Embodiment
Below in conjunction with embodiment and accompanying drawing the utility model is done further to specify, but the embodiment of the utility model is not limited thereto.
Embodiment:
As shown in Figure 1; The voltage stabilizer that is used for electronic tag medium-high frequency interface; Comprise first resistance R 1, first capacitor C 1 and five metal-oxide-semiconductors, wherein, five metal-oxide-semiconductors comprise a PMOS pipe and four NMOS pipe; A PMOS pipe is PMOS pipe P1, and the four NMOS pipe is respectively NMOS pipe N1, the 2nd NMOS pipe N2, the 3rd NMOS pipe N3 and the 4th NMOS pipe N4.The one PMOS pipe P1 is the metal-oxide-semiconductor that diode connects, and the grid that is specially PMOS pipe P1 is connected with its source electrode.Drain electrode is connected with NMOS pipe N1 with PMOS pipe P1 source electrode respectively at first resistance R, 1 two ends, the source ground of NMOS pipe N1, and NMOS pipe N1 grid is connected with PMOS pipe P1 drain electrode.Be connected with on the circuit between DC voltage incoming line 1, the one PMOS pipe P1 source electrode and first resistance R 1 on the circuit between the N1 drain electrode of the one NMOS pipe and first resistance R 1 and be connected with DC voltage output line 2.
The 2nd NMOS pipe N2, the 3rd NMOS pipe N3 and the 4th NMOS pipe N4 three's grid all is connected first resistance R 1 and connects on the end of NMOS pipe N1 drain electrode; The 2nd NMOS pipe N2 drain electrode is connected with the circuit that a NMOS pipe N1 grid and a PMOS manage between the N1 drain electrode; The source electrode of the 3rd NMOS pipe N3 is connected the 4th NMOS pipe N4 source ground with the 4th NMOS pipe N4 drain electrode respectively with drain electrode with the 2nd NMOS pipe N2 source electrode.The other end that first capacitor C 1 connects DC voltage output line 2 ends relatively is connected with NMOS pipe N1 source electrode.
As stated, then can well realize the utility model.

Claims (3)

1. the voltage stabilizer that is used for electronic tag medium-high frequency interface; It is characterized in that: comprise first resistance (R1), PMOS pipe (P1) and NMOS pipe (N1); Said first resistance (R1) two ends are managed (N1) drain electrode with PMOS pipe (P1) source electrode with a NMOS respectively and are connected; The source ground of the one NMOS pipe (N1), the metal-oxide-semiconductor that said PMOS pipe (P1) connects for diode, NMOS pipe (N1) grid are managed (P1) drain electrode with a PMOS and are connected; Be connected with DC voltage incoming line (1) on the circuit between said NMOS pipe (N1) drain electrode and first resistance (R1), be connected with DC voltage output line (2) on the circuit between said PMOS pipe (P1) source electrode and first resistance (R1).
2. the voltage stabilizer that is used for electronic tag medium-high frequency interface according to claim 1; It is characterized in that: also comprise the 2nd NMOS pipe (N2), the 3rd NMOS pipe (N3) and the 4th NMOS pipe (N4); Said the 2nd NMOS pipe (N2), the 3rd NMOS pipe (N3) and the 4th NMOS pipe (N4) three's grid all is connected first resistance (R1) and connects on the end of NMOS pipe (N1) drain electrode; Said the 2nd NMOS pipe (N2) drain electrode is connected with the circuit that NMOS pipe (N1) grid and a PMOS manage between (N1) drain electrode; The source electrode of the 3rd NMOS pipe (N3) is connected with the 2nd NMOS pipe (N2) source electrode with the 4th NMOS pipe (N4) drain electrode respectively with drain electrode, and the 4th NMOS manages (N4) source ground.
3. the voltage stabilizer that is used for electronic tag medium-high frequency interface according to claim 1 and 2; It is characterized in that: be connected with first electric capacity (C1) on the said DC voltage output line (2), the other end that said first electric capacity (C1) connects DC voltage output line (2) end is relatively managed (N1) source electrode with a NMOS and is connected.
CN 201220316350 2012-07-03 2012-07-03 Voltage stabilizer for medium-high frequency interface in electronic tag Expired - Fee Related CN202632346U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 201220316350 CN202632346U (en) 2012-07-03 2012-07-03 Voltage stabilizer for medium-high frequency interface in electronic tag

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 201220316350 CN202632346U (en) 2012-07-03 2012-07-03 Voltage stabilizer for medium-high frequency interface in electronic tag

Publications (1)

Publication Number Publication Date
CN202632346U true CN202632346U (en) 2012-12-26

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CN 201220316350 Expired - Fee Related CN202632346U (en) 2012-07-03 2012-07-03 Voltage stabilizer for medium-high frequency interface in electronic tag

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103529888A (en) * 2012-07-03 2014-01-22 成都市宏山科技有限公司 Voltage stabilizer for medium-high frequency interface of electronic label

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103529888A (en) * 2012-07-03 2014-01-22 成都市宏山科技有限公司 Voltage stabilizer for medium-high frequency interface of electronic label

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C14 Grant of patent or utility model
GR01 Patent grant
C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20121226

Termination date: 20130703