CN202550983U - Monostable trigger capable of long-time delay - Google Patents
Monostable trigger capable of long-time delay Download PDFInfo
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- CN202550983U CN202550983U CN 201220071008 CN201220071008U CN202550983U CN 202550983 U CN202550983 U CN 202550983U CN 201220071008 CN201220071008 CN 201220071008 CN 201220071008 U CN201220071008 U CN 201220071008U CN 202550983 U CN202550983 U CN 202550983U
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Abstract
The utility model discloses a monostable trigger capable of long-time delay. The monostable trigger capable of the long-time delay comprises a first capacitor, a second capacitor, a third capacitor, a first diode, a second diode, a third diode, a first triode, a second triode, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor and an eighth resistor. When the first triode is disconnected and the second triode is communicated, a circuit stable state is achieved, then collector potential of the first triode is close to an anode of a power supply, and thus the second triode which is in a communicated state acquires adequate base current from the power supply through the seventh resistor to achieve saturation; and when negative pulse is led into a base electrode of the second triode, the second triode is disconnected, the first triode is communicated, and a circuit turns over. Compared with an ordinary fixed pulse width shaper, the monostable trigger capable of long-time delay can achieve the long-time delay, a program control circuit is easy to constitute, and the monostable trigger capable of the long-time delay can play roles better.
Description
Technical field
The utility model relates to a kind of monostable flipflop, relates in particular to a kind of monostable flipflop that can delay time for a long time.
Background technology
Common monostable flipflop can not be accomplished the time-delay of long period, is difficult to form practical sequence circuit, therefore is difficult to the effect of perfect performance monostable flipflop in circuit.
Summary of the invention
The purpose of the utility model provides a kind of monostable flipflop that can delay time for a long time with regard to being in order to address the above problem.
The utility model is realized above-mentioned purpose through following technical scheme:
The utility model comprises first electric capacity, second electric capacity, the 3rd electric capacity, first diode, second diode, the 3rd diode, first triode, second triode, first resistance, second resistance, the 3rd resistance, the 4th resistance, the 5th resistance, the 6th resistance, the 7th resistance and the 8th resistance; First end of said first electric capacity is connected with input signal; Second end of said first electric capacity is connected with first end of said first resistance and the negative pole of said the 3rd diode simultaneously; Said first resistance the second end ground connection; The anodal of said the 3rd diode is connected with the negative pole of the base stage of said second triode, said second diode and first end of said the 6th resistance simultaneously; The grounded emitter of said second triode; The collector electrode of said second triode is connected with first end of first end of said the 7th resistance, said the 3rd electric capacity and first end of said the 8th resistance simultaneously; Said the 3rd electric capacity second end simultaneously with said the 7th resistance second end, first end of said second resistance and the base stage of said first triode be connected; Said second resistance second end be connected with the negative pole of DC power supply; The grounded emitter of said first triode; The collector electrode of said first triode is connected with the negative pole of first end of said the 6th resistance, said first diode and first end of said the 3rd resistance simultaneously; The anodal of said first diode is connected with first end of said the 4th resistance and first end of said second electric capacity simultaneously, said second electric capacity second end be connected with first end of said the 5th resistance with the volume of said second diode is anodal simultaneously, the positive pole while of said DC power supply and said the 8th resistance second end, said the 5th resistance second end, said the 4th resistance second end and said the 3rd resistance second end be connected; Said first triode and said second triode are NPN type triode.
The beneficial effect of the utility model is:
The utility model is compared the time-delay that common monostable flipflop can be accomplished the long period, forms sequence circuit easily, and plays a role preferably.
Description of drawings
Accompanying drawing is the circuit structure schematic diagram of the utility model.
Embodiment
Below in conjunction with accompanying drawing the utility model is described further:
Shown in accompanying drawing: the utility model comprises first capacitor C 1, second capacitor C 2, the 3rd capacitor C 3, the first diode VD1, the second diode VD2, the 3rd diode VD3, the first triode VT1, the second triode VT2, first resistance R 1, second resistance R 2, the 3rd resistance R 3, the 4th resistance R 4, the 5th resistance R 5, the 6th resistance R 6, the 7th resistance R 7 and the 8th resistance R 8; First end of first capacitor C 1 is connected with input signal; Second end of first capacitor C 1 is connected with first end of first resistance R 1 and the negative pole of the 3rd diode VD3 simultaneously; First resistance R 1 the second end ground connection; The anodal of the 3rd diode VD3 is connected with the base stage of the second triode VT2, the negative pole of the second diode VD2 and first end of the 6th resistance R 6 simultaneously; The grounded emitter of the second triode VT2; The collector electrode of the second triode VT2 is connected with first end of the 7th resistance R 7, first end of the 3rd capacitor C 3 and first end of the 8th resistance R 8 simultaneously; The 3rd capacitor C 3 second end simultaneously with the 7th resistance R 7 second end, first end of second resistance R 2 and the base stage of the first triode VT1 be connected; Second resistance R 2 second end be connected with the negative pole of DC power supply; The grounded emitter of the first triode VT1; The collector electrode of the first triode VT1 is connected with first end of the 6th resistance R 6, the negative pole of the first diode VD1 and first end of the 3rd resistance R 3 simultaneously; The anodal of the first diode VD1 is connected with first end of the 4th resistance R 4 and first end of second capacitor C 2 simultaneously, second capacitor C 1 second end be connected with first end of the 5th resistance R 5 with the volume of the second diode VD2 is anodal simultaneously, the positive pole while of DC power supply and the 8th resistance R 8 second end, the 5th resistance R 5 second end, the 4th resistance R 4 second end and the 3rd resistance R 3 second end be connected; The first triode VT1 and the second triode VT3 are NPN type triode.
Shown in accompanying drawing: the circuit stable state is that the first triode VT1 ends, the second triode VT2 conducting; At this moment the first triode VT1 collector potential is near positive source+Ec; Therefore the second triode VT2 of conducting state obtains enough base currents through the 7th resistance R 7 from power supply to reach capacity, and after negative pulse was introduced the second triode VT2 base stage, the second triode VT2 ended; The first triode VT1 conducting, the circuit upset.This moment, the second triode VT2 collector potential was dropped near there not being voltage by+Ec, thereby did not almost have electric current to flow through on the 6th resistance R 6, so the second triode VT2 base potential also approaches not have voltage, had guaranteed that the second triode VT2 ends.The first triode VT1 is by after conducting; Because voltage across capacitor can not suddenly change, the second diode VD2 instead ends partially, along with the discharge of first capacitor C 1 through the 5th resistance R 5, the first diode VD1, the first triode VT1 and power supply; Current potential rises gradually; When reaching 0.5V, the second triode VT2 conducting, the first triode VT1 follow, and monostable returns to original state.
Shown in accompanying drawing: the effect of the second diode VD2 is to prevent first capacitor C 1 and 7 discharges of the 7th resistance R; So want the forward resistance of the second diode VD2 little; It is big that backward resistance is wanted, in order to avoid because the reverse leakage electric current of the second diode VD2 makes delay time short, because when being provided with the second triode VT2 conducting dexterously; The 7th resistance R 7 these base current paths; So it is very big that the discharge resistance R6 of first capacitor C 1 can obtain, and do not receive the restriction of the second triode VT2 saturation conditions, thereby the time-delay of this monostable circuit can be very long.If improve the accuracy of time-delay, first capacitor C 1 can adopt tantalum electric capacity, and the 5th resistance R 5 should adopt metalfilmresistor.
Claims (2)
1. the monostable flipflop that can delay time for a long time; It is characterized in that: comprise first electric capacity, second electric capacity, the 3rd electric capacity, first diode, second diode, the 3rd diode, first triode, second triode, first resistance, second resistance, the 3rd resistance, the 4th resistance, the 5th resistance, the 6th resistance, the 7th resistance and the 8th resistance; First end of said first electric capacity is connected with input signal; Second end of said first electric capacity is connected with first end of said first resistance and the negative pole of said the 3rd diode simultaneously; Said first resistance the second end ground connection; The anodal of said the 3rd diode is connected with the negative pole of the base stage of said second triode, said second diode and first end of said the 6th resistance simultaneously; The grounded emitter of said second triode; The collector electrode of said second triode is connected with first end of first end of said the 7th resistance, said the 3rd electric capacity and first end of said the 8th resistance simultaneously; Said the 3rd electric capacity second end simultaneously with said the 7th resistance second end, first end of said second resistance and the base stage of said first triode be connected; Said second resistance second end be connected with the negative pole of DC power supply; The grounded emitter of said first triode; The collector electrode of said first triode is connected with the negative pole of first end of said the 6th resistance, said first diode and first end of said the 3rd resistance simultaneously; The anodal of said first diode is connected with first end of said the 4th resistance and first end of said second electric capacity simultaneously, said second electric capacity second end be connected with first end of said the 5th resistance with the volume of said second diode is anodal simultaneously, the positive pole while of said DC power supply and said the 8th resistance second end, said the 5th resistance second end, said the 4th resistance second end and said the 3rd resistance second end be connected.
2. ability according to claim 1 prolongs fixed pulse width reshaper for a long time, and it is characterized in that: said first triode and said second triode are NPN type triode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220071008 CN202550983U (en) | 2012-02-29 | 2012-02-29 | Monostable trigger capable of long-time delay |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220071008 CN202550983U (en) | 2012-02-29 | 2012-02-29 | Monostable trigger capable of long-time delay |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202550983U true CN202550983U (en) | 2012-11-21 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201220071008 Expired - Fee Related CN202550983U (en) | 2012-02-29 | 2012-02-29 | Monostable trigger capable of long-time delay |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN202550983U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106026982A (en) * | 2016-07-11 | 2016-10-12 | 湖北大学 | Monostable trigger |
| CN115589217A (en) * | 2022-12-07 | 2023-01-10 | 深圳飞骧科技股份有限公司 | RC oscillating circuit |
-
2012
- 2012-02-29 CN CN 201220071008 patent/CN202550983U/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106026982A (en) * | 2016-07-11 | 2016-10-12 | 湖北大学 | Monostable trigger |
| CN106026982B (en) * | 2016-07-11 | 2018-09-25 | 湖北大学 | A kind of monostable flipflop |
| CN115589217A (en) * | 2022-12-07 | 2023-01-10 | 深圳飞骧科技股份有限公司 | RC oscillating circuit |
| CN115589217B (en) * | 2022-12-07 | 2023-03-24 | 深圳飞骧科技股份有限公司 | RC oscillating circuit |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20121121 Termination date: 20130229 |