CN202549840U - 多晶片集成式白光led封装结构 - Google Patents

多晶片集成式白光led封装结构 Download PDF

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CN202549840U
CN202549840U CN201220148153.7U CN201220148153U CN202549840U CN 202549840 U CN202549840 U CN 202549840U CN 201220148153 U CN201220148153 U CN 201220148153U CN 202549840 U CN202549840 U CN 202549840U
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wafer
main body
led
water layer
light
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程志坚
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SHENZHEN SMALITE OPTO-ELECTRONIC Co Ltd
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SHENZHEN SMALITE OPTOELECTRONICS CO Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate

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  • Led Device Packages (AREA)

Abstract

本实用新型涉及一种多晶片集成式白光LED封装结构，包括支架（10）、多颗LED晶片（20）和金线（30）；支架（10）包括导热基板（11）和封装本体（12），该封装本体（12）上设有正电极（41）和负电极（42），封装本体（12）的中部掏空成四方通孔（121），导热基板（11）上表面的固晶区（111）对准四方通孔（121）；多颗LED晶片（20）以阵列排列的形式固定在固晶区（111）内，再借助金线（30）焊接形成先串后并的电连接；各LED晶片（20）上覆盖有透明胶水层（50），该透明胶水层（50）上覆盖有荧光胶水层（60）。本实用新型具有光衰慢、成本低且稳定性好等优点。

Description

多晶片集成式白光LED封装结构
技术领域 本实用新型涉及至少有一个电位跃变势垒或表面势垒的适用于光发射的半导体器件封装结构，特别是涉及集成式白光LED封装结构。
背景技术 近年来，LED（Light Emitting Diode，发光二极管）的应用得到飞速的发展。为了适应更多场合更高功率的需要，出现了多晶片集成式LED封装结构，从5W-300W都有。现有技术多晶片集成式白光LED封装结构一般都是在LED晶片上覆盖荧光胶层，且该荧光胶层也同时兼做灌封胶的用途。这种多晶片集成式白光LED封装结构存在的不足之处是：1.采用多颗芯片集成封装，产品工作功率大，产生热量也大，尤其是晶片表面的温度就更高，而荧光胶直接与晶片接触，荧光胶中的荧光粉在高温下容易老化失效，导致产品光衰快，且容易使产品的色温漂移；2.相对而言，荧光粉的价格较高，全部采用荧光胶，荧光粉用量大，导致产品成本高。
实用新型内容 本实用新型要解决的技术问题在于避免上述现有技术的不足之处而提出一种光衰慢、成本低且稳定性好的多晶片集成式白光LED封装结构。
本实用新型解决所述技术问题可以通过采用以下技术方案来实现：
设计、制作一种多晶片集成式白光LED封装结构，包括支架、多颗LED晶片和金线；所述支架包括导热基板和封装本体，该封装本体上设有正电极和负电极，所述封装本体的中部掏空成四方通孔，导热基板上表面的中间区域也即固晶区对准所述四方通孔，使固晶区周边形成一圈台面，台面的高度低于封装本体四周边的高度；多颗LED晶片以阵列排列的形式固定在所述固晶区内，再借助金线焊接形成先串后并的电连接；各所述LED晶片上先覆盖有透明胶水层，该透明胶水层上又覆盖有荧光胶水层。
所述透明胶水层盖过金线的最高高度，所述荧光胶水层的高度与封装本体四周边的高度齐平。
同现有技术相比较，本实用新型多晶片集成式白光LED封装结构的技术效果在于：1.由于在晶片上先覆盖一层透明胶水层，再覆盖荧光胶水层，避免了荧光粉直接与晶片表面接触，在应用中，荧光粉工作在较低的温度环境中，不容易失效，因此产品的光衰慢，寿命长，稳定性好；2.荧光粉用量相对少，产品成本低。
附图说明
图1是本实用新型多晶片集成式白光LED封装结构实施例的俯视结构示意图；
图2是本实用新型多晶片集成式白光LED封装结构实施例的剖视结构示意图。
具体实施方式 以下结合附图所示之优选实施例作进一步详述。
本实用新型多晶片集成式白光LED封装结构实施例，如图1和2所示，一种多晶片集成式白光LED封装结构，包括支架10、多颗LED晶片20和金线30；所述支架10包括导热基板11和封装本体12，该封装本体12上设有正电极41和负电极42，所述封装本体12的中部掏空成四方通孔121，导热基板11上表面的中间区域也即固晶区111对准所述四方通孔121，使固晶区111周边形成一圈台面122，台面122的高度低于封装本体12四周边的高度；多颗LED晶片20以阵列排列的形式固定在所述固晶区111内，再借助金线30焊接形成先串后并的电连接；其特征在于：各所述LED晶片20上先覆盖有透明胶水层50，该透明胶水层50上又覆盖有荧光胶水层60。
如图2所示，本实用新型中，所述透明胶水层50盖过金线30的最高高度，所述荧光胶水层60的高度与封装本体12四周边的高度齐平。
以上内容是结合具体的优选技术方案对本实用新型所作的进一步详细说明，不能认定本实用新型的具体实施只局限于这些说明。对于本实用新型所属技术领域的普通技术人员来说，在不脱离本实用新型构思的前提下，还可以做出若干简单推演或替换，都应当视为属于本实用新型的保护范围。

Claims (2)

1.一种多晶片集成式白光LED封装结构，包括支架（10）、多颗LED晶片（20）和金线（30）；所述支架（10）包括导热基板（11）和封装本体（12），该封装本体（12）上设有正电极（41）和负电极（42），所述封装本体（12）的中部掏空成四方通孔（121），导热基板（11）上表面的中间区域也即固晶区（111）对准所述四方通孔（121），使固晶区（111）周边形成一圈台面（122），台面（122）的高度低于封装本体（12）四周边的高度；多颗LED晶片（20）以阵列排列的形式固定在所述固晶区（111）内，再借助金线（30）焊接形成先串后并的电连接；其特征在于：各所述LED晶片（20）上先覆盖有透明胶水层（50），该透明胶水层（50）上又覆盖有荧光胶水层（60）。
2.如权利要求1所述的多晶片集成式白光LED封装结构，其特征在于：所述透明胶水层（50）盖过金线（30）的最高高度，所述荧光胶水层（60）的高度与封装本体（12）四周边的高度齐平。
CN201220148153.7U 2012-04-10 2012-04-10 多晶片集成式白光led封装结构 Expired - Lifetime CN202549840U (zh)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103390716A (zh) * 2013-07-25 2013-11-13 江西量一光电科技有限公司 一种led芯片封装技术光源
CN105489744A (zh) * 2016-01-20 2016-04-13 深圳市聚飞光电股份有限公司 一种覆晶式led元件及制作方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103390716A (zh) * 2013-07-25 2013-11-13 江西量一光电科技有限公司 一种led芯片封装技术光源
CN105489744A (zh) * 2016-01-20 2016-04-13 深圳市聚飞光电股份有限公司 一种覆晶式led元件及制作方法

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Address after: No. 518000 Guangdong road Shenzhen city Baoan District Tangtou village in Yuntai Technology Industrial Park 6 9 floor

Patentee after: SHENZHEN SMALITE OPTO-ELECTRONIC CO., LTD.

Address before: No. 518000 Guangdong road Shenzhen city Baoan District Tangtou village in Yuntai Technology Industrial Park 6 9 floor

Patentee before: Shenzhen Smalite Optoelectronics Co., Ltd.

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Granted publication date: 20121121