CN202503490U - Voltage reduction protection circuit and switch driving device using same - Google Patents

Voltage reduction protection circuit and switch driving device using same Download PDF

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Publication number
CN202503490U
CN202503490U CN2012200598280U CN201220059828U CN202503490U CN 202503490 U CN202503490 U CN 202503490U CN 2012200598280 U CN2012200598280 U CN 2012200598280U CN 201220059828 U CN201220059828 U CN 201220059828U CN 202503490 U CN202503490 U CN 202503490U
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China
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voltage
signal
subtracts
switch
level
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CN2012200598280U
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Chinese (zh)
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安东基浩
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Rohm Co Ltd
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Rohm Co Ltd
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Abstract

The utility model relates to a voltage reduction protection circuit and a switch driving device using same. The voltage reduction protection circuit (32) comprises a first voltage monitoring part (321), a second voltage monitoring part (322), a filter part (323) and a logic gate (324). The first voltage monitoring part (321) monitors whether a power supply voltage (VCC) is lower than a first threshold voltage (Vth1) and generates a first voltage reduction protection signal (S1). The second voltage monitoring part (322) monitors whether the power supply voltage (VCC) is lower than a second threshold voltage (Vth2) and generates a second voltage reduction protection signal (S2), wherein the second threshold voltage (Vth2) is lower than the first threshold voltage (Vth1). The filter part (323) switches the first voltage reduction protection signal (S1) from a normal logic level to an abnormal logic level when a state lasts for a specific shielding period (Tm), wherein the state is that the power supply voltage (VCC) is lower than the first threshold voltage (Vth1). The logic gate (324) generates a third voltage reduction protection signal (S3) based on the first voltage reduction protection signal (S1) and the second voltage reduction protection signal (S2).

Description

Subtract voltage protection circuit and use its driving mechanism for switch
Technical field
The utility model relates to a kind of driving mechanism for switch that subtracts voltage protection circuit and use it.
Background technology
Fig. 8 is the figure that expression possesses an existing example of the driving mechanism for switch that subtracts voltage protection circuit.The driving mechanism for switch 100 of this existing example is through the conducting of carrying out switch SW/disconnection control; Come the conductor integrated circuit device of the drive current I of control load; And comprise: receive the input of supply voltage VCC and the electronegative potential block 101 that moves; The input of the starting resistor VB that reception is higher than supply voltage VCC and the high potential block 102 that moves; The level translator 103 that makes signal carry out level conversion and transmit to high potential block 102 from electronegative potential block 101, and keep watch on supply voltage VCC and generate subtract voltage protecting signal S1 subtract voltage protection circuit 104.
In addition, as with an example of said content associated prior art, can enumerate patent documentation 1.
[background technology document]
[patent documentation]
[patent documentation 1] Japanese Patent Laid is opened 2011-18892 communique (Figure 11)
The utility model content
Yet existing subtracting in the voltage protection circuit 104 of constituting comprises: the 104a of monitoring voltage portion, and it keeps watch on whether supply voltage VCC is lower than specific threshold voltage vt h and generation subtracts voltage protecting signal S1; And filter part 104b, it will subtract voltage protecting signal S1 and switch to the logic level (for example high level) when unusual from just often logic level (for example low level) when supply voltage VCC is lower than the specific shielding time T m (for example 10 μ s) of the state continuance of specific threshold voltage vt h.
Subtracting voltage protecting signal S1 when just often logic level switches to the logic level when unusual, electronegative potential block 101 drive level transducers 103 and transmit to high potential block 102 and to reset signal V2.The high potential block 102 that receives the transmission of reseting signal V2 from level translator 103 will be exported signal OUT and be made as low level and switch SW is broken off.
What become problem here is the situation that level translator 103 is formed by high-voltage transistor Tr1 and Tr2.The on state threshold voltage Vth of high-voltage transistor Tr1 and Tr2 (DMOS (Domplementary Metal Oxide Semiconductor; CMOS complementary metal-oxide-semiconductor)) be higher than the low withstand voltage transistorized on state threshold voltage Vth (MOS (Metal Oxide Semiconductor, metal-oxide semiconductor (MOS))) that forms electronegative potential block 101 significantly.For example, the on state threshold voltage Vth (MOS) of general low withstand voltage transistor (15V is withstand voltage) is 0.6V, and is relative therewith, and the on state threshold voltage Vth (DMOS) of high-voltage transistor Tr1 and Tr2 (600V is withstand voltage) is 5V.
Therefore; There is following problem in existing subtracting of constituting in the voltage protection circuit 104: when supply voltage VCC is lower than the on state threshold voltage Vth (DMOS) of high-voltage transistor Tr1 and Tr2 in the time that the shielding time T m than filter part 104b lacks; Even if rising to high level from low level through subtracting voltage protecting signal S1 after shielding time T m; Also can't utilize level translator 103 to make high-voltage transistor Tr2 conducting, thereby can't reset signal V2 (with reference to the moment t6 of Fig. 9~t7) to high potential block 102 transmission.
High potential block 102 receives the starting resistor VB of another system different with supply voltage VCC and moves, and therefore is absorbed in the generation that can continue the output signal OUT of a period of time after subtracting voltage status at supply voltage VCC and moves.Therefore; When in supply voltage VCC, producing rapid and significantly reducing and can't transmit when reseting signal V2 to high potential block 102; Might continue the state of maintained switch SW conducting; Thereby the drive current I of the switch SW of flowing through or load becomes overcurrent condition, and might cause the damage of switch SW or load.
The utility model is in view of by the said problem that the inventor found of this case, even if its purpose is to provide a kind of in supply voltage, the generation also can positively subtract subtracting voltage protection circuit, and using its driving mechanism for switch of voltage protection under the situation rapid and that significantly reduce.
In order to reach said purpose, the voltage protection circuit that subtracts of the utility model is made as following formation (first constitutes), that is, comprising: the first monitoring voltage portion, and whether its supervision supply voltage is lower than first threshold voltage and generates first subtracts voltage protecting signal; The second monitoring voltage portion, whether it keeps watch on said supply voltage and is lower than than low second threshold voltage of said first threshold voltage and generates second and subtract voltage protecting signal; Filter part, it subtracts voltage protecting signal with said first during said supply voltage is lower than the specific shielding of the state continuance of said first threshold voltage the time and switches to the logic level when unusual from just often logic level; And gate, it subtracts voltage protecting signal and said second according to said first and subtracts voltage protecting signal and generate the 3rd and subtract voltage protecting signal.
In addition; Comprise said first constitute subtract in the voltage protection circuit; Can be made as following formation (second constitutes); That is, said gate subtracts voltage protecting signal with the said the 3rd to be made as logic level just often when said first subtracts both sides that voltage protecting signal and said second subtracts voltage protecting signal for just often logic level; When said first logic level when to subtract at least one side that voltage protecting signal and said second subtracts voltage protecting signal be unusual, subtract voltage protecting signal with the said the 3rd and be made as the logic level when unusual.
And the driving mechanism for switch of the utility model can be made as following formation (the 3rd constitutes), that is, comprising: the electronegative potential block, and it receives the input of said supply voltage and moves; The high potential block, it receives the input of the second source voltage higher than said supply voltage and carries out the conducting/disconnection control of switch; Level translator, its make signal carry out level conversion and from said electronegative potential block to the transmission of said high potential block; And the voltage protection circuit that subtracts that comprises said first or second formation, it is kept watch on said supply voltage and subtracts voltage protecting signal with the said the 3rd and exports to said electronegative potential block.
In addition; In the driving mechanism for switch that comprises said the 3rd formation, can be made as following formation (the 4th constitutes); Promptly; Said electronegative potential block subtracts voltage protecting signal when just often logic level switches to the logic level when unusual the said the 3rd, drives said level translator and resets signal to the transmission of said high potential block; Said high potential block makes said switch break off when receiving said transmission of reseting signal from said level translator.
And, in the driving mechanism for switch that comprises said the 4th formation, can be made as following formation (the 5th constitutes), that is, said second threshold voltage is higher than the transistorized on state threshold voltage that forms said level translator.
And, in the driving mechanism for switch that comprises said the 5th formation, can be made as following formation (the 6th constitutes), that is, the transistor that forms said level translator is high withstand voltage in the transistor that forms said electronegative potential block.
And the driving mechanism for switch that comprises arbitrary formation in said the 3rd to the 6th formation can be made as following formation (the 7th constitutes), that is, drive said switch and control motor current.
And the driving mechanism for switch that comprises arbitrary formation in said the 3rd to the 6th formation can be made as following formation (the 8th constitutes), that is, drive said switch and generate desired output voltage from input voltage.
[effect of utility model]
According to the utility model, even if can provide a kind of in supply voltage, the generation also can positively subtract subtracting voltage protection circuit, and using its driving mechanism for switch of voltage protection under the situation rapid and that significantly reduce.
Description of drawings
Fig. 1 is the calcspar that the integral body of the driving mechanism for switch of expression the utility model constitutes.
Fig. 2 is the sequential chart in order to explanation side switch drive actions.
Fig. 3 is that expression subtracts the calcspar that one of voltage protection circuit 32 constitutes example.
Fig. 4 is the sequential chart that subtracts the voltage protection action in order to explanation.
Fig. 5 is the figure of first application examples of expression driving mechanism for switch 1.
Fig. 6 is the figure of second application examples of expression driving mechanism for switch 1.
Fig. 7 is the figure of the 3rd application examples of expression driving mechanism for switch 1.
Fig. 8 is the figure that expression possesses an existing example of the driving mechanism for switch that subtracts voltage protection circuit.
Fig. 9 is in order to the existing sequential chart that subtracts the voltage protection action to be described.
[explanation of symbol]
1 driving mechanism for switch
2 motor
10 side switch drive divisions
11 drivers
12 rest-set flip-flops
13 subtract voltage protection circuit (VB keeps watch on and uses UVLO)
14 level translators
141,142 N channel-style DMOS field-effect transistors
143,144 resistance
15 pulse generators
16 controllers
17 level translators
18 Schmidt triggers
19 resistance
20 side switch drive divisions
21 drivers
22 controllers
23 delay portions
24 level translators
25 Schmidt triggers
26 resistance
30 abnormal protection portions
31 temperature protection circuits (TSD)
32 subtract voltage protection circuit (VCC keeps watch on and uses UVLO)
321 first monitoring voltage portions
322 second monitoring voltage portions
323 filter part
324 OR doors
33 power supply short-circuit protection circuits
34 abnormal signal generative circuits
35 N channel-style MOS field-effect transistors
N1, N2 N channel-style MOS field-effect transistor
R1, R2 resistance
C1, C2 capacitor
The D1 diode
T0~T8 outside terminal
Embodiment
< whole formation >
Fig. 1 is the calcspar that the integral body of the driving mechanism for switch of expression the utility model constitutes.The driving mechanism for switch 1 of this formation is the monolithic semiconductor integrated circuit device that has side switch drive division 10, side switch drive division 20, reaches abnormal protection portion 30.Driving mechanism for switch 1 is controlled with conducting/disconnection of outside N channel-style MOS [Metal Oxide Semiconductor] field-effect transistor N1 that is connected and N2 through carrying out, and the drive current I of control load (not shown).
Driving mechanism for switch 1 has outside terminal T0~T8 in order to establish with installing outside the electrical connection.In the outside of driving mechanism for switch 1, except connecting transistor N1 and N2, also connecting resistance R 1 and R2, capacitor C1 and C2 and diode D1 as conducting/disconnection controlling object.
In the outside of driving mechanism for switch 1, the drain electrode of transistor N1 is connected in the end that applies of high voltage HV (hundreds of volt).The source electrode of transistor N1 and back grid are connected in outside terminal T3 (switch terminal).The grid of transistor N1 is connected in outside terminal T2 (upside gate terminal).The drain electrode of transistor N2 is connected in outside terminal T3.The source electrode of transistor N2 and back grid are connected in earth terminal via resistance R 1, also are connected in first end of resistance R 2 on the other hand.Second end of resistance R 2 is connected in outside terminal T8 (power supply short-circuit detecting terminal), also is connected in earth terminal via capacitor C2 on the other hand.The grid of transistor N2 is connected in outside terminal T4 (downside gate terminal).First end of capacitor C1 is connected in outside terminal T1 (startup terminal).Second end of capacitor C1 is connected in outside terminal T3.The anode of diode D1 is connected in the end that applies of supply voltage VCC, and also is connected in outside terminal T0 (power supply terminal) on the other hand.The negative electrode of diode D1 is connected in outside terminal T1.
Side switch drive division 10 comprises driver 11, rest-set flip-flop 12, subtracts voltage protection circuit (VB keeps watch on the circuit with UVLO [Under Voltage Lock Out, under voltage locking]) 13, level translator 14, pulse generator 15, controller 16, level translator 17, Schmidt trigger 18, reaches resistance 19.
Driver 11 is according to the output signal of rest-set flip-flop 12, to outside terminal T2 output upside output signal HO.In addition, the high level of upside output signal HO becomes starting resistor VB, and low level becomes switching voltage VS.
It is high level that rest-set flip-flop 12 will be exported signal sets with the drop edge that inputs to the setting signal V1 that sets end (S) from level translator 14 as triggering, with input to from level translator 14 first reset end (R) the drop edge of reseting signal V2 (perhaps from subtract voltage protection circuit 13 input to second reset end (R) the drop edge that subtracts voltage protecting signal) will export signal as triggering and be reset to low level.
Subtract voltage protection circuit 13 when starting resistor VB is lower than specific threshold voltage, will subtract voltage protecting signal and switch to the logic level (for example low level) when unusual from just often logic level (for example high level).
In addition; Driver 11, rest-set flip-flop 12 and subtract voltage protection circuit 13 and belong to the high potential block (with reference to four frames of the fillet among Fig. 1) that moves between starting resistor VB that is in application to outside terminal T1 and the switching voltage VS that is applied to outside terminal T3, remaining circuit blocks all belongs to the electronegative potential block.
Level translator 14 is to make signal carry out level conversion and the circuit blocks transmitted to the high potential block from described electronegative potential block; Has N channel-style DMOS [Double-Diffused MOS; Bilateral diffusion MOS] field-effect transistor 141 and 142, resistance 143 and 144.Transistor 141 and 142 source electrode and back grid all are connected in earth terminal.The drain electrode of transistor 141 is connected in the setting end (S) of rest-set flip-flop 12, on the other hand, also is connected in outside terminal T1 via resistance 143.What the drain electrode of transistor 142 was connected in rest-set flip-flop 12 resets end (R), on the other hand, also is connected in outside terminal T1 via resistance 144.Transistor 141 and 142 grid are connected to pulse generator 15.In addition, the transistor 141 and 142 of formation level translator 14 all is designed to than high withstand voltage (for example 600V is withstand voltage) of transistor that forms the electronegative potential block.
Pulse generator 15 generates the signal of transistor 141 and 142 according to the output signal of controller 16.If more specifically narrate; Then pulse generator 15 with the rising edge of the output signal of controller 16 as triggering; In specific conduction period the signal of transistor 141 is made as high level; And as triggering, the signal of transistor 142 is made as high level in specific conduction period with the drop edge of the output signal of controller 16.
Controller 16 is according to the abnormal signal from 34 inputs of abnormal signal generative circuit, whether controls output signal with level translator 17 and passes to pulse generator 15 (and then whether control driving transistors N1).
Level translator 17 converts the output signal level of Schmidt trigger 18 into and is suitable for behind the voltage level (VCC-GND) of controller 16 inputs, exporting.
The upside input signal HIN that Schmidt trigger 18 will input to outside terminal T6 passes to level translator 17.In addition, be endowed specific sluggishness in the threshold voltage of Schmidt trigger 18.According to this kind formation, can improve patience to noise.
Resistance 19 is pulled down to earth terminal with outside terminal T6.Therefore, externally terminal T6 is under the situation of open mode, and upside input signal HIN becomes low level (in order to break off the logic level of transistor N1), thereby can by mistake not make transistor N1 conducting.
Side switch drive division 20 has driver 21, controller 22, delay portion 23, level translator 24, Schmidt trigger 25, reaches resistance 26.
Driver 21 comes outside terminal T4 output downside output signal LO according to the output signal of controller 22.In addition, the high level of downside output signal LO becomes supply voltage VCC, and low level becomes earthed voltage GND.
Controller 22 is according to the abnormal signal from 34 inputs of abnormal signal generative circuit, whether controls output signal with delay portion 23 and passes to driver 21 (and then whether oxide-semiconductor control transistors N2 driving).
The output signal of 23 pairs of level translators 24 of delay portion give specific delay (be equivalent to by the pulse generator 15 of side switch drive division 10, level translator 14, and the circuit delay that produced of rest-set flip-flop 12) and be passed to controller 22.
Level translator 24 converts the output signal level of Schmidt trigger 25 into and is suitable for behind the voltage level (VCC-GND) of controller 22 inputs, exporting.
The downside input signal LIN that Schmidt trigger 25 will input to outside terminal T7 passes to level translator 24.In addition, be endowed specific sluggishness in the threshold voltage of Schmidt trigger 25.According to this kind formation, can improve patience to noise.
Resistance 26 is pulled down to earth terminal with outside terminal T7.Therefore, externally terminal T7 is under the situation of open mode, and downside input signal LIN becomes low level (in order to break off the logic level of transistor N2), thereby can by mistake not make transistor N2 conducting.
Abnormal protection portion 30 has temperature protection circuit (TSD [Thermal Shut Down] circuit) 31, subtracts voltage protection circuit (VCC keeps watch on and use the UVLO circuit) 32, power supply short-circuit protection circuit 33, abnormal signal generative circuit 34, reaches N channel-style MOS field-effect transistor 35.
Temperature protection circuit 31 switches to the logic level (for example high level) when unusual with the temperature protection signal from just often logic level (for example low level) when the connecing surface temperature and be higher than specific threshold temperature of driving mechanism for switch 1.
Subtract voltage protection circuit 32 when supply voltage VCC is lower than specific threshold voltage, will subtract voltage protecting signal and switch to the logic level (for example high level) when unusual from just often logic level (for example low level).In addition, will formation and the action that subtract voltage protection circuit 32 be elaborated afterwards.
Power supply short-circuit protection circuit 33 input to the power supply short-circuit detecting voltage CIN of outside terminal T8 (be equivalent to by resistance R 2 with capacitor C2 and the switching voltage VS of smoothing) when being higher than specific threshold voltage, power supply short-circuit protection signal is switched to the logic level (for example high level) when unusual from just often logic level (for example low level).In addition, " power supply short circuit " be meant the state that end (or with its hot end that is as the criterion) is short-circuited that applies of outside terminal T3 and high voltage HV.
Abnormal signal generative circuit 34 is kept watch on respectively from the temperature protection signal of temperature protection circuit 31 inputs, from subtracting the power supply short-circuit protection signal that voltage protecting signal and import from power supply short-circuit protection circuit 33 of voltage protection circuit 32 inputs; Arbitrary therein signal takes place under the unusual situation, and abnormal signal is switched to the logic level (for example high level) when unusual from just often logic level (for example low level).
Transistor 35 forms in order to what export outside abnormal signal from outside terminal T5 and opens the drain electrode deferent segment.When driving mechanism for switch 1 does not produce when unusual, transistor 35 is broken off by abnormal signal generative circuit 34, and outside abnormal signal is made as high level.On the other hand, in driving mechanism for switch 1, produce under any unusual situation, transistor 35 is by 34 conductings of abnormal signal generative circuit, and outside abnormal signal is made as low level.
<boostrap circuit >
The driving mechanism for switch 1 that comprises said formation comprises that boostrap circuit is used as generating the mechanism of starting resistor VB (driving voltage that comprises the high potential block of driver 11 grades).This boostrap circuit comprises that anode is connected in the diode D1 that applies end of supply voltage VCC and is connected in the capacitor C1 between the source electrode of negative electrode and transistor N1 of diode D1, and from connected node (outside terminal T1) the output starting resistor VB of diode D1 and capacitor C1.
When making transistor N2 conducting through transistor N1 is broken off; And the switching voltage VS that occurs among the outside terminal T3 is when being made as low level (GND); From supply voltage VCC apply end beginning via the path of diode D1, capacitor C1 and transistor N2 on streaming current IB, thereby the capacitor C1 that is connected between outside terminal T1 and the outside terminal T2 is recharged.At this moment, the starting resistor VB that occurs among the outside terminal T1 (charging voltage of capacitor C1 just) become from supply voltage VCC deduct the forward drop-out voltage Vf gained of diode D1 magnitude of voltage (=VCC-Vf).
On the other hand; Under the state that capacitor C1 is recharged; Through making transistor N1 conducting that transistor N2 is broken off; If switching voltage VS rises to high level (HV) from low level (GND), then starting resistor VB be increased to than switching voltage VS high level (HV) only and then exceed till the magnitude of voltage (=HV+ (VCC-Vf)) of the charging voltage (VCC-Vf) that is equivalent to capacitor C1.Therefore; Through this kind starting resistor VB is supplied with as the high potential block (driver 11, rest-set flip-flop 12 and subtract voltage protection circuit 13) or the driving voltage of level translator 14, can carry out conducting/disconnection control (especially conducting control) of N channel-style MOS field-effect transistor N1.
< side switch drive actions >
Fig. 2 is the sequential chart in order to explanation side switch drive actions, describes upside input signal HIN, setting signal V1 (S) in regular turn, resets signal V2 (R) and upside output signal HO from last beginning.In addition, among Fig. 2, for the purpose of simplifying the description, omitted and having followed bootstrapping action and setting signal V1 (S) or reset the description of situation of the high level current potential change of signal V2 (R).
If upside input signal HIN rises to high level from low level, then with its rising edge as triggering and the signal of transistor 141 is made as high level in specific conduction period.Setting signal V1 drops to low level from high level if transistor 141 is switched on, then with its drop edge as triggering and upside output signal HO is set to high level.
On the other hand, if upside input signal HIN drops to low level from high level, then with its drop edge as triggering and the signal of transistor 142 is made as high level in specific conduction period.Reset signal V2 if transistor 142 is switched on and drop to low level from high level, then with its drop edge as triggering and upside output signal HO is reset to low level.
According to said action, in the side switch drive division 10, generating with upside input signal HIN is the upside output signal HO of same logic level, the conducting of the row transistor N1 that goes forward side by side/disconnection control.In addition, through shortening the conduction period of transistor 141 and 142, and can suppress the consumes electric power of level translator 14.
<subtracting voltage protection circuit >
Fig. 3 is that expression subtracts the calcspar that one of voltage protection circuit 32 constitutes example.Subtract voltage protection circuit 32 and have the first monitoring voltage portion 321, the second monitoring voltage portion 322, filter part 323, and OR door 324.
Whether the 321 supervision supply voltage VCC (for example desired value 15V) of the first monitoring voltage portion are lower than first threshold voltage Vth1 (for example 10V) and generate first subtracts voltage protecting signal S1.In addition; First subtracts voltage protecting signal S1 is essentially as follows: become low level (logic level just often) if supply voltage VCC is not less than first threshold voltage Vth1, become high level (unusual time logic level) if supply voltage VCC is lower than first threshold voltage Vth1.First threshold voltage Vth1 can consider that the signal in the electronegative potential block transmits required voltage level and suitably sets.
Whether the second monitoring voltage portion 322 keeps watch on supply voltage VCC and is lower than than the low second threshold voltage vt h2 (for example 6V) of first threshold voltage Vth1 and generates second and subtract voltage protecting signal S2.In addition; Subtract for the voltage protecting signal S2 for second; Become low level (logic level just often) if supply voltage VCC is not less than the second threshold voltage vt h2, become high level (unusual time logic level) if supply voltage VCC is lower than the second threshold voltage vt h2.The second threshold voltage vt h2 is set to than transistor 141 that forms level translator 14 and 142 the high magnitude of voltage of on state threshold voltage Vth (DMOS) (for example 5V).
Filter part 323 receives the input that is subtracted voltage protecting signal S1 by first of the first monitoring voltage portion, 321 generations; During supply voltage VCC is lower than the specific shielding of the state continuance of first threshold voltage Vth1 during Tm (for example 10 μ s), subtracts voltage protecting signal S1 with first and switch to high level when unusual (logic level) from low level (logic level just often).
OR door 324 is following gates; Promptly; Generation from the first monitoring voltage portion 321 import via filter part 323 first subtract voltage protecting signal S1, with from the second monitoring voltage portion 322 directly input second subtract voltage protecting signal S2 logic and signal, and this logic and signal subtracted voltage protecting signal S3 as the 3rd and export.Just; OR door 324 is when first subtracts both sides that voltage protecting signal S1 and second subtracts voltage protecting signal S2 for low level (logic level just often); Subtract voltage protecting signal S3 with the 3rd and be made as low level (logic level just often), when first subtracts at least one side that voltage protecting signal S1 and second subtracts voltage protecting signal S2 and be high level when unusual (logic level), subtract voltage protecting signal S3 and be made as high level when unusual (logic level) the 3rd.The 3rd subtracts voltage protecting signal S3 via abnormal signal generative circuit 34, perhaps is not passed to controller 16 or controller 22 via abnormal signal generative circuit 34.
Subtract voltage protecting signal S3 when low level (logic level just often) switches to high level (unusual time logic level) when the 3rd, controller 16 will form the transistor 142 of level translator 14 via pulse generator 15 signal is made as high level.As a result, transistor 142 is switched on, and resets signal V2 and drops to low level from high level.Rest-set flip-flop 12 as triggering, and is made as low level with self output signal with this drop edge of reseting signal V2.The output signal that driver 11 receives rest-set flip-flop 12 drops to low level situation, is made as low level and upside is exported signal HO, and breaks off transistor N1.
And; The voltage protection circuit 32 that subtracts of this formation example considers that the on state threshold voltage Vth (DMOS) of the high-voltage transistor 141 that forms level translator 14 and 142 is higher; Even if in supply voltage VCC, produce under the situation rapid and that significantly reduce, also can positively subtract the formation of voltage protection and be made as.
Fig. 4 is the sequential chart that subtracts voltage protection action in order to explanation, has described supply voltage VCC, first in regular turn from last beginning and has subtracted voltage protecting signal S1, second and subtract voltage protecting signal S2, the 3rd and subtract voltage protecting signal S3 and reset signal V2.
At moment t1, because of the overlapping supply voltage VCC that makes of excessive noise is lower than first threshold voltage Vth1, but this state is eliminated through preceding just being able at shielding time T m.Therefore, first subtracts voltage protecting signal S1 and is maintained low level.And, can be because of described excessive noise does not make supply voltage VCC be lower than the second threshold voltage vt h2, second subtracts voltage protecting signal S2 also is maintained low level.Therefore, the 3rd subtracts voltage protecting signal S3 also is maintained low level, can not drop to low level thereby reset signal V2.
At moment t2, till the rapid underground magnitude of voltage that is brought down below first threshold voltage Vth1 of supply voltage VCC, in addition,, also keep the voltage status that subtracts of supply voltage VCC even if at the moment t3 that has passed through shielding time T m since moment t2.Therefore, at moment t3, first subtracts voltage protecting signal S1 rises to high level, and then the 3rd subtracts voltage protecting signal S3 rises to high level.Rise to high level if the 3rd subtracts voltage protecting signal S3, the transistor 142 that then forms level translator 14 is switched on, and reset signal V2 and drop to low level, thereby upside output signal HO is low level that transistor N1 breaks off with being forced.In addition, at the time point of moment t3, supply voltage VCC is not less than the on state threshold voltage Vth (DMOS) of transistor 141 and 142, but thereby no problem make transistor 142 conductings.And at moment t2~t3, supply voltage VCC is not reduced to till the magnitude of voltage that is lower than the second threshold voltage vt h2, thereby second subtracts voltage protecting signal S2 and be maintained low level.Just, in supply voltage VCC, produce under the situation that subtracts voltage status of said movement, essence is carried out and first is subtracted voltage protecting signal S1 and subtract the voltage protection action accordingly.
At moment t4, supply voltage VCC slowly is reduced to till the magnitude of voltage that is lower than first threshold voltage Vth1, and then even if at the moment t5 that has passed through shielding time T m since moment t4, the voltage status that subtracts of supply voltage VCC also is able to continue.Therefore, at moment t5, first subtracts voltage protecting signal S1 rises to high level, and then the 3rd subtracts voltage protecting signal S3 rises to high level.Rise to high level if the 3rd subtracts voltage protecting signal S3, the transistor 142 that then forms level translator 14 is switched on, and reset signal V2 and drop to low level, thereby upside output signal HO is low level that transistor N1 breaks off with being forced.In addition, at the time point of moment t5, because of supply voltage VCC is not less than the on state threshold voltage Vth (DMOS) of transistor 141 and 142, so can make transistor 142 conductings no problem.And supply voltage VCC also continues later on to reduce lentamente at moment t5, is lower than the moment t6 of the second threshold voltage vt h2 at supply voltage VCC, and second subtracts voltage protecting signal S2 rises to high level.Wherein, first subtracts voltage protecting signal S1 subtracts voltage protecting signal S2 than second and rises to high level earlier, and the pressure of transistor N1 is broken off and being finished.Just, in supply voltage VCC, produce under the situation that subtracts voltage status of said movement, carry out substantially and first subtract voltage protecting signal S1 and subtract the voltage protection action accordingly.And supply voltage VCC reduces with continued at moment t6 lentamente, and the time point in that supply voltage VCC is lower than the on state threshold voltage Vth (DMOS) of transistor 141 and 142 can't carry out the signal transmission via level translator 14.Wherein, the pressure of transistor N1 is broken off and being finished at moment t5, even if can't carry out the signal transmission via level translator 14 therefore, also can by mistake not make transistor N1 conducting.
At moment t7; Supply voltage VCC is reduced to till the magnitude of voltage that is lower than first threshold voltage Vth1 rapidly; And then; At the moment t9 that has passed through shielding time T m since moment t7, supply voltage VCC is reduced to till the magnitude of voltage of the on state threshold voltage Vth (DMOS) that is lower than transistor 141 and 142.Therefore, wait first subtracts voltage protecting signal S1 and rises to high level, can't make transistor 142 conductings, and then can't make transistor N1 force to break off.On the other hand; Before moment t7 process shielding time T m; VCC is lower than under the situation of the second threshold voltage vt h2 at moment t8 supply voltage, subtract voltage protecting signal S2 at this time point with second and rise to high level, and then the 3rd subtracts voltage protecting signal S3 and rises to high level.Rise to high level if the 3rd subtracts voltage protecting signal S3, the transistor 142 that then forms level translator 14 is switched on, and reset signal V2 and drop to low level, thereby upside output signal HO is low level that transistor N1 breaks off with being forced.In addition, at the time point of moment t8, supply voltage VCC is not less than the on state threshold voltage Vth (DMOS) of transistor 141 and 142, thereby can make transistor 142 conductings no problem.Just, in supply voltage VCC, produce under the situation that subtracts voltage status of said movement, carry out substantially and second subtract voltage protecting signal S2 and subtract the voltage protection action accordingly.In addition, supply voltage VCC also continues later on to reduce at moment t8 rapidly, and the time point in that supply voltage VCC is lower than the on state threshold voltage Vth (DMOS) of transistor 141 and 142 can't carry out the signal transmission via level translator 14.Wherein, break off because of the pressure of transistor N1 and to finish, so, also can by mistake not make transistor N1 conducting even if can't carry out signal transmission afterwards via level translator 14 at moment t8.
As said, if this formation example subtract voltage protection circuit 32, even if then in supply voltage VCC, produce under the situation rapid and that significantly reduce, also can positively subtract voltage protection, thereby can improve the reliability of setting.
< application examples of driving mechanism for switch >
Fig. 5 is the figure of first application examples of expression driving mechanism for switch 1.As shown in Figure 5, driving mechanism for switch 1 can be used as motor drive and is applied, that is, driving transistors N1 and N2 also control the drive current Im of motor 2 (for example, large-scale household electrical appliances use air compressor motor or fan motor).In addition, among Fig. 5, as motor 2 illustrations three-phase alternating-current motor, but the driven object of driving mechanism for switch 1 is not limited thereto, also can be with two-phase alternating current motor or DC motor etc. as driven object.
Fig. 6 is the figure of second application examples of expression driving mechanism for switch 1.As shown in Figure 6, driving mechanism for switch 1 also can be used as the switching power unit of synchronous commutation type and is applied, that is, and complementally (exclusively) driving transistors N1 and N2 and generate desired output voltage V out according to input voltage vin.In addition, the vocabulary of said " complementally (exclusively) " is considered also to comprise the situation of off period when transistor N1 and N2 are set from the viewpoint that prevents perforation electric current except that the antipodal situation of conducting/disconnection that comprises transistor N1 and N2.
Fig. 7 is the figure of the 3rd application examples of expression driving mechanism for switch 1.As shown in Figure 7, driving mechanism for switch 1 also can be used as the switching power unit of asynchronous rectification type and is applied, that is, driving transistors N1 also generates desired output voltage V out according to input voltage vin.
< other variation >
In addition, the formation of the utility model can be added various changes in the scope of the purport that does not break away from utility model except that said execution mode.Just; All aspects of the said execution mode of considered are illustration; But not restricted contents; The technical scope of the utility model is not to be represented by the explanation of said execution mode, but is represented by claim, is interpreted as comprising belonging to and the implication of patent claim equalization and all changes in the scope.
[utilizability on the industry]
The voltage protection circuit that subtracts of the utility model for example can be preferably subtracts voltage protection mechanism as large-scale household electrical appliances with motor driver.

Claims (8)

1. one kind subtracts voltage protection circuit, it is characterized in that comprising:
The first monitoring voltage portion, whether its supervision supply voltage is lower than first threshold voltage and generates first subtracts voltage protecting signal;
The second monitoring voltage portion, whether it keeps watch on said supply voltage and is lower than than low second threshold voltage of said first threshold voltage and generates second and subtract voltage protecting signal;
Filter part, it subtracts voltage protecting signal with said first during said supply voltage is lower than the specific shielding of the state continuance of said first threshold voltage the time and switches to the logic level when unusual from just often logic level; And
Gate, it subtracts voltage protecting signal and said second according to said first and subtracts voltage protecting signal and generate the 3rd and subtract voltage protecting signal.
2. the voltage protection circuit that subtracts as claimed in claim 1 is characterized in that:
Said gate is when said first subtracts both sides that voltage protecting signal and said second subtracts voltage protecting signal for just often logic level; Subtract voltage protecting signal with the said the 3rd and be made as logic level just often; When said first logic level when to subtract at least one side that voltage protecting signal and said second subtracts voltage protecting signal be unusual, subtract voltage protecting signal with the said the 3rd and be made as the logic level when unusual.
3. driving mechanism for switch is characterized in that comprising:
The electronegative potential block, it receives the input of said supply voltage and moves;
The high potential block, it receives the input of the second source voltage higher than said supply voltage and carries out the conducting/disconnection control of switch;
Level translator, its make signal carry out level conversion and from said electronegative potential block to the transmission of said high potential block; And
According to claim 1 or claim 2 subtract voltage protection circuit, it is kept watch on said supply voltage and subtracts voltage protecting signal with the said the 3rd and exports to said electronegative potential block.
4. driving mechanism for switch as claimed in claim 3 is characterized in that:
Said electronegative potential block subtracts voltage protecting signal when just often logic level switches to the logic level when unusual the said the 3rd, drives said level translator and resets signal to the transmission of said high potential block;
Said high potential block makes said switch break off when receiving said transmission of reseting signal from said level translator.
5. driving mechanism for switch as claimed in claim 4 is characterized in that:
Said second threshold voltage is higher than the transistorized on state threshold voltage that forms said level translator.
6. driving mechanism for switch as claimed in claim 5, wherein
The transistor that forms said level translator is high withstand voltage in the transistor that forms said electronegative potential block.
7. like each described driving mechanism for switch in the claim 3 to 6, it is characterized in that:
Drive said switch and control motor current.
8. like each described driving mechanism for switch in the claim 3 to 6, it is characterized in that:
Drive said switch and generate desired output voltage from input voltage.
CN2012200598280U 2011-02-22 2012-02-20 Voltage reduction protection circuit and switch driving device using same Expired - Fee Related CN202503490U (en)

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JP2011035640A JP2012175816A (en) 2011-02-22 2011-02-22 Reduced-voltage protective circuit and switch driving device using the same
JP2011-35640 2011-02-22

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CN110120800A (en) * 2018-02-07 2019-08-13 新唐科技股份有限公司 The half-bridge circuit driving chip of tool protection circuit and its guard method

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CN107103888A (en) * 2017-05-19 2017-08-29 深圳市华星光电技术有限公司 Time sequence driving circuit, drive circuit and the liquid crystal display panel of liquid crystal display panel
CN107103888B (en) * 2017-05-19 2018-09-14 深圳市华星光电技术有限公司 Time sequence driving circuit, driving circuit and the liquid crystal display panel of liquid crystal display panel
WO2018209742A1 (en) * 2017-05-19 2018-11-22 深圳市华星光电技术有限公司 Time sequence driving circuit for liquid crystal display panel, driving circuit and liquid crystal display panel
CN110120800A (en) * 2018-02-07 2019-08-13 新唐科技股份有限公司 The half-bridge circuit driving chip of tool protection circuit and its guard method

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