CN202453767U - Multi-PCI signal interface main board with peer to peer communication function - Google Patents

Multi-PCI signal interface main board with peer to peer communication function Download PDF

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Publication number
CN202453767U
CN202453767U CN2011205723954U CN201120572395U CN202453767U CN 202453767 U CN202453767 U CN 202453767U CN 2011205723954 U CN2011205723954 U CN 2011205723954U CN 201120572395 U CN201120572395 U CN 201120572395U CN 202453767 U CN202453767 U CN 202453767U
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China
Prior art keywords
peer
pci
pcie
chip
main board
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Expired - Fee Related
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CN2011205723954U
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Chinese (zh)
Inventor
李辉
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SHENZHEN SEAVO TECHNOLOGY Co Ltd
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SHENZHEN SEAVO TECHNOLOGY Co Ltd
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Abstract

A multi-PCI signal interface main board with a peer to peer communication function mainly comprises a processor arranged on the main board body and a south-bridge chip connected with the processor through a bus, and is characterized by further comprises PCIE (Peripheral Component Interface Express) transformation extension PCI (Peripheral Component Interface) chips connected with the south-bridge chip through PCIE signals, wherein PCIE signal output by the south-bridge chip is extended to output in at least two paths of PCI interface signals with the peer to peer communication function by the PCIE transformation extension PCI chips; and the PCIs connected with the PCI signals are used for realizing the peer to peer communication function among the PCIs not passing through the main board, and the CPU resource occupancy rate is effectively reduced. Moreover, due to the adoption of the PCIs which are expanded in that way in combination with some special PCI video acquisition cards, the CPU resource can not be occupied, operations, such as switching and splicing, for multi-path video can be directly realized so as to reduce the burden of CPU in cutting and splicing video, and requirement on CPU performance is reduced.

Description

A kind of many pci signals interface mainboard with peer-to-peer communications function
Technical field
The utility model relates to a kind of mainboard product scope, is specifically related to a kind of many pci signals interface mainboard with peer-to-peer communications function.
Background technology
The special-purpose mainboard of present many PCI uses in the DVR industry more; Polygamy closes the PCI video frequency collection card and uses; Progress along with chip technology; PCI video frequency collection card function further strengthens, and (is designated hereinafter simply as: the Peer-Peer function) require constantly to promote realizing the peer-to-peer communications function between the pci interface.Existing many pci interfaces mainboard, pci signal is drawn from south bridge, and its concrete number receives the restriction of the function of south bridge own, and pci interface is relatively independent simultaneously, does not have the function of peer-to-peer communications, and the communication between it need be passed through processing, takies cpu resource.
Summary of the invention
To above problem; Technical matters to be solved by this invention is the deficiency that overcomes prior art; A kind of many pci signals interface mainboard with peer-to-peer communications function is provided, and it takies low cpu resource, and can realize without peer-to-peer communications function between the pci interface of mainboard.
The purpose of the utility model realizes through following technical scheme:
A kind of many pci signals interface mainboard with peer-to-peer communications function; Mainly comprise: the South Bridge chip that is arranged on the processor on this mainboard body and is connected through bus with this processor; It is characterized in that; Also comprise: with the PCIE conversion expansion PCI chip that said South Bridge chip is connected through the PCIE signal, this PCIE conversion expansion PCI chip with the PCIE signal extension of South Bridge chip output be output as at least 2 the tunnel have the peer-to-peer communications function the pci interface signal.
Further, be connected, be used to provide the external ROM of its configuration peer-to-peer communications functional parameter with said PCIE conversion expansion PCI chip.
As a kind of improvement, said PCIE conversion expansion PCI chip is at least two.
As further improvement, said South Bridge chip connects PCIE conversion expansion PCI chip through the PCIE1X signal.
A kind of improved as in addition, said PCIE conversion expansion PCI chip with said PCIE1X signal extension be output as 4 the tunnel have the peer-to-peer communications function the pci interface signal.
The PCIE conversion expansion PCI chip of the utility model invention through being connected with South Bridge chip; With the PCIE signal extension of South Bridge chip output be output as at least 2 the tunnel have the peer-to-peer communications function the pci interface signal; The pci interface that is connected with these pci interface signals; Can realize having effectively reduced the occupancy of cpu resource without peer-to-peer communications function between the pci interface of mainboard and pci interface.The pci interface that adopts this mode to expand cooperates some special PCI video frequency collection cards can realize not taking cpu resource; Directly realize the cutting of multi-channel video, concatenation; Alleviated CPU and cut, spliced processing burden (the cutting of video, concatenation relatively more frequent in actual use) at video, reduced requirement cpu performance.
Description of drawings
In order to be easy to explanation, the utility model is done to describe in detail by following preferred embodiment and accompanying drawing.
Fig. 1 is the circuit theory synoptic diagram one-piece construction synoptic diagram of the utility model.
Embodiment
For the purpose, technical scheme and the advantage that make the utility model is clearer,, the utility model is further elaborated below in conjunction with accompanying drawing and embodiment.Should be appreciated that specific embodiment described herein only in order to explanation the utility model, and be not used in qualification the utility model.
The many pci signals interface mainboard that sees also Fig. 1, has the peer-to-peer communications function; Mainly comprise: the South Bridge chip that is arranged on the processor on this mainboard body and is connected through bus with this processor; It is characterized in that; Also comprise: with the PCIE conversion expansion PCI chip that said South Bridge chip is connected through the PCIE signal, this PCIE conversion expansion PCI chip with the PCIE signal extension of South Bridge chip output be output as at least 2 the tunnel have the peer-to-peer communications function the pci interface signal.
The PCIE conversion expansion PCI chip that is adopted in the utility model is the chip of known configurations, and the producer that produces PICE conversion expansion PCI chip at present mainly contains PLX, IDT, ITE, LSI, NXP etc.
Particularly, the concrete model of this embodiment PCIE conversion expansion PCI chip that can adopt is: the PEX8112 of the ITE8893 of ITE company, PLX company, the PEB383 of IDT company or the like.
In this embodiment; Be connected, be used to provide it to dispose the external ROM of peer-to-peer communications functional parameter with said PCIE conversion expansion PCI chip; Said PCIE conversion expansion PCI chip is two, certainly, can adopt any plural PCIE conversion expansion PCI chip as the case may be.
And; Said South Bridge chip connects PCIE conversion expansion PCI chip through the PCIE1X signal; Said PCIE conversion expansion PCI chip with said PCIE1X signal extension be output as 4 the tunnel have the peer-to-peer communications function the pci interface signal; That is, can expand 8 the tunnel have the Peer-Peer function pci interface; Certainly; Those skilled in the art also can be according to the teachings of the utility model; Through adopting the performance of different PCIE conversion expansion PCI chip, different PCIE4X, the PCIE8X signal extension of South Bridge chip output is output as the pci interface signal that multichannel at least has the peer-to-peer communications function.
The above is merely the preferred embodiment of the utility model; Not in order to restriction the utility model; Any modification of being done within all spirit and principles at the utility model, be equal to replacement and improvement etc.; As the mode of adjusting the type of South Bridge chip output PCIE signal and adopting corresponding PCIE conversion expansion PCI chip, all should be included within the protection domain of the utility model.

Claims (2)

1. many pci signals interface mainboard with peer-to-peer communications function; Comprise: the South Bridge chip that is arranged on the processor on this mainboard body and is connected through bus with this processor; It is characterized in that; Also comprise: with the PCIE conversion expansion PCI chip that said South Bridge chip is connected through the PCIE signal, this PCIE conversion expansion PCI chip with the PCIE signal extension of South Bridge chip output be output as at least 2 the tunnel have the peer-to-peer communications function the pci interface signal.
2. according to the said many pci signals interface mainboard of claim 1, it is characterized in that, also comprise: be connected, be used to provide it to dispose the external ROM of peer-to-peer communications functional parameter with said PCIE conversion expansion PCI chip with peer-to-peer communications function.
3. according to the said many pci signals interface mainboard of claim 1, it is characterized in that said PCIE conversion expansion PCI chip is at least two with peer-to-peer communications function.
4. according to the said many pci signals interface mainboard of claim 2, it is characterized in that said South Bridge chip connects PCIE conversion expansion PCI chip through the PCIE1X signal with peer-to-peer communications function.
CN2011205723954U 2011-12-31 2011-12-31 Multi-PCI signal interface main board with peer to peer communication function Expired - Fee Related CN202453767U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2011205723954U CN202453767U (en) 2011-12-31 2011-12-31 Multi-PCI signal interface main board with peer to peer communication function

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Application Number Priority Date Filing Date Title
CN2011205723954U CN202453767U (en) 2011-12-31 2011-12-31 Multi-PCI signal interface main board with peer to peer communication function

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CN202453767U true CN202453767U (en) 2012-09-26

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103024359A (en) * 2012-12-25 2013-04-03 四川赛狄信息技术有限公司 Embedded image recorder
CN103869883A (en) * 2012-12-17 2014-06-18 深圳中电长城信息安全系统有限公司 Extension mainboard and extension system
CN106855846A (en) * 2015-12-08 2017-06-16 深圳市祈飞科技有限公司 A kind of PCIE signal extension system and method based on PCIE Switch
CN114116564A (en) * 2021-10-28 2022-03-01 苏州浪潮智能科技有限公司 PCIE (peripheral component interface express) bandwidth resource expansion method and device for bridging PCIE bus and Raid card

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103869883A (en) * 2012-12-17 2014-06-18 深圳中电长城信息安全系统有限公司 Extension mainboard and extension system
CN103869883B (en) * 2012-12-17 2018-05-04 深圳中电长城信息安全系统有限公司 One kind extension mainboard and expansion system
CN103024359A (en) * 2012-12-25 2013-04-03 四川赛狄信息技术有限公司 Embedded image recorder
CN106855846A (en) * 2015-12-08 2017-06-16 深圳市祈飞科技有限公司 A kind of PCIE signal extension system and method based on PCIE Switch
CN114116564A (en) * 2021-10-28 2022-03-01 苏州浪潮智能科技有限公司 PCIE (peripheral component interface express) bandwidth resource expansion method and device for bridging PCIE bus and Raid card
CN114116564B (en) * 2021-10-28 2023-06-06 苏州浪潮智能科技有限公司 PCIE bandwidth resource expansion method and device for bridging PCIE bus and Raid card

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CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20120926

Termination date: 20161231