CN202443357U

CN202443357U - Multi-PCIE (peripheral component interconnect express)-signal interface mainboard with peer-to-peer communication function

Info

Publication number: CN202443357U
Application number: CN2011205724054U
Authority: CN
Inventors: 李辉
Original assignee: SHENZHEN SEAVO TECHNOLOGY Co Ltd
Current assignee: SHENZHEN SEAVO TECHNOLOGY Co Ltd
Priority date: 2011-12-31
Filing date: 2011-12-31
Publication date: 2012-09-19
Anticipated expiration: 2021-12-31

Abstract

A multi-PCIE (peripheral component interconnect express)-signal interface mainboard with a peer-to-peer communication function mainly comprises a processor and a sound bridge chip. The processor is arranged on a mainboard main body, and the sound bridge chip is connected with the processor by a bus. The multi-PCIE-signal interface mainboard is characterized by further comprising a PCIE extension chip, and the PCIE extension chip is in PCIE signal connection with the sound bridge chip, and extends PCIE signals outputted by the sound bridge chip into at least two channels of PCI (peripheral component interconnect) signals with a peer-to-peer communication function. The quantity of PCIE chips of the mainboard with the structure can be greatly increased, the cost of the mainboard is lowered, the peer-to-peer communication function can be realized among PCI interfaces which are in PCI interface signal connection without the aid of the mainboard, the occupation rate of CPU resources is effectively reduced, and the same PCIE chip extended by the multi-PCIE-signal interface mainboard has a hot-plug function.

Description

A kind of many PCIE signaling interface mainboard with peer-to-peer communications function

Technical field

The utility model relates to a kind of mainboard product scope, is specifically related to a kind of many PCIE signaling interface mainboard with peer-to-peer communications function.

Background technology

Mostly existing in the market PCIE interface is to be drawn by the mainboard chip; The PCIE limited amount system that chipset carries; PCIE interface and few (the PCIE interface majority of mainboard is left the big video card of data volume, network interface card, PCIE commentaries on classics SATA use for) of using as the PCIE1X video acquisition can be provided; And the chipset price with more PCIE interfaces is higher, and the H67 chip that for example has 8 road PCIE1X signals is only Duoed 2 PCIE1X than the H61 chip, but price is one times of the latter; Its cost is high.

Simultaneously, relatively independent by the PCIE interface that master chip is drawn, the communication between the PCIE need be passed through CPU, need take cpu resource.

Summary of the invention

To above problem; Technical matters to be solved by this invention is the deficiency that overcomes prior art; A kind of many PCIE signaling interface mainboard with peer-to-peer communications function is provided, and its cost is lower, take low cpu resource, and can realize without peer-to-peer communications function between the pci interface of mainboard.

The purpose of the utility model realizes through following technical scheme:

A kind of many PCIE signaling interface mainboard with peer-to-peer communications function; Mainly comprise: the South Bridge chip that is arranged on the processor on this mainboard body and is connected through bus with this processor; Wherein, Also comprise: with the PCIE extended chip that said South Bridge chip is connected through the PCIE signal, this PCIE extended chip with the PCIE signal extension of South Bridge chip output be output as at least 2 the tunnel have the peer-to-peer communications function the PCIE interface signal.

Further, also comprise: the external ROM that is connected, is used to provide its configuration peer-to-peer communications functional configuration parameter with said PCIE extended chip.

As a kind of improvement, said PCIE extended chip is for regulate the bandwidth PCIE Switch chip that every group of expansion output PCIE takies voluntarily.

As further improvement, said South Bridge chip connects the PCIE extended chip through the PCIE1X signal.

A kind of improved as in addition, said PCIE extended chip with said PCIE1X signal extension be output as 6 the tunnel have the peer-to-peer communications function the pci interface signal.

The utility model invention PCIE extended chip, the PCIE signal extension that South Bridge chip is exported through being connected with South Bridge chip be output as at least 2 the tunnel have the peer-to-peer communications function the PCIE interface signal; Can improve the PCIE quantity of mainboard so greatly, reduce the cost of mainboard; The pci interface that is connected with these PCIE interface signals simultaneously can be realized having effectively reduced the occupancy of cpu resource without peer-to-peer communications function between the PCIE interface of mainboard and PCIE interface.The pci interface that adopts this mode to expand cooperates some special PCI video frequency collection cards can realize not taking cpu resource; Directly realize the cutting of multi-channel video, concatenation; Alleviated CPU and cut, spliced processing burden (the cutting of video, concatenation relatively more frequent in actual use) at video, reduced requirement cpu performance; Certainly the same interface of PCIE that adopts this utility model structure and expand has hot-swappable function, and the interface with this function can detect the state of PCIE interface in real time, plug and play, detects and can use.

Description of drawings

In order to be easy to explanation, the utility model is done to describe in detail by following preferred embodiment and accompanying drawing.

Fig. 1 is the circuit theory synoptic diagram one-piece construction synoptic diagram of the utility model.

Embodiment

For the purpose, technical scheme and the advantage that make the utility model is clearer,, the utility model is further elaborated below in conjunction with accompanying drawing and embodiment.Should be appreciated that specific embodiment described herein only in order to explanation the utility model, and be not used in qualification the utility model.

See also many PCIE signaling interface mainboard that Fig. 1, this kind have the peer-to-peer communications function; Mainly comprise: the South Bridge chip that is arranged on the processor on this mainboard body and is connected through bus with this processor; Wherein, Also comprise: with the PCIE extended chip that said South Bridge chip is connected through the PCIE signal, this PCIE extended chip with the PCIE signal extension of South Bridge chip output be output as at least 2 the tunnel have the peer-to-peer communications function the PCIE interface signal; The PCIE extended chip that adopts in this embodiment is for can regulate the bandwidth PCIE Switch chip that every group of expansion output PCIE takies voluntarily; Can regulate the bandwidth that every group of PCIE takies voluntarily according to the difference of PCIE interface data loading condition.

The PCIE Switch chip that is adopted in this embodiment is known chip, and it specifically can adopt companies such as PLX, IDT, NXP: PLX PEX8606, IDT 89HPES16T4AG2, NXP CBTU0808 or the like chip; Certainly, also can adopt other to have other known chips of similar functions voluntarily as required, repeat no more here.

In this embodiment, also comprise: the external ROM that is connected, is used to provide its configuration peer-to-peer communications functional configuration parameter with said PCIE extended chip.

In this embodiment, said South Bridge chip connects the PCIE extended chip through the PCIE1X signal; Said PCIE extended chip with said PCIE1X signal extension be output as 6 the tunnel have the peer-to-peer communications function the pci interface signal.

Certainly, the PCIE1X interface that expands in this embodiment has hot-swappable function, and the interface with this function can detect the state of PCIE interface in real time, plug and play, detects and can use.Unusual such as occurring in the use; The PCIE device losses; Have the PCIE interface of hot-swappable function can be automatically again detection port, from moving loading equipment, the PCIE interface that does not possess hot-swappable function has only through manual operation under the operating system, lets system carry out again and detects action.

The above is merely the preferred embodiment of the utility model; Not in order to restriction the utility model; Any modification of being done within all spirit and principles at the utility model, be equal to replacement and improvement etc.; As adjust the type of South Bridge chip output PCIE signal and the mode that adopts corresponding PCIE extended chip, all should be included within the protection domain of the utility model.

Claims

1. many PCIE signaling interface mainboard with peer-to-peer communications function; Comprise: the South Bridge chip that is arranged on the processor on this mainboard body and is connected through bus with this processor; It is characterized in that; Also comprise: with the PCIE extended chip that said South Bridge chip is connected through the PCIE signal, this PCIE extended chip with the PCIE signal extension of South Bridge chip output be output as at least 2 the tunnel have the peer-to-peer communications function the PCIE interface signal.

2. according to the said many PCIE signaling interface mainboard of claim 1, it is characterized in that, also comprise: the external ROM that is connected, is used to provide its configuration peer-to-peer communications functional parameter with said PCIE extended chip with peer-to-peer communications function.

3. according to the said many PCIE signaling interface mainboard of claim 2, it is characterized in that said PCIE extended chip is for regulate the bandwidth PCIE Switch chip that every group of expansion output PCIE takies voluntarily with peer-to-peer communications function.

4. according to the said many PCIE signaling interface mainboard of claim 2, it is characterized in that said South Bridge chip connects the PCIE extended chip through the PCIE1X signal with peer-to-peer communications function.

5. according to the said many PCIE signaling interface mainboard of claim 4, it is characterized in that with peer-to-peer communications function, said PCIE extended chip with said PCIE1X signal extension be output as 6 the tunnel have the peer-to-peer communications function the pci interface signal.