CN202393804U - Pulse peak value sampling device - Google Patents
Pulse peak value sampling device Download PDFInfo
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- CN202393804U CN202393804U CN201120409016XU CN201120409016U CN202393804U CN 202393804 U CN202393804 U CN 202393804U CN 201120409016X U CN201120409016X U CN 201120409016XU CN 201120409016 U CN201120409016 U CN 201120409016U CN 202393804 U CN202393804 U CN 202393804U
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- resistance
- hold circuit
- sampling
- peak value
- operational amplifier
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Abstract
The utility model relates to a pulse peak value sampling device. The pulse peak value sampling device comprises a first-stage sampling hold circuit and a second-stage sampling hold circuit. The first-stage sampling hold circuit is used for sampling a high-speed peak value voltage and keeping the high-speed peak value voltage to become a stabilized output voltage. The second-stage sampling hold circuit is used for sampling the voltage output by the first-stage sampling hold circuit and outputting test level that allows the requirement of precision for stabilization of AD test level to be satisfied. The pulse peak value sampling device enables an input high-speed peak value voltage signal to be kept to become a signal that helps to provide enough response time for a post-stage circuit to use.
Description
Technical field
The utility model relates to pulse or the test of interference signal pulse peak value, is specifically related to a kind of peak value of pulse sampling apparatus.
Background technology
The method that the method for testing that the test of preceding high-voltage pulse is used adds high pressure and pops one's head in as oscillograph; Because oscillographic high-speed AD measuring accuracy lower (being generally 5%); Can't satisfy the requirement of pulse test source voltage accuracy (2%), generally can only calibrate with the right method of voltage ratio.For the requirement design of satisfying the calibration of coil measurement appearance high-voltage pulse precision needs to adopt the peak value of pulse sampling apparatus, this circuit is exactly the core-peak value sampling circuit of equipment.Peak value of pulse sampling cartridge commonly used is equipped with following several kinds:
The first, this is the simplest a kind of peak value of pulse sampling apparatus, and this circuit theory is the current rectifying and wave filtering circuit that diode and capacitor are formed.There is diode turn-on voltage in this circuit, and the voltage on the actual capacitance changes the deviation that has the hundreds of millivolt with the duration of charging, is that voltage is accurate in non-linear can't guaranteeing.
The second, adopt the error of eliminating the forward voltage generation of diode with amplifier realization active rectifying circuit.The problem that sort circuit exists is: when negative pressure appearred in input, amplifier can occur exporting negative state of saturation, influences test response speed.The stability of sustaining voltage receives back level input impedance to influence very big in addition.
The 3rd, on the basis of above-mentioned second kind of circuit,, the stability that reduces sustaining voltage influences for receiving back level input impedance, need add the high impedance buffer circuit.Sort circuit also has problems: when carrying out the high-speed sampling test, keep capacitance smaller.Measuring accuracy is when higher, and reverse leakage current of commutation diode and distributed capacitance can't be ignored the influence of measuring accuracy, need add duodiode rectification and mid-point voltage holding circuit.Keep performance requirement though this circuit has satisfied sampling basically, sampling rate with keep speed all to be kept capacitance size and the distribution electric leakage parameter influence that keeps around the electric capacity, be difficult to realize simultaneously that the sampling of 200nS keeps, the output of 2mS is stable.
In sum, existing sampling hold circuit adopts the sampled voltage circuit structure that diode rectification, electric capacity keep.The PV sampling of 200nS; Circuit time constant need surpass six times of pulsewidth (magnitudes: 1E-8) under accuracy requirement; Because tens ohm of (magnitudes: 1E1), consider that measuring accuracy requirement maintenance electric capacity will be less than 1nF (magnitude: 1E-9) of diode AC equivalent resistance.Even less than 1%, then time constant approximately need be greater than retention time of 200 times (magnitude: 1E0), just keep the equivalent insulation resistance of electric capacity periphery need be greater than 1G Ω (magnitude: 1E9) at the time of 2mS electric voltage dropping for the electric capacity voltage of 1nF.Like this insulation resistance of peripheral circuit and leakage current are required too highly can't find corresponding element to realize such performance, and the data anti-interference problem is difficult to guarantee.
Summary of the invention
To above-mentioned technical matters, the purpose of the utility model is to provide a kind of peak value of pulse sampling apparatus, and this peak value of pulse sampling apparatus can be with the peak voltage signal of high speed of input, keeps becoming having the signal that supplies the response time that late-class circuit enough uses.
The technical scheme that realizes the utility model is following:
The peak value of pulse sampling apparatus comprises first order sampling hold circuit, and this first order sampling hold circuit sampling PV at a high speed is with PV maintenance the becoming regulated output voltage of this high speed; And
Second level sampling hold circuit, the voltage of this second level sampling hold circuit sampling first order sampling hold circuit output, the test level that AD test level stabilized accuracy requires is satisfied in output.
Adopted such scheme, the advantage of the utility model is following:
1. sampling hold circuit has the 200nS response speed;
2. the sampling hold circuit structure of two-stage keeps reducing the circuit design requirement through multipole sampling, successfully realizes the purpose of test circuit with existing device;
With the test of sampling hold circuit realization PV, the 200nS pulse width, precision reaches 1%.
Description of drawings
Fig. 1 is the circuit theory diagrams of first order sampling hold circuit;
Fig. 2 is the actual test signal curve of a first order sampling hold circuit test pattern;
Fig. 3 two-stage sampling hold circuit actual effect test signal curve test pattern;
Fig. 4 keeps the actual test curve figure of performance for the first order is output in second level output voltage;
Embodiment
With reference to a kind of peak value of pulse sampling apparatus shown in Figure 1, the peak value of pulse sampling apparatus comprises first order sampling hold circuit, and this first order sampling hold circuit sampling PV at a high speed is with PV maintenance the becoming regulated output voltage of this high speed; And second level sampling hold circuit, the voltage of this second level sampling hold circuit sampling first order sampling hold circuit output, the test level that AD test level stabilized accuracy requires is satisfied in output.First order sampling hold circuit is identical with the circuit structure of second level sampling hold circuit, for the fine difference on the function between the two, is to be decided by the choosing value of components and parts between the two.Output terminal at first order sampling hold circuit connects a second level sampling hold circuit that structure is identical again, has just obtained the peak value of pulse sampling apparatus of the utility model, and the structure with first order sampling hold circuit is that example describes below:
First order sampling hold circuit comprises the first operational amplifier U1 and the second operational amplifier U2; One end of first resistance R 1 and second resistance R 2 is connected in the in-phase input end of first operational amplifier; The other end of first resistance receives PV sampled input signal at a high speed, the other end ground connection of second resistance; The two ends of one first diode D1 are connected between the inverting input and output terminal of the first operational amplifier U1, and the two ends of first diode also connect one first capacitor C 1.One end of one the 3rd resistance R 3 and the 4th resistance R 4 all is connected with the inverting input of the first operational amplifier U1; The other end ground connection of the 3rd resistance R 3; The other end of the 4th resistance R 4 is connected with the output terminal of the second operational amplifier U2, contact the 5th resistance R 5 backs and be connected in the two ends of the 4th resistance R 4 of one second electric capacity.The output terminal of the first operational amplifier U1 contact the successively second diode D2 and the 3rd diode D3; Between the cathode terminal of the second diode D2 and the 4th resistance R 4, also connect one the 6th resistance R 6; The negative electrode of the 3rd diode D3 is connected with the in-phase input end of the second operational amplifier U2 with the 3rd capacitor C 3 and Lian Houzai, and the reverse input end of the second operational amplifier U2 is connected with its output terminal.
Adopt the two-stage sampling hold circuit based on above situation, illustrate the course of work:
The first order sampling hold circuit sampling hundreds of nanosecond PV, it is reliable to keep becoming tens delicate data, leakage impedance requires to be several mega-ohms.Fig. 2 has expressed the actual test signal curve map through first order sampling hold circuit, as can beappreciated from fig. 2 through first order sampling hold circuit PV long time of maintenance with input.
Second level sampling hold circuit tens delicate in to the data acquisition of first order sampling hold circuit, and it is reliable to keep becoming several milliseconds data, keeping the equivalent insulation impedance of electric capacity periphery to require also is several megaohms.Fig. 3 is the actual effect test curve that two-stage keeps, and clearly, Fig. 3 is through the effect of second level sampling hold circuit, the signal of first order sampling hold circuit output is held in the signal of the response time that late-class circuit enough uses.Fig. 4 is that the first order is output in relatively actual curve of secondary voltage maintenance performance; Comparison from figure can be found out; If there is not second level sampling hold circuit, then the signal of first order sampling hold circuit output can glide, and is difficult to become the signal of the response time that late-class circuit uses.
Claims (2)
1. peak value of pulse sampling apparatus is characterized in that: comprise first order sampling hold circuit, this first order sampling hold circuit sampling PV at a high speed is with PV maintenance the becoming regulated output voltage of this high speed; And
Second level sampling hold circuit, the voltage of this second level sampling hold circuit sampling first order sampling hold circuit output, the test level that AD test level stabilized accuracy requires is satisfied in output.
2. peak value of pulse sampling apparatus according to claim 1; It is characterized in that: said first order sampling hold circuit comprises first operational amplifier (U1) and second operational amplifier (U2); One end of first resistance (R1) and second resistance (R2) is connected in the in-phase input end of first operational amplifier; The other end of first resistance receives PV sampled input signal at a high speed, the other end ground connection of second resistance; One first diode (D1) is connected between the inverting input and output terminal of first operational amplifier (U1); The two ends of first diode also connect one first electric capacity (C1); One end of one the 3rd resistance (R3) and the 4th resistance (R4) all is connected with the inverting input of first operational amplifier (U1); The other end ground connection of the 3rd resistance; The other end of the 4th resistance is connected with the output terminal of second operational amplifier (U2), and one second electric capacity (C2) polyphone the 5th resistance (R5) back also is connected in the two ends of the 4th resistance; The output terminal of first operational amplifier (U1) contact successively second diode (D2) and the 3rd diode (D3); Between the cathode terminal of second diode (D2) and the 4th resistance (R4), also connect one the 6th resistance (R6); The negative electrode of the 3rd diode (D3) is connected with the in-phase input end of second operational amplifier (U2) with the 3rd electric capacity (C3) and Lian Houzai, and the reverse input end of second operational amplifier (U2) is connected with its output terminal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201120409016XU CN202393804U (en) | 2012-03-21 | 2012-03-21 | Pulse peak value sampling device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201120409016XU CN202393804U (en) | 2012-03-21 | 2012-03-21 | Pulse peak value sampling device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202393804U true CN202393804U (en) | 2012-08-22 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201120409016XU Expired - Fee Related CN202393804U (en) | 2012-03-21 | 2012-03-21 | Pulse peak value sampling device |
Country Status (1)
| Country | Link |
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| CN (1) | CN202393804U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107707260A (en) * | 2017-11-27 | 2018-02-16 | 中山路得斯空调有限公司 | A kind of instantaneous sampling holding circuit for low speed ADC |
| CN113484618A (en) * | 2021-09-07 | 2021-10-08 | 湖北方圆环保科技有限公司 | Pulse amplitude acquisition device and pulse amplitude acquisition method |
-
2012
- 2012-03-21 CN CN201120409016XU patent/CN202393804U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107707260A (en) * | 2017-11-27 | 2018-02-16 | 中山路得斯空调有限公司 | A kind of instantaneous sampling holding circuit for low speed ADC |
| CN113484618A (en) * | 2021-09-07 | 2021-10-08 | 湖北方圆环保科技有限公司 | Pulse amplitude acquisition device and pulse amplitude acquisition method |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C56 | Change in the name or address of the patentee |
Owner name: CHANGZHOU TAIYU INFORMATION TECHNOLOGY CO., LTD. Free format text: FORMER NAME: CHANGZHOU TONGHUI ELECTRONICS CO., LTD. |
|
| CP01 | Change in the name or title of a patent holder |
Address after: 213022 No. 3 Tianshan Road, Xinbei District, Jiangsu, Changzhou Patentee after: CHANGZHOU TONGHUI ELECTRONICS CO., LTD. Patentee after: Changzhou Institute of Measurement & Testing Technology Address before: 213022 No. 3 Tianshan Road, Xinbei District, Jiangsu, Changzhou Patentee before: Changzhou Tonghui Electronics Co., Ltd. Patentee before: Changzhou Institute of Measurement & Testing Technology |
|
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120822 Termination date: 20180321 |
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| CF01 | Termination of patent right due to non-payment of annual fee |