CN202373582U

CN202373582U - Novel on-chip transformer structure with substrate shielding layers

Info

Publication number: CN202373582U
Application number: CN2011205516174U
Authority: CN
Inventors: 文进才; 孙玲玲; 章南; 苏国东
Original assignee: Hangzhou Dianzi University
Current assignee: Hangzhou Dianzi University
Priority date: 2011-12-27
Filing date: 2011-12-27
Publication date: 2012-08-08
Anticipated expiration: 2021-12-27

Abstract

The utility model relates to a novel on-chip transformer structure with substrate shielding layers. The on-chip transformer structure comprises an on-chip transformer, wherein a plurality of substrate shielding layers are arranged right below the on-chip transformer; each substrate shielding layer is constituted by a rectangular metal strip and a plurality of metal grid bars identical in shape; and the metal grid bars are vertical to the rectangular metal strip and are equidistantly arranged in parallel. According to the novel on-chip transformer structure with the substrate shielding layers, disclosed by the utility model, better substrate isolation can be realize, the substrate loss is reduced, and a capacitive function can be fulfilled through the plurality of substrate shielding layers.

Description

The on-chip transformer structure of novel substrate shield layer

Technical field

The utility model belongs to microwave technical field, relates to a kind of on-chip transformer structure of novel substrate shield layer.

Background technology

In recent years; Relevant the possibility of its application research in radio-frequency technique of CMOS technology is increased in a large number; Especially can wage a decisive campaign with traditional GaAs micro element in the CMOS technology of deep-submicron some field below 10GHz, and this has promoted the development of cmos circuit undoubtedly.Utilize the CMOS standard technology to be implemented in the integrated of numeral, simulation and part radio frequency part on the chip piece, not only can reduce manufacturing cost greatly, and can realize various function.This has also catered in the fast development in global communication market, and wireless communication system is to reducing chip size, the requirement that reduces cost of manufacture and shorten the R&D cycle.So; The microwave monolithic integrated circuit that is applied in recent years in the communication system has obtained unprecedented high speed development; And transformer is as passive device very important among RFIC and the MMIC; Usually be employed with circuit such as low noise amplifier, voltage controlled oscillator, double balanced mixer, power amplifier in, realize impedance matching, difference and single-ended signal conversion, AC coupled and increase bandwidth etc. with this.

Different with digital integrated circuit and low-frequency channel, the RF IC passive component that is widely used.Because receive the restriction of technology, the performance of integrated passive components is far below discrete component, and concerning RF IC, circuit performance is subject to passive component to a great extent.Therefore, under the situation that technology allows, improve the performance of integrated passive components as far as possible, for RF IC, have the meaning of particular importance through size or layout design.

Particularly along with in recent decades, the operating voltage of digital integrated circuit constantly descends according to the Moore law, has limited the operating voltage of simulation and radio circuit.Also the someone uses the multiplex (MUX) to alleviate this problem as electrical voltage system, but this can increase the power consumption and the complexity of circuit.Therefore, in order to adapt to low voltage operating environment now, in SOC(system on a chip), playing the part of more and more important role based on the on-chip transformer of winding department magnetic field coupling work, and its effect in RF front-end circuit is irreplaceable especially.

On-chip transformer is used and can be improved the compactedness of radio circuit and realize the circuit high-performance.Transformer can be realized impedance matching, stability, direct current biasing effectively.The radio circuit that is different from traditional single-ended structure, the circuit of differential configuration can utilize the advantage of on-chip transformer coupling well, can realize exceeding than the single-ended structure under the equal area power output of 3dB.Transformer is because of in himself resistance, coupling coefficient and inherent impedance, and it is stable not need extra structure just can improve basically.Transformer matees can simplify circuit structure, directly can directly setover and matees through transformer, does not need extra choke induction.

But, along with improving constantly of radio communication frequency, the conduction silicon-based substrate of on-chip transformer will be introduced increasing parasitic couplings phenomenon.The quality factor of the on-chip transformer that the employing standard CMOS process is realized is all lower, generally below 10.This is because the various non-ideal factors that device exists on the sheet cause that this comprises the loss that the limited conductivity of microstrip line causes, during high frequency because skin effect and other magnetic field effect make that this loss is more serious; Electromagnetic field during high frequency between uninsulated substrate and the microstrip line interacts and the loss that causes; Parasitic capacitance that exists between metal level and the substrate and the edge capacitance between the metal wire.

The influence that reduces substrate is similar to on-chip inductor, in order to strengthen thickness of oxide layer, the employing light dope substrate between transformer and the substrate or use dielectric substrate (SOI technology is perhaps emptied the substrate under the transformer and fill insulant separately).These technologies are all incompatible with standard CMOS process, can make cost increase.Better way is under the support of standard CMOS process, improves performance through on-chip transformer is optimized, and use bottom metal ground connection separator reduces substrate loss with transformer and substrate isolation under transformer.

Summary of the invention

In order to overcome the influence of body effect to on-chip transformer, the purpose of the utility model provides a kind of on-chip transformer structure of novel substrate shield layer.

The technical scheme that the utility model technical solution problem is taked:

The on-chip transformer structure of novel substrate shield layer comprises on-chip transformer, under on-chip transformer, is provided with the MULTILAYER SUBSTRATE screen; Described substrate shield layer is made up of with the many identical metal grizzly bars of shape the rectangular metal bar, and described metal grizzly bar is provided with the rectangular metal bar is vertical, equidistantly laterally arranges between the metal grizzly bar.

As preferably, described substrate shield layer is one deck.

The beneficial effect of the utility model:

The on-chip transformer structure of the novel substrate shield layer of the utility model can realize better substrate isolation, reduces substrate loss, and can realize capacitive function through a plurality of substrate shield layers.

Description of drawings

Fig. 1 is the novel substrate shield layer sketch map of the utility model.

Fig. 2 is that the utility model utilizes the on-chip transformer schematic perspective view of ground floor metal (M1) as screen.

Fig. 3 is that the utility model utilizes ground floor metal (M1) and second layer metal (M2) to realize the schematic cross-section of capacitive function as screen.

Fig. 4 is that the utility model utilizes ground floor metal (M1), second layer metal (M2) and three-layer metal (M3) to realize the schematic cross-section of capacitive function as screen.

Embodiment

The novel substrate shield layer of the utility model can be a multilayer, and as preferably, described substrate shield layer is one deck.Like Fig. 1, shown in Figure 2, the utility model comprises on-chip transformer, under on-chip transformer, is provided with one deck substrate shield layer; Described substrate shield layer is made up of with the many identical metal grizzly bars of shape the rectangular metal bar, and described metal grizzly bar is provided with the rectangular metal bar is vertical, equidistantly laterally arranges between the metal grizzly bar.The utility model can be realized the isolation of on-chip transformer and substrate effectively, makes to realize between on-chip transformer magnetic field and the substrate cutting off, and avoids occurring eddy current loss in the separator, makes substrate loss reduce, and has also reduced the signal cross-talk to adjacent devices simultaneously.

Fig. 2 is that the utility model utilizes the on-chip inductor schematic perspective view of ground floor metal (M1) as screen.Penetrate port one (Port1), the port 3 (Port3) of radiofrequency signal, come out through port 2 (Port2), the port 4 (Port4) of coupling back, magnetic field from secondary coil from transformer.Through the isolation of screen (like ground floor metal M 1) realization transformer and substrate, can avoid occurring eddy current loss in the separator, reduce substrate loss.

The utility model can be realized capacitive function through a plurality of substrate shield layers, and Fig. 3 realizes the schematic cross-section of capacitive function for the utility model utilizes ground floor metal (M1) and second layer metal (M2) as screen.Concrete implementation is: screen 2 (realizing with second layer metal M2) is connected to power end through line, and screen 1 (realizing with ground floor metal M 1) is through line ground connection.So just can form the capacitor C 2 between capacitor C 1, ground floor metal (M1) and the second layer metal (M2) between second layer metal (M2) and the substrate, obtain total capacitor C and be the parallelly connected of capacitor C 1 and capacitor C 2.

If the resulting capacitance of two-layer substrate screen shown in Figure 3 is big inadequately; Then can use more multiple layer metal realization screen, realize capacitive function for the utility model utilizes ground floor metal (M1), second layer metal (M2), three-layer metal (M3) as screen such as shown in Figure 4.Concrete implementation is: screen 2 (second layer metal M2) is connected to power end through line, screen 1 (ground floor metal M 1) and screen 3 (three-layer metal M3) difference ground connection.So just can obtain the capacitor C 2 between capacitor C 2, three-layer metal (M3) and the second layer metal (M2) between capacitor C 1, ground floor metal (M1) and the second layer metal (M2) between second layer metal (M2) and the substrate, obtain total capacitor C and be the parallelly connected of capacitor C 1 and capacitor C 2.

Claims

1. the on-chip transformer structure of novel substrate shield layer is characterized in that: comprise on-chip transformer, under on-chip transformer, be provided with the MULTILAYER SUBSTRATE screen; Described substrate shield layer is made up of with the many identical metal grizzly bars of shape the rectangular metal bar, and described metal grizzly bar is provided with the rectangular metal bar is vertical, equidistantly laterally arranges between the metal grizzly bar.

2. on-chip transformer structure according to claim 1 is characterized in that: described substrate shield layer is one deck.